[PATCH 2/2] Add new board gta0x (for Openmoko Freerunner devices) and build it
Daniel Willmann
daniel at totalueberwachung.de
Mon May 17 01:37:03 CEST 2010
For now just copied over the compal_e88 init.c and adapted the RF
frontend functions. For osmocon to work with the GSM download cable
SERCOMM_UART_NR and CONS_UART_NR need to be switched.
---
src/target/firmware/Makefile | 4 +-
.../firmware/board/common/rffe_gta0x_triband.c | 88 +++++++++++++
src/target/firmware/board/gta0x/init.c | 131 ++++++++++++++++++++
3 files changed, 222 insertions(+), 1 deletions(-)
create mode 100644 src/target/firmware/board/common/rffe_gta0x_triband.c
create mode 100644 src/target/firmware/board/gta0x/init.c
diff --git a/src/target/firmware/Makefile b/src/target/firmware/Makefile
index 7c6ba7a..e67cc1a 100644
--- a/src/target/firmware/Makefile
+++ b/src/target/firmware/Makefile
@@ -12,10 +12,12 @@ RF_OBJS=rf/trf6151.o
START=board/common/compal_ramload_start.S
# List of all supported boards
-BOARDS?=compal_e88 compal_e99
+BOARDS?=compal_e88 compal_e99 gta0x
compal_COMMON_OBJS=board/common/rffe_compal_dualband.o board/common/calypso_uart.o board/common/calypso_pwl.o
+gta0x_COMMON_OBJS=board/common/rffe_gta0x_triband.o board/common/calypso_uart.o board/common/calypso_pwl.o
compal_e88_OBJS=$(compal_COMMON_OBJS) board/compal_e88/init.o
compal_e99_OBJS=$(compal_COMMON_OBJS) board/compal_e99/init.o
+gta0x_OBJS=$(gta0x_COMMON_OBJS) board/gta0x/init.o
# List of all supported execution environments
ENVIRONMENTS?=ramload osmoload
diff --git a/src/target/firmware/board/common/rffe_gta0x_triband.c b/src/target/firmware/board/common/rffe_gta0x_triband.c
new file mode 100644
index 0000000..63003d4
--- /dev/null
+++ b/src/target/firmware/board/common/rffe_gta0x_triband.c
@@ -0,0 +1,88 @@
+#include <stdint.h>
+#include <stdio.h>
+
+#include <debug.h>
+#include <memory.h>
+#include <rffe.h>
+#include <calypso/tsp.h>
+#include <rf/trf6151.h>
+
+/* describe how the RF frontend is wired on the Openmoko GTA0x boards */
+
+#define RITA_RESET TSPACT(0) /* Reset of the Rita TRF6151 */
+#define PA_ENABLE TSPACT(9) /* Enable the Power Amplifier */
+#define GSM_TX TSPACT(3) /* PA GSM switch, low-active */
+
+/* All VCn controls are low-active */
+#define ASM_VC1 TSPACT(2) /* Antenna switch VC1 */
+#define ASM_VC2 TSPACT(1) /* Antenna switch VC2 */
+#define ASM_VC3 TSPACT(4) /* Antenna switch VC3 */
+
+#define IOTA_STROBE TSPEN0 /* Strobe for the Iota TSP */
+#define RITA_STROBE TSPEN2 /* Strobe for the Rita TSP */
+
+/* switch RF Frontend Mode */
+void rffe_mode(enum gsm_band band, int tx)
+{
+ uint16_t tspact = tsp_act_state();
+
+ /* First we mask off all bits from the state cache */
+ tspact &= ~PA_ENABLE;
+ tspact |= GSM_TXEN; /* low-active */
+ tspact |= ASM_VC1 | ASM_VC2 | ASM_VC3; /* low-active */
+
+ switch (band) {
+ case GSM_BAND_850:
+ case GSM_BAND_900:
+ case GSM_BAND_1800:
+ break;
+ case GSM_BAND_1900:
+ tspact &= ~ASM_VC2;
+ break;
+ default:
+ /* TODO return/signal error here */
+ break;
+ }
+
+#ifdef CONFIG_TX_ENABLE
+ /* Then we selectively set the bits on, if required */
+ if (tx) {
+ // TODO: Implement tx
+ }
+#endif /* TRANSMIT_SUPPORT */
+
+ tsp_act_update(tspact);
+}
+
+#define MCU_SW_TRACE 0xfffef00e
+#define ARM_CONF_REG 0xfffef006
+
+void rffe_init(void)
+{
+ uint16_t reg;
+
+ reg = readw(ARM_CONF_REG);
+ reg &= ~ (1 << 7); /* TSPACT4 I/O function, not nRDYMEM */
+ writew(reg, ARM_CONF_REG);
+
+ reg = readw(MCU_SW_TRACE);
+ reg &= ~(1 << 1); /* TSPACT9 I/O function, not MAS(1) */
+ writew(reg, MCU_SW_TRACE);
+}
+
+uint8_t rffe_get_gain(void)
+{
+ return trf6151_get_gain();
+}
+
+/* Given the expected input level of exp_inp dBm/8 and the target of target_bb
+ * dBm8, configure the RF Frontend with the respective gain */
+void rffe_set_gain(int16_t exp_inp, int16_t target_bb)
+{
+ /* FIXME */
+}
+
+void rffe_rx_win_ctrl(int16_t exp_inp, int16_t target_bb)
+{
+ /* FIXME */
+}
diff --git a/src/target/firmware/board/gta0x/init.c b/src/target/firmware/board/gta0x/init.c
new file mode 100644
index 0000000..12105c5
--- /dev/null
+++ b/src/target/firmware/board/gta0x/init.c
@@ -0,0 +1,131 @@
+/* Initialization for the Openmoko Freerunner modem */
+
+/* (C) 2010 by Harald Welte <laforge at gnumonks.org>
+ *
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include <debug.h>
+#include <memory.h>
+#include <board.h>
+#include <keypad.h>
+#include <console.h>
+#include <cfi_flash.h>
+
+#include <calypso/irq.h>
+#include <calypso/clock.h>
+#include <calypso/dma.h>
+#include <calypso/rtc.h>
+#include <calypso/timer.h>
+#include <calypso/uart.h>
+
+#include <comm/sercomm.h>
+#include <comm/timer.h>
+
+#include <abb/twl3025.h>
+#include <rf/trf6151.h>
+#include <display.h>
+
+#define ARMIO_LATCH_OUT 0xfffe4802
+#define ARMIO_CNTL_REG 0xfffe4804
+#define ASIC_CONF_REG 0xfffef008
+
+static void board_io_init(void)
+{
+ uint16_t reg;
+
+ reg = readw(ASIC_CONF_REG);
+ /* LCD Set I/O(3) / SA0 to I/O(3) mode */
+ reg &= ~(1 << 10);
+ /* Set function pins to I2C Mode */
+ reg |= 0x1080; /* SCL / SDA */
+ /* TWL3025: Set SPI+RIF RX clock to rising edge */
+ reg |= (1 << 13) | (1 << 14);
+ writew(reg, ASIC_CONF_REG);
+
+ /* LCD Set I/O(3) to output mode */
+ reg = readw(ARMIO_CNTL_REG);
+ reg &= ~(1 << 3);
+ writew(reg, ARMIO_CNTL_REG);
+
+ /* LCD Set I/O(3) output low */
+ reg = readw(ARMIO_LATCH_OUT);
+ reg &= ~(1 << 3);
+ writew(reg, ARMIO_LATCH_OUT);
+}
+
+void board_init(void)
+{
+ /* FIXME: this needs to go to board_e99/init.c once we have it */
+ wdog_enable(0);
+
+ static cfi_flash_t flash;
+ // XXX: move after mapping initialization and use final address
+ flash_init(&flash, 0x00000000);
+
+ calypso_mem_cfg(CALYPSO_nCS0, 3, CALYPSO_MEM_16bit, 1);
+ calypso_mem_cfg(CALYPSO_nCS1, 3, CALYPSO_MEM_16bit, 1);
+ calypso_mem_cfg(CALYPSO_nCS2, 5, CALYPSO_MEM_16bit, 1);
+ calypso_mem_cfg(CALYPSO_nCS3, 5, CALYPSO_MEM_16bit, 1);
+ calypso_mem_cfg(CALYPSO_CS4, 0, CALYPSO_MEM_8bit, 1);
+ calypso_mem_cfg(CALYPSO_nCS6, 0, CALYPSO_MEM_32bit, 1);
+ calypso_mem_cfg(CALYPSO_nCS7, 0, CALYPSO_MEM_32bit, 0);
+
+ /* Set VTCXO_DIV2 = 1, configure PLL for 104 MHz and give ARM half of that */
+ calypso_clock_set(2, CALYPSO_PLL13_104_MHZ, ARM_MCLK_DIV_2);
+
+ /* Configure the RHEA bridge with some sane default values */
+ calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);
+
+ board_io_init();
+
+ /* Enable bootrom mapping to route exception vectors to RAM */
+ calypso_bootrom(1);
+ calypso_exceptions_install();
+
+ irq_init();
+
+ /* initialize MODEM UART to be used for sercomm*/
+ uart_init(SERCOMM_UART_NR, 1);
+ uart_baudrate(SERCOMM_UART_NR, UART_115200);
+
+ /* initialize IRDA UART to be used for old-school console code.
+ * note: IRDA uart only accessible on C115 and C117 PCB */
+ uart_init(CONS_UART_NR, 1);
+ uart_baudrate(CONS_UART_NR, UART_115200);
+
+ hwtimer_init();
+
+ dma_init();
+ rtc_init();
+
+ timer_init();
+
+ /* Initialize LCD driver (uses I2C) */
+ display = &st7558_display;
+ display_init();
+
+ /* Initialize keypad driver */
+ keypad_init(1);
+
+ /* Initialize ABB driver (uses SPI) */
+ twl3025_init();
+}
--
1.7.0.4
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