Use OsmocomBB as OpenBTS / airprobe clock generator

[Christian Vogel]

Hi Alexander,

On Thu, 15 Mar 2012 11:51:06 +0100, Alexander Huemer  
<alexander.huemer at xx.vu> wrote:
> Assuming this is the case, could something like a Schmitt trigger
> between the sine wave source and the PLL improve the situation?
> Or would that add jitter or some other negative effects to the signal?

74AC(T)04 are considered quite excellent input stages (or amplifiers for  
fanout) for
timing signals.

See, for example, this posting on the "time-nuts" mailinglist (which is  
dedicated
to precision frequency measurement/timekeeping):

http://www.mail-archive.com/time-nuts@febo.com/msg26830.html

With a feedback resistors (say, a few 10kOhm) and a series input capacitor  
(a few nF)
the bias-DC of the input will automatically adjust to 1/2 duty cycle.

Using anything more fancy, for example high-bandwidth comparators, is  
frowned upon.

	Chris