FreeCalypso > hg > fc-magnetite
annotate components/fchg @ 624:012028896cfb
FFS dev.c, Leonardo target: Fujitsu MB84VF5F5F4J2 #if 0'ed out
The FFS code we got from TI/Openmoko had a stanza for "Fujitsu MB84VF5F5F4J2
stacked device", using a fake device ID code that would need to be patched
manually into cfgffs.c (suppressing and overriding autodetection) and using
an FFS base address in the nCS2 bank, indicating that this FFS config was
probably meant for the MCP version of Leonardo which allows for 16 MiB flash
with a second bank on nCS2.
We previously had this FFS config stanza conditionalized under
CONFIG_TARGET_LEONARDO because the base address contained therein is invalid
for other targets, but now that we actually have a Leonardo build target in
FC Magnetite, I realize that the better approach is to #if 0 out this stanza
altogether: it is already non-functional because it uses a fake device ID
code, thus it is does not add support for more Leonardo board variants,
instead it is just noise.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 22 Dec 2019 21:24:29 +0000 |
parents | 1c711302732a |
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rev | line source |
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1 # Building FCHG SWE - an original FreeCalypso addition |
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2 |
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3 CFLAGS="-mn -mt -o -x -mw -me -pw2" |
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4 CPPFLAGS="-DTOOL_CHOICE=0 -D_TMS470" |
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5 |
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6 # Includes |
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7 |
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8 CPPFLAGS="$CPPFLAGS -I$SRC/cs/os/nucleus" |
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9 CPPFLAGS="$CPPFLAGS -I.." |
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10 CPPFLAGS="$CPPFLAGS -I../config" |
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11 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc" |
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12 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/frame/cust_os" |
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13 CPPFLAGS="$CPPFLAGS -I$SRC/cs/system" |
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14 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera" |
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15 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera/rv" |
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16 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core" |
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17 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb" |
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18 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio" |
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19 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm" |
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20 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf" |
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21 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma" |
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22 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld" |
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23 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth" |
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24 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif" |
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25 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea" |
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26 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security" |
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27 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi" |
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28 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer" |
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29 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart" |
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30 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd" |
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31 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app" |
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32 CPPFLAGS="$CPPFLAGS -I$SRC/cs/services" |
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33 |
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34 # Source modules |
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35 |
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36 SRCDIR=$SRC/cs/drivers/drv_app/fchg |
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37 |
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FCHG: API implementation started
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38 cfile_plain $SRCDIR/fchg_api.c |
324
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FCHG: default battery table implemented
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39 cfile_plain $SRCDIR/fchg_default_batt.c |
323
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40 cfile_plain $SRCDIR/fchg_env.c |
325
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41 cfile_plain $SRCDIR/fchg_ffs_init.c |
338
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FCHG: complete enough to attempt linking into fw build
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42 cfile_plain $SRCDIR/fchg_messages.c |
331
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FCHG: main ADC process implemented
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43 cfile_plain $SRCDIR/fchg_process.c |
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44 cfile_plain $SRCDIR/fchg_task.c |