FreeCalypso > hg > fc-magnetite
annotate src/g23m-gprs/grlc/grlc_rds.c @ 624:012028896cfb
FFS dev.c, Leonardo target: Fujitsu MB84VF5F5F4J2 #if 0'ed out
The FFS code we got from TI/Openmoko had a stanza for "Fujitsu MB84VF5F5F4J2
stacked device", using a fake device ID code that would need to be patched
manually into cfgffs.c (suppressing and overriding autodetection) and using
an FFS base address in the nCS2 bank, indicating that this FFS config was
probably meant for the MCP version of Leonardo which allows for 16 MiB flash
with a second bank on nCS2.
We previously had this FFS config stanza conditionalized under
CONFIG_TARGET_LEONARDO because the base address contained therein is invalid
for other targets, but now that we actually have a Leonardo build target in
FC Magnetite, I realize that the better approach is to #if 0 out this stanza
altogether: it is already non-functional because it uses a fake device ID
code, thus it is does not add support for more Leonardo board variants,
instead it is just noise.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 22 Dec 2019 21:24:29 +0000 |
parents | 219afcfc6250 |
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rev | line source |
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1 /* |
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2 +----------------------------------------------------------------------------- |
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3 | Project : GPRS (8441) |
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4 | Modul : GRLC |
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5 +----------------------------------------------------------------------------- |
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6 | Copyright 2002 Texas Instruments Berlin, AG |
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7 | All rights reserved. |
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8 | |
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9 | This file is confidential and a trade secret of Texas |
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10 | Instruments Berlin, AG |
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11 | The receipt of or possession of this file does not convey |
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12 | any rights to reproduce or disclose its contents or to |
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13 | manufacture, use, or sell anything it may describe, in |
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14 | whole, or in part, without the specific written consent of |
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15 | Texas Instruments Berlin, AG. |
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16 +----------------------------------------------------------------------------- |
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17 | Purpose : This module implements signal handler functions for service |
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18 | RD of entity GRLC. |
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19 +----------------------------------------------------------------------------- |
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20 */ |
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21 |
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22 #ifndef GRLC_RDS_C |
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23 #define GRLC_RDS_C |
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24 #endif |
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25 |
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26 #define ENTITY_GRLC |
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27 |
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28 /*==== INCLUDES =============================================================*/ |
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29 #include <string.h> |
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30 |
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31 #include "typedefs.h" /* to get Condat data types */ |
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32 |
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33 #include "vsi.h" /* to get a lot of macros */ |
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34 #include "macdef.h" |
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35 #include "gprs.h" |
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36 #include "gsm.h" /* to get a lot of macros */ |
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37 #include "ccdapi.h" /* to get CCD API */ |
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38 #include "cnf_grlc.h" /* to get cnf-definitions */ |
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39 #include "mon_grlc.h" /* to get mon-definitions */ |
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40 #include "prim.h" /* to get the definitions of used SAP and directions */ |
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41 #include "message.h" |
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42 #include "grlc.h" /* to get the global entity definitions */ |
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43 #include "grlc_rdf.h" |
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44 #include "grlc_tms.h" |
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45 #include "grlc_f.h" |
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46 #include "grlc_meass.h" |
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47 |
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48 /*==== CONST ================================================================*/ |
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49 const T_TIME T3192_Values[8] = {500, 1000, 1500, 1, 80, 120, 160, 200}; |
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50 |
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51 /*==== LOCAL VARS ===========================================================*/ |
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52 |
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53 /*==== PRIVATE FUNCTIONS ====================================================*/ |
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54 |
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55 /*==== PUBLIC FUNCTIONS =====================================================*/ |
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56 |
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57 |
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58 |
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59 /* |
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60 +------------------------------------------------------------------------------ |
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61 | Function : sig_tm_rd_assign |
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62 +------------------------------------------------------------------------------ |
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63 | Description : Handles the internal signal SIG_TM_RD_ASSIGN |
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64 | |
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65 | Parameters : dummy - description of parameter dummy |
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66 | |
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67 +------------------------------------------------------------------------------ |
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68 */ |
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69 GLOBAL void sig_tm_rd_assign ( void ) |
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70 { |
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71 TRACE_ISIG( "sig_tm_rd_assign" ); |
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72 |
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73 switch( GET_STATE( RD ) ) |
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74 { |
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75 case RD_WAIT_FOR_STARTING_TIME_ACK: |
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76 case RD_WAIT_FOR_STARTING_TIME_UACK: |
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77 TRACE_EVENT_P3("DL reassignment during starting time :%ld: dl_tfi=%d, st_dl_tfi=%d" |
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78 ,grlc_data->dl_tbf_start_time |
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79 ,grlc_data->dl_tfi |
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80 ,grlc_data->start_fn_dl_tfi); |
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81 |
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82 |
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83 /*lint -fallthrough*/ |
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84 |
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85 case RD_NULL: |
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86 rd_tbf_init(); |
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87 if(grlc_data->rd.rlc_mode EQ CGRLC_RLC_MODE_ACK) |
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88 { |
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89 SET_STATE(RD,RD_WAIT_FOR_STARTING_TIME_ACK); |
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90 } |
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91 else |
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92 { |
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93 SET_STATE(RD,RD_WAIT_FOR_STARTING_TIME_UACK); |
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94 } |
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95 grlc_data->dl_index = 1; |
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96 grlc_data->tbf_ctrl[grlc_data->dl_index].tbf_type = TBF_TYPE_DL; |
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97 grlc_data->tbf_ctrl[grlc_data->dl_index].tfi = grlc_data->dl_tfi; |
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98 grlc_data->tbf_ctrl[grlc_data->dl_index].pdu_cnt = 0; |
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99 grlc_data->tbf_ctrl[grlc_data->dl_index].rlc_oct_cnt = 0; |
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100 grlc_data->tbf_ctrl[grlc_data->dl_index].cnt_ts = 0; |
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101 grlc_data->tbf_ctrl[grlc_data->dl_index].ack_cnt = 0; |
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102 grlc_data->tbf_ctrl[grlc_data->dl_index].fbi = 0; |
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103 grlc_data->tbf_ctrl[grlc_data->dl_index].ret_bsn = 0; |
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104 |
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105 grlc_data->rd.ack_ctrl.cnt_meas_rpt = ACK_CNT_MEAS_RPT_FIRST; |
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106 grlc_data->rd.ack_ctrl.cnt_other = ACK_CNT_NORMAL; |
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107 break; |
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108 case RD_ACK: |
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109 case RD_UACK: |
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110 vsi_t_stop(GRLC_handle,T3190); |
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111 vsi_t_start(GRLC_handle,T3190,T3190_VALUE); |
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112 grlc_data->rd.next_tbf_params = grlc_data->downlink_tbf; |
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113 grlc_data->rd.v_next_tbf_params = TRUE; |
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114 TRACE_EVENT_P3("dl tbf reassignment with tfi %d, nts=%d tbf_st_time=%ld" |
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115 ,grlc_data->dl_tfi |
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116 ,grlc_data->downlink_tbf.nts |
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117 ,grlc_data->dl_tbf_start_time); |
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118 break; |
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119 default: |
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120 TRACE_ERROR( "SIG_TM_RD_ASSIGN unexpected" ); |
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121 { |
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122 TRACE_EVENT_P2("DL ASS: state=%d t3192=%d " |
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123 ,grlc_data->rd.state |
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124 ,grlc_data->downlink_tbf.t3192_val ); |
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125 } |
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126 break; |
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127 } |
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128 } /* sig_tm_rd_assign() */ |
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129 |
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130 |
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131 |
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132 /* |
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133 +------------------------------------------------------------------------------ |
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134 | Function : sig_tm_rd_abrel |
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135 +------------------------------------------------------------------------------ |
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136 | Description : Handles the internal signal SIG_TM_RD_ABREL |
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137 | |
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138 | Parameters : dummy - description of parameter dummy |
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139 | |
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140 +------------------------------------------------------------------------------ |
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141 */ |
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142 GLOBAL void sig_tm_rd_abrel ( ULONG fn, BOOL poll) |
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143 { |
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144 TRACE_ISIG( "sig_tm_rd_abrel" ); |
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145 |
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146 switch( GET_STATE( RD ) ) |
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147 { |
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148 case RD_ACK: |
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149 case RD_REL_ACK: |
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150 case RD_UACK: |
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151 case RD_REL_UACK: |
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152 case RD_NET_REL: |
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153 case RD_WAIT_FOR_STARTING_TIME_ACK: |
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154 case RD_WAIT_FOR_STARTING_TIME_UACK: |
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155 vsi_t_stop(GRLC_handle,T3190); |
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156 vsi_t_stop(GRLC_handle,T3192); |
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157 |
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158 rd_free_desc_list_partions(); |
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159 rd_free_database_partions(); |
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160 |
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161 grlc_data->tbf_ctrl[grlc_data->dl_index].vs_vr = grlc_data->rd.vr; |
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162 grlc_data->tbf_ctrl[grlc_data->dl_index].va_vq = grlc_data->rd.vq; |
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163 grlc_trace_tbf_par ( grlc_data->dl_index ); |
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164 |
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165 if(!poll) |
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166 { |
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167 /* |
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168 * abnormal release: abort TBF |
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169 */ |
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170 SET_STATE(RD,RD_NULL); |
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171 } |
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172 else |
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173 { |
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174 SET_STATE(RD,RD_NET_REL); |
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175 grlc_data->rd.fn_p_tbf_rel = fn; |
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176 TRACE_EVENT_P2("p. tbf rel c_fn=%ld poll_fn=%d",fn,grlc_data->rd.fn_p_tbf_rel); |
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177 } |
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178 break; |
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179 default: |
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180 TRACE_ERROR( "SIG_TM_RD_ABREL unexpected" ); |
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181 break; |
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182 } |
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183 } /* sig_tm_rd_abrel() */ |
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184 |
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185 /* |
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186 +------------------------------------------------------------------------------ |
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187 | Function : sig_tm_rd_ul_req |
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188 +------------------------------------------------------------------------------ |
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189 | Description : Handles the internal signal SIG_TM_RD_UL_REQ |
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190 | |
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191 | Parameters : dummy - description of parameter dummy |
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192 | |
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193 +------------------------------------------------------------------------------ |
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194 */ |
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195 GLOBAL void sig_tm_rd_ul_req ( void) |
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196 { |
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197 TRACE_ISIG( "sig_tm_rd_ul_req" ); |
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198 |
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199 switch( GET_STATE( RD ) ) |
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200 { |
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201 case RD_ACK: |
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202 case RD_REL_ACK: |
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203 case RD_UACK: |
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204 case RD_REL_UACK: |
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205 case RD_WAIT_FOR_STARTING_TIME_ACK: |
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206 case RD_WAIT_FOR_STARTING_TIME_UACK: |
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207 grlc_data->rd.channel_req = TRUE; |
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208 break; |
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209 default: |
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210 TRACE_ERROR( "SIG_TM_RD_UL_REQ unexpected" ); |
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211 break; |
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212 } |
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213 } /* sig_tm_rd_ul_req() */ |
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214 |
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215 |
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216 /* |
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217 +------------------------------------------------------------------------------ |
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218 | Function : sig_tm_rd_ul_req_stop |
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219 +------------------------------------------------------------------------------ |
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220 | Description : Handles the internal signal SIG_TM_RD_UL_REQ_STOP: No packet |
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221 | channel description shall be sent in packet downlink ack/nack, |
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222 | because a valid packet uplink assignment is received |
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223 | |
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224 | Parameters : dummy - description of parameter dummy |
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225 | |
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226 +------------------------------------------------------------------------------ |
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227 */ |
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228 GLOBAL void sig_tm_rd_ul_req_stop ( void) |
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229 { |
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230 TRACE_ISIG( "sig_tm_rd_ul_req_stop" ); |
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231 /* |
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232 * do it in every state |
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233 */ |
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234 grlc_data->rd.channel_req = FALSE; |
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235 |
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236 } /* sig_tm_rd_ul_req_stop() */ |
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237 |
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238 /* |
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239 +------------------------------------------------------------------------------ |
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240 | Function : sig_tm_rd_nor_rel |
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241 +------------------------------------------------------------------------------ |
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242 | Description : Handles the internal signal SIG_TM_RD_NOR_REL |
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243 | |
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244 | Parameters : dummy - description of parameter dummy |
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245 | |
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246 +------------------------------------------------------------------------------ |
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247 */ |
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248 GLOBAL void sig_tm_rd_nor_rel ( void) |
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249 { |
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250 TRACE_ISIG( "sig_tm_rd_nor_rel" ); |
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251 |
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252 switch( GET_STATE( RD ) ) |
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253 { |
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254 case RD_NULL: |
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255 case RD_ACK: |
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256 case RD_REL_ACK: |
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257 case RD_UACK: |
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258 case RD_REL_UACK: |
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259 case RD_NET_REL: |
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260 case RD_WAIT_FOR_STARTING_TIME_ACK: |
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261 case RD_WAIT_FOR_STARTING_TIME_UACK: |
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262 SET_STATE(RD,RD_NULL); |
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263 vsi_t_stop(GRLC_handle,T3190); |
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264 vsi_t_stop(GRLC_handle,T3192); |
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265 grlc_data->tbf_ctrl[grlc_data->dl_index].vs_vr = grlc_data->rd.vr; |
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266 grlc_data->tbf_ctrl[grlc_data->dl_index].va_vq = grlc_data->rd.vq; |
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267 grlc_trace_tbf_par ( grlc_data->dl_index ); |
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268 break; |
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269 default: |
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270 TRACE_ERROR( "SIG_TM_RD_NOR_REL unexpected" ); |
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271 break; |
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272 } |
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273 } /* sig_tm_rd_nor_rel() */ |
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274 |
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275 |
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276 |
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277 |
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278 |
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279 /* |
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280 +------------------------------------------------------------------------------ |
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281 | Function : sig_gff_rd_mac_ready_ind |
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282 +------------------------------------------------------------------------------ |
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283 | Description : Handles the Signal sig_gff_rd_mac_ready_ind |
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284 | |
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285 | Parameters : *mac_dl_ready_ind - Ptr to primitive MAC_READY_IND |
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286 | |
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287 +------------------------------------------------------------------------------ |
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288 */ |
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289 GLOBAL void sig_gff_rd_mac_ready_ind ( T_MAC_READY_IND * mac_dl_ready_ind) |
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290 { |
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291 UBYTE *ptr_block=NULL; |
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292 ULONG delta_fn; |
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293 |
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294 TRACE_ISIG( "sig_gff_rd_mac_ready_ind" ); |
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295 |
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296 |
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297 grlc_data->tbf_ctrl[grlc_data->dl_index].end_fn = mac_dl_ready_ind->fn; |
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298 |
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299 grlc_handle_poll_pos (mac_dl_ready_ind->fn); |
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300 delta_fn = rd_calc_delta_fn(mac_dl_ready_ind->fn); |
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301 |
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302 switch( GET_STATE( RD ) ) |
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303 { |
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304 case RD_WAIT_FOR_STARTING_TIME_ACK: |
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305 case RD_WAIT_FOR_STARTING_TIME_UACK: |
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306 if(!grlc_check_if_tbf_start_is_elapsed ( grlc_data->dl_tbf_start_time, mac_dl_ready_ind->fn)) |
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307 { |
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308 TRACE_EVENT_P2("WAIT FOR DL STARTING TIME, UL IS RUNNING st=%ld fn=%ld",grlc_data->dl_tbf_start_time |
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309 ,mac_dl_ready_ind->fn); |
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parents:
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310 grlc_send_rem_poll_pos (mac_dl_ready_ind->fn); |
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311 return; |
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312 } |
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parents:
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313 if(grlc_data->rd.rlc_mode EQ CGRLC_RLC_MODE_ACK) |
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314 { |
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parents:
diff
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|
315 SET_STATE(RD,RD_ACK); |
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diff
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316 } |
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317 else |
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|
318 { |
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319 SET_STATE(RD,RD_UACK); |
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parents:
diff
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|
320 } |
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parents:
diff
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|
321 grlc_data->tbf_ctrl[grlc_data->dl_index].start_fn = mac_dl_ready_ind->fn; |
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322 |
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parents:
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|
323 TRACE_EVENT_P6("DL first call at fn = %ld (%ld) with tfi=%d, dl_mask=%x tbf_st_time=%ld ta=%d", |
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parents:
diff
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|
324 mac_dl_ready_ind->fn, |
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parents:
diff
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|
325 mac_dl_ready_ind->fn%42432, |
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parents:
diff
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|
326 grlc_data->dl_tfi, |
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parents:
diff
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|
327 grlc_data->dl_tn_mask, |
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parents:
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|
328 grlc_data->dl_tbf_start_time, |
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parents:
diff
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|
329 grlc_data->ta_value); |
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parents:
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330 rd_cgrlc_st_time_ind(); |
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331 vsi_t_start(GRLC_handle,T3190,T3190_VALUE); |
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|
332 |
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parents:
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333 /*lint -fallthrough*/ |
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parents:
diff
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|
334 |
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parents:
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|
335 case RD_ACK: |
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parents:
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336 case RD_REL_ACK: |
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337 case RD_UACK: |
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338 case RD_REL_UACK: |
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339 if(grlc_data->rd.v_next_tbf_params AND |
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parents:
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340 grlc_check_if_tbf_start_is_elapsed ( grlc_data->dl_tbf_start_time, mac_dl_ready_ind->fn)) |
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341 { |
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diff
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342 grlc_data->rd.v_next_tbf_params = FALSE; |
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parents:
diff
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|
343 rd_cgrlc_st_time_ind(); |
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344 vsi_t_start(GRLC_handle,T3190,T3190_VALUE); |
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|
345 } |
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346 if(grlc_data->rd.ch_req_in_ack_prog AND mac_dl_ready_ind->last_poll_resp) |
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|
347 { |
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348 grlc_data->rd.channel_req = TRUE; |
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|
349 } |
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350 else if(grlc_data->rd.ch_req_in_ack_prog) |
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parents:
diff
changeset
|
351 { |
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parents:
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|
352 sig_rd_tm_ul_req_cnf(); |
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parents:
diff
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|
353 grlc_data->rd.ch_req_in_ack_prog = FALSE; |
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parents:
diff
changeset
|
354 } |
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parents:
diff
changeset
|
355 |
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parents:
diff
changeset
|
356 |
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|
357 if(grlc_data->rd.release_tbf) |
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diff
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|
358 { |
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diff
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|
359 /* |
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parents:
diff
changeset
|
360 * Packet downlink ack/nack with final ack bit set to 1 was programmed |
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parents:
diff
changeset
|
361 */ |
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parents:
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changeset
|
362 grlc_data->rd.release_tbf = FALSE; |
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parents:
diff
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|
363 if(mac_dl_ready_ind->last_poll_resp EQ 0) |
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parents:
diff
changeset
|
364 { |
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parents:
diff
changeset
|
365 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
366 * Transmission from L1 confirmed |
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parents:
diff
changeset
|
367 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
368 grlc_data->rd.cnt_sent_f_ack++; |
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parents:
diff
changeset
|
369 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
370 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
371 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
372 |
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parents:
diff
changeset
|
373 |
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parents:
diff
changeset
|
374 if( grlc_data->rd.f_ack_ind AND |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
375 (grlc_data->rd.fn_p_tbf_rel NEQ 0xFFFFFFFF) AND |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
376 grlc_check_if_tbf_start_is_elapsed ( grlc_data->rd.fn_p_tbf_rel, mac_dl_ready_ind->fn)) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
377 { |
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parents:
diff
changeset
|
378 /* |
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parents:
diff
changeset
|
379 * no addtional final downlink ack with fbi requested by the network |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
380 * T3192 can be started |
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parents:
diff
changeset
|
381 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
382 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
383 vsi_t_stop(GRLC_handle,T3190); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
384 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
385 if(grlc_data->rd.cnt_sent_f_ack) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
386 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
387 /* |
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parents:
diff
changeset
|
388 * it is only a retransmission of the final dl ack. |
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parents:
diff
changeset
|
389 * Therefore t3192 is restarted, no offset is needed |
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parents:
diff
changeset
|
390 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
391 vsi_t_start(GRLC_handle,T3192, T3192_Values[grlc_data->downlink_tbf.t3192_val]); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
392 TRACE_EVENT_P3("T3192 started: rel_fn=%ld fn=%ld T3192=%d",grlc_data->rd.fn_p_tbf_rel,mac_dl_ready_ind->fn,grlc_data->downlink_tbf.t3192_val); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
393 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
394 else |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
395 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
396 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
397 * the first final dl ack is not retransmitted, therefore retransmission is required. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
398 * start t3190 and wait for new poll position |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
399 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
400 vsi_t_start(GRLC_handle,T3190,T3190_VALUE); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
401 TRACE_EVENT_P1("NO DL REL: ret needed T3190 is running %d",grlc_data->rd.cnt_sent_f_ack); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
402 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
403 grlc_data->rd.fn_p_tbf_rel = 0xFFFFFFFF; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
404 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
405 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
406 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
407 if( (delta_fn EQ 4) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
408 OR |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
409 (delta_fn EQ 5)) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
410 { |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
411 UBYTE i=0; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
412 UBYTE index; |
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parents:
diff
changeset
|
413 while(grlc_data->next_poll_array[grlc_data->poll_start_tbf].cnt |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
414 AND |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
415 (i<8)) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
416 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
417 if(grlc_data->next_poll_array[grlc_data->poll_start_tbf].poll_type[i] EQ CGRLC_POLL_DATA) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
418 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
419 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
420 * poll positon in next frame present, |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
421 * counter for for poll postions in one frame |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
422 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
423 if( grlc_data->rd.channel_req OR /* uplink request */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
424 grlc_data->rd.next_poll_block EQ NEXT_POLL_BLOCK_DL_DATA OR /* last poll block was not ack nack */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
425 grlc_data->rd.f_ack_ind OR /* final ack indicator */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
426 !tm_is_ctrl_blk_rdy |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
427 ( grlc_data->rd.ack_ctrl.cnt_meas_rpt, |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
428 grlc_data->rd.ack_ctrl.cnt_other ) ) /* no ctrl message */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
429 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
430 if ( !((grlc_data->rd.rlc_mode EQ CGRLC_RLC_MODE_UACK) AND grlc_data->rd.f_ack_ind) ) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
431 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
432 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
433 * sent downlink ack/nack |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
434 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
435 ptr_block = rd_set_acknack(); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
436 sig_rd_meas_qual_rpt_sent( ); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
437 grlc_data->tbf_ctrl[grlc_data->dl_index].ack_cnt++; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
438 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
439 if( grlc_data->rd.ack_ctrl.cnt_meas_rpt > 0 ) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
440 grlc_data->rd.ack_ctrl.cnt_meas_rpt--; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
441 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
442 if( grlc_data->rd.ack_ctrl.cnt_other > 0 ) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
443 grlc_data->rd.ack_ctrl.cnt_other--; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
444 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
445 grlc_send_normal_burst(ptr_block, NULL, i); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
446 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
447 else |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
448 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
449 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
450 * unacknowledged mode, send packet control acknowledgment |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
451 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
452 if(grlc_data->burst_type EQ CGRLC_BURST_TYPE_NB) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
453 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
454 ptr_block = grlc_set_packet_ctrl_ack(); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
455 grlc_send_normal_burst(ptr_block, NULL, i); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
456 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
457 else |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
458 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
459 /* send access burst. */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
460 grlc_send_access_burst(i); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
461 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
462 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
463 grlc_data->rd.next_poll_block = NEXT_POLL_BLOCK_CTRL; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
464 if(grlc_data->rd.f_ack_ind) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
465 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
466 grlc_data->rd.release_tbf = TRUE; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
467 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
468 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
469 else |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
470 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
471 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
472 * sent control block |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
473 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
474 ptr_block = tm_get_ctrl_blk( &index, TRUE ); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
475 grlc_send_normal_burst(NULL, ptr_block, i); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
476 grlc_data->rd.next_poll_block = NEXT_POLL_BLOCK_DL_DATA; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
477 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
478 if( grlc_data->rd.ack_ctrl.cnt_meas_rpt EQ 0 ) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
479 grlc_data->rd.ack_ctrl.cnt_meas_rpt = ACK_CNT_NORMAL; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
480 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
481 if( grlc_data->rd.ack_ctrl.cnt_other EQ 0 ) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
482 grlc_data->rd.ack_ctrl.cnt_other = ACK_CNT_NORMAL; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
483 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
484 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
485 i++; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
486 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
487 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
488 grlc_send_rem_poll_pos(mac_dl_ready_ind->fn); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
489 break; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
490 case RD_NET_REL: |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
491 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
492 * send packet control acknowledgement and abort TBF |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
493 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
494 grlc_send_rem_poll_pos(mac_dl_ready_ind->fn); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
495 if(grlc_data->rd.release_tbf) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
496 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
497 SET_STATE(RD,RD_NULL); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
498 grlc_data->rd.release_tbf = FALSE; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
499 TRACE_EVENT_P2("poll sent after packet tbf release(DL): current_fn=%ld rel_fn=%ld", |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
500 mac_dl_ready_ind->fn, |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
501 grlc_data->rd.fn_p_tbf_rel); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
502 sig_rd_tm_end_of_tbf(FALSE); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
503 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
504 if(grlc_check_if_tbf_start_is_elapsed ( grlc_data->rd.fn_p_tbf_rel, mac_dl_ready_ind->fn)) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
505 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
506 grlc_data->rd.release_tbf = TRUE; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
507 TRACE_EVENT_P2("wait for poll confirm after packet tbf release(DL) current_fn=%ld rel_fn=%ld", |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
508 mac_dl_ready_ind->fn, |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
509 grlc_data->rd.fn_p_tbf_rel); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
510 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
511 break; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
512 default: |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
513 TRACE_ERROR( "SIG_GFF_RD_MAC_READY_IND unexpected" ); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
514 break; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
515 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
516 } /* sig_gff_rd_mac_ready_ind() */ |
219afcfc6250
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|
517 |
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diff
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|
518 |
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diff
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|
519 |
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parents:
diff
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|
520 |
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|
521 /* |
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|
522 +------------------------------------------------------------------------------ |
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diff
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|
523 | Function : sig_gff_rd_data |
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parents:
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|
524 +------------------------------------------------------------------------------ |
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parents:
diff
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|
525 | Description : Handles the SIGNAL sig_gff_rd_data |
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parents:
diff
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|
526 | |
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parents:
diff
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|
527 | Parameters : fn - current frame number |
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parents:
diff
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528 | tn - current timeslot number |
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diff
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529 | block_status - current block_status |
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parents:
diff
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|
530 | sp - sp bit of mac header. |
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parents:
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|
531 | bsn - bsn number |
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parents:
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|
532 | fbi - fbi bit |
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parents:
diff
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|
533 | e_bit - e bit |
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parents:
diff
changeset
|
534 | ptr_dl_block - pointer to the dl data block |
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parents:
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|
535 +------------------------------------------------------------------------------ |
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|
536 */ |
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parents:
diff
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|
537 GLOBAL void sig_gff_rd_data (ULONG fn, UBYTE tn, USHORT block_status,UBYTE rrbp,UBYTE sp,UBYTE bsn,UBYTE fbi,UBYTE e_bit, UBYTE * ptr_dl_block) |
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parents:
diff
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|
538 { |
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parents:
diff
changeset
|
539 UBYTE bsn_l; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
540 UBYTE diff; |
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parents:
diff
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|
541 BOOL InRange; |
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parents:
diff
changeset
|
542 BOOL li_correct; |
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parents:
diff
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|
543 T_CODING_SCHEME old_cs_type; |
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parents:
diff
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|
544 |
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parents:
diff
changeset
|
545 |
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parents:
diff
changeset
|
546 TRACE_FUNCTION( "sig_gff_rd_data" ); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
547 |
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parents:
diff
changeset
|
548 |
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parents:
diff
changeset
|
549 grlc_data->tbf_ctrl[grlc_data->dl_index].cnt_ts++; |
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parents:
diff
changeset
|
550 |
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parents:
diff
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|
551 |
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parents:
diff
changeset
|
552 /* |
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parents:
diff
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|
553 * TESTMODE B |
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parents:
diff
changeset
|
554 */ |
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parents:
diff
changeset
|
555 if (grlc_data->testmode.mode EQ CGRLC_LOOP) |
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parents:
diff
changeset
|
556 { |
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parents:
diff
changeset
|
557 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
558 * If the downlink TBF is established on more than one timeslot, the MS shall transmit in |
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parents:
diff
changeset
|
559 * the second uplink timeslot (if present) RLC/MAC blocks received on the second downlink |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
560 * timeslot, and shall transmit in the third uplink timeslot (if present) RLC/MAC blocks |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
561 * received in the third downlink timeslot and so on. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
562 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
563 if (grlc_data->downlink_tbf.nts > 1) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
564 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
565 if (tn - grlc_data->testmode.dl_ts_offset) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
566 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
567 grlc_data->testmode.rec_data[1].block_status = block_status; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
568 grlc_data->testmode.rec_data[1].e_bit = e_bit; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
569 memcpy(grlc_data->testmode.rec_data[1].payload,ptr_dl_block,50); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
570 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
571 else |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
572 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
573 grlc_data->testmode.rec_data[0].block_status = block_status; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
574 grlc_data->testmode.rec_data[0].e_bit = e_bit; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
575 memcpy(grlc_data->testmode.rec_data[0].payload,ptr_dl_block,50); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
576 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
577 } |
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parents:
diff
changeset
|
578 else |
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parents:
diff
changeset
|
579 { |
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parents:
diff
changeset
|
580 grlc_data->testmode.rec_data[0].block_status = block_status; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
581 grlc_data->testmode.rec_data[0].e_bit = e_bit; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
582 memcpy(grlc_data->testmode.rec_data[0].payload,ptr_dl_block,50); |
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parents:
diff
changeset
|
583 } |
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parents:
diff
changeset
|
584 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
585 grlc_data->rd.f_ack_ind = rd_check_fbi(fbi,sp,fn,rrbp); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
586 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
587 vsi_t_stop(GRLC_handle,T3190); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
588 vsi_t_start(GRLC_handle,T3190,T3190_VALUE); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
589 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
590 TRACE_EVENT_P6("DL DATA in testmode B at fn=%ld: bsn =%d, bs=%d,e_bit=%d, fbi=%d sp=%d " |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
591 ,fn |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
592 ,bsn |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
593 ,block_status |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
594 ,grlc_data->testmode.rec_data[0].e_bit |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
595 ,fbi |
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parents:
diff
changeset
|
596 ,sp); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
597 return; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
598 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
599 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
600 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
601 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
602 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
603 /******************************************************************************************/ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
604 #if defined (_SIMULATION_) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
605 TRACE_EVENT_P1("DL DATA bsn= %d",bsn); |
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parents:
diff
changeset
|
606 #endif /* defined (_SIMULATION_) */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
607 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
608 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
609 if(grlc_data->rd.vq NEQ grlc_data->rd.vr) |
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parents:
diff
changeset
|
610 { |
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parents:
diff
changeset
|
611 TRACE_EVENT_P5("wait for neg acked blocks :bsn=%d vr=%d vq=%d fbi=%d fn=%ld", |
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parents:
diff
changeset
|
612 bsn, |
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parents:
diff
changeset
|
613 grlc_data->rd.vr, |
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parents:
diff
changeset
|
614 grlc_data->rd.vq, |
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parents:
diff
changeset
|
615 fbi, |
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parents:
diff
changeset
|
616 fn); |
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parents:
diff
changeset
|
617 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
618 /******************************************************************************************/ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
619 old_cs_type = grlc_data->rd.cs_type; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
620 switch( GET_STATE( RD ) ) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
621 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
622 case RD_WAIT_FOR_STARTING_TIME_ACK: |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
623 SET_STATE(RD,RD_ACK); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
624 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
625 /*lint -fallthrough*/ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
626 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
627 case RD_ACK : |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
628 vsi_t_stop(GRLC_handle,T3190); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
629 vsi_t_start(GRLC_handle,T3190,T3190_VALUE); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
630 bsn_l = bsn; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
631 InRange = rd_check_window_size(bsn_l); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
632 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
633 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
634 if( !InRange OR (grlc_data->rd.vn[bsn_l & WIN_MOD] EQ VN_RECEIVED)) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
635 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
636 grlc_data->tbf_ctrl[grlc_data->dl_index].ret_bsn++; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
637 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
638 if( fbi AND |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
639 !grlc_data->rd.f_ack_ind AND |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
640 ((bsn_l+1) & 0x7F) EQ grlc_data->rd.vr) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
641 { /* WORKAROUND FOR NORTEL, fbi bit is modified , only possible for last bsn*/ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
642 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
643 grlc_data->rd.f_ack_ind=rd_check_fbi(fbi,sp,fn,rrbp); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
644 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
645 TRACE_EVENT_P8("fbi modification in ret bsn=%d,vr=%d,vq=%d,sp=%d,fbi=%d,e=%d ptr[0]=%x,ptr[1]=%x", |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
646 bsn_l, |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
647 grlc_data->rd.vr, |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
648 grlc_data->rd.vq, |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
649 sp, |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
650 fbi, |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
651 e_bit, |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
652 ptr_dl_block[0], |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
653 ptr_dl_block[1]); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
654 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
655 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
656 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
657 return; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
658 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
659 grlc_data->rd.rlc_data_len = rd_calc_rlc_data_len(block_status); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
660 li_correct = rd_read_li_m_of_block(ptr_dl_block, |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
661 e_bit); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
662 if((old_cs_type NEQ grlc_data->rd.cs_type) AND |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
663 (old_cs_type NEQ CS_ZERO)) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
664 { |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
665 TRACE_EVENT_P3("DL CS TYPE CHANGED from %d to %d, bsn=%d",old_cs_type,grlc_data->rd.cs_type,bsn_l); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
666 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
667 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
668 if(!li_correct) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
669 { |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
670 grlc_data->rd.vn[bsn_l & WIN_MOD] = VN_INVALID; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
671 TRACE_ERROR( "LI field is longer than RLC data block" ); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
672 return; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
673 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
674 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
675 /* |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
676 * compute receive parameter |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
677 */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
678 rd_comp_rec_par(bsn_l); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
679 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
680 rd_save_block( bsn_l, &(ptr_dl_block[grlc_data->rd.li_cnt]), |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
681 fbi ); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
682 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
683 #if defined (_SIMULATION_) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
684 TRACE_EVENT_P1("first_ptr= %ld",grlc_data->rd.data_array[bsn_l & WIN_MOD].first); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
685 #endif /* defined (_SIMULATION_) */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
686 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
687 diff = (grlc_data->rd.vq - bsn_l) & 0x7F; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
688 while( ( diff <= WIN_SIZE) AND |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
689 (grlc_data->rd.vq NEQ bsn_l) AND |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
690 (grlc_data->rd.vn[bsn_l & WIN_MOD] EQ VN_RECEIVED ) ) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
691 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
692 rd_send_grlc_data_ind(bsn_l); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
693 bsn_l = (bsn_l+1) & 0x7F; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
694 diff = (grlc_data->rd.vq - bsn_l) & 0x7F; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
695 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
696 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
697 grlc_data->rd.f_ack_ind = rd_check_fbi(fbi,sp,fn,rrbp); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
698 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
699 break; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
700 case RD_REL_ACK : |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
701 /* |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
702 * all blocks are received, after sending p. dl ack nack timer t3192 will be restarted |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
703 */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
704 grlc_data->tbf_ctrl[grlc_data->dl_index].ret_bsn++; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
705 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
706 if(grlc_data->rd.f_ack_ind AND sp) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
707 { /* |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
708 * will be restarted at sending the dl ack nack: secure, in case of gaps. |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
709 * The value could be zero, therfore a offset is needed |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
710 */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
711 vsi_t_stop(GRLC_handle,T3192); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
712 grlc_data->rd.fn_p_tbf_rel = grlc_decode_tbf_start_rel(fn,(USHORT)(rrbp+3)); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
713 TRACE_EVENT_P3("FINAL DL ACK RETR REQIURED t3192=%d rel_fn=%ld c_fn=%ld ",grlc_data->downlink_tbf.t3192_val,grlc_data->rd.fn_p_tbf_rel,fn); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
714 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
715 /* TRACE_EVENT_P7("BLOCK DISCARDED WAIT FOR TBF RELEASE f_ack=%d bsn=%d sp=%d rrbp=%d vr=%d vq=%d t3192=%d" |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
716 ,grlc_data->rd.f_ack_ind |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
717 ,bsn |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
718 ,sp |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
719 ,rrbp |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
720 ,grlc_data->rd.vr |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
721 ,grlc_data->rd.vq |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
722 ,grlc_data->downlink_tbf.t3192_val); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
723 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
724 break; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
725 case RD_WAIT_FOR_STARTING_TIME_UACK: |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
726 SET_STATE(RD,RD_UACK); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
727 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
728 /*lint -fallthrough*/ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
729 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
730 case RD_UACK: |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
731 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
732 * After receiving each block the timer T3190 should be restarted. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
733 */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
734 vsi_t_stop(GRLC_handle,T3190); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
735 vsi_t_start(GRLC_handle,T3190,T3190_VALUE); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
736 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
737 if(!rd_check_window_size(bsn)) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
738 { |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
739 TRACE_EVENT_P3("UACK bsn outside window: bsn=%d vr=%d vq=%d",bsn,grlc_data->rd.vr,grlc_data->rd.vq); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
740 return; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
741 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
742 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
743 grlc_data->rd.rlc_data_len = rd_calc_rlc_data_len(block_status); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
744 li_correct = rd_read_li_m_of_block(ptr_dl_block, e_bit); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
745 if(!li_correct) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
746 { |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
747 TRACE_ERROR( "LI field is longer than RLC data block" ); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
748 return; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
749 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
750 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
751 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
752 * compute receive parameter |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
753 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
754 rd_comp_rec_par(bsn); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
755 rd_save_block( bsn, &(ptr_dl_block[grlc_data->rd.li_cnt]), fbi ); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
756 if(!grlc_data->rd.inSequence) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
757 rd_fill_blocks(bsn); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
758 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
759 rd_send_grlc_data_ind(bsn); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
760 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
761 grlc_data->rd.f_ack_ind = rd_check_fbi(fbi,sp,fn,rrbp); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
762 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
763 break; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
764 case RD_REL_UACK: |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
765 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
766 if(fbi AND sp) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
767 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
768 vsi_t_stop(GRLC_handle,T3192); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
769 grlc_data->rd.fn_p_tbf_rel = grlc_decode_tbf_start_rel(fn,(USHORT)(rrbp+3)); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
770 TRACE_EVENT_P4("data in REL_UACK restart t3192: bsn=%d t3192=%d fn=%ld rel_fn=%ld" |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
771 ,bsn |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
772 ,grlc_data->downlink_tbf.t3192_val |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
773 ,fn |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
774 ,grlc_data->rd.fn_p_tbf_rel); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
775 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
776 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
777 break; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
778 default: |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
779 TRACE_ERROR( "SIG_GFF_RD_DATA unexpected" ); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
780 break; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
781 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
782 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
783 } /* sig_gff_rd_data() */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
784 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
785 /* |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
786 +------------------------------------------------------------------------------ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
787 | Function : sig_ru_rd_get_downlink_release_state |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
788 +------------------------------------------------------------------------------ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
789 | Description : This function returns true if RD is in release state( if |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
790 | fbi=1 is received in dowonlink data block. |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
791 | |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
792 | Parameters : release_state |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
793 +------------------------------------------------------------------------------ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
794 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
795 GLOBAL void sig_ru_rd_get_downlink_release_state( BOOL *release_started) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
796 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
797 *release_started = FALSE ; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
798 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
799 if( (GET_STATE( RD ) EQ RD_REL_ACK ) OR |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
800 (GET_STATE( RD ) EQ RD_REL_UACK ) ) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
801 { |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
802 *release_started = TRUE; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
803 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
804 else if(GET_STATE( RD ) EQ RD_NULL ) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
805 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
806 TRACE_ERROR("ERROR:sig_ru_rd_get_downlink_release_state called in RD NULL state"); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
807 *release_started = TRUE; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
808 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
809 } |