FreeCalypso > hg > fc-magnetite
annotate cdg211/cdginc/p_dio.val @ 639:026c98f757a6
tpudrv12.h & targets/gtm900.h: our current support is for MGC2GSMT version only
As it turns out, there exist two different Huawei-made hw platforms both
bearing the marketing name GTM900-B: one is MG01GSMT, the other is MGC2GSMT.
The two are NOT fw-compatible: aside from flash chip differences which
should be handled by autodetection, the two hw platforms are already known
to have different RFFEs with different control signals, and there may be
other differences not yet known. Our current gtm900 build target is for
MGC2GSMT only; we do not yet have a specimen of MG01GSMT on hand, hence
no support for that version will be possible until and unless someone
provides one.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 30 Jan 2020 18:19:01 +0000 |
parents | 56abf6cf8a0b |
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rev | line source |
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1 /* |
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2 +--------------------------------------------------------------------------+ |
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3 | PROJECT : PROTOCOL STACK | |
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4 | FILE : p_dio.val | |
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5 | SOURCE : "__out__\g23m_dfile\prim\dio.pdf" | |
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6 | LastModified : "2004-03-19" | |
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7 | IdAndVersion : "..." | |
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8 | SrcFileTime : "Tue Jul 19 13:38:38 2005" | |
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9 | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:14 2007 | |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | |
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11 +--------------------------------------------------------------------------+ |
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12 */ |
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13 |
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14 /* PRAGMAS |
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15 * PREFIX : NONE |
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX) |
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO |
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18 * ENABLE_GROUP: NO |
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19 * CAPITALIZE_TYPENAME: NO |
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20 */ |
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21 |
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22 |
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23 #ifndef P_DIO_VAL |
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24 #define P_DIO_VAL |
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25 |
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26 |
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27 #define CDG_ENTER__P_DIO_VAL |
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28 |
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29 #define CDG_ENTER__FILENAME _P_DIO_VAL |
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30 #define CDG_ENTER__P_DIO_VAL__FILE_TYPE CDGINC |
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31 #define CDG_ENTER__P_DIO_VAL__LAST_MODIFIED _2004_03_19 |
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32 #define CDG_ENTER__P_DIO_VAL__ID_AND_VERSION _ |
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33 |
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34 #define CDG_ENTER__P_DIO_VAL__SRC_FILE_TIME _Tue_Jul_19_13_38_38_2005 |
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35 |
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36 #include "CDG_ENTER.h" |
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37 |
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38 #undef CDG_ENTER__P_DIO_VAL |
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39 |
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40 #undef CDG_ENTER__FILENAME |
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41 |
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42 |
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43 /* |
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44 * Value constants for VAL_baud_rate |
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45 */ |
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46 #define DIO4_BAUD_RESERVED (0x0) /* reserved value */ |
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47 #define DIO4_BAUD_AUTO (0x1) /* Automatic detected */ |
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48 #define DIO4_BAUD_75 (0x2) /* Transmission rate of 75 bits/sec */ |
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49 #define DIO4_BAUD_110 (0x4) /* Transmission rate of 110 bits/sec */ |
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50 #define DIO4_BAUD_150 (0x8) /* Transmission rate of 150 bits/sec */ |
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51 #define DIO4_BAUD_300 (0x10) /* Transmission rate of 300 bits/sec */ |
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52 #define DIO4_BAUD_600 (0x20) /* Transmission rate of 600 bits/sec */ |
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53 #define DIO4_BAUD_1200 (0x40) /* Transmission rate of 1200 bits/sec */ |
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54 #define DIO4_BAUD_2400 (0x80) /* Transmission rate of 2400 bits/sec */ |
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55 #define DIO4_BAUD_4800 (0x100) /* Transmission rate of 4800 bits/sec */ |
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56 #define DIO4_BAUD_7200 (0x200) /* Transmission rate of 7200 bits/sec */ |
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57 #define DIO4_BAUD_9600 (0x400) /* Transmission rate of 9600 bits/sec */ |
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58 #define DIO4_BAUD_14400 (0x800) /* Transmission rate of 14400 bits/sec */ |
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59 #define DIO4_BAUD_19200 (0x1000) /* Transmission rate of 19200 bits/se */ |
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60 #define DIO4_BAUD_28800 (0x2000) /* Transmission rate of 28800 bits/se */ |
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61 #define DIO4_BAUD_33900 (0x4000) /* Transmission rate of 33900 bits/se */ |
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62 #define DIO4_BAUD_38400 (0x8000) /* Transmission rate of 38400 bits/se */ |
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63 #define DIO4_BAUD_57600 (0x10000) /* Transmission rate of 57600 bits/se */ |
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64 #define DIO4_BAUD_115200 (0x20000) /* Transmission rate of 115200 bits/se */ |
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65 #define DIO4_BAUD_203125 (0x40000) /* Transmission rate of 203125 bits/se */ |
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66 #define DIO4_BAUD_230400 (0x80000) /* Transmission rate of 230400 bits/se */ |
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67 #define DIO4_BAUD_406250 (0x100000) /* Transmission rate of 406250 bits/se */ |
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68 #define DIO4_BAUD_460800 (0x200000) /* Transmission rate of460800 bits/se */ |
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69 #define DIO4_BAUD_812500 (0x400000) /* Transmission rate of 812500 bits/se */ |
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70 #define DIO4_BAUD_921600 (0x800000) /* Transmission rate of 921600 bits/se */ |
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71 |
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72 /* |
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73 * Value constants for VAL_dev_type |
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74 */ |
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75 #define DIO_DATA_MUX (0x200000) /* device can start a multiplexer */ |
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76 #define DIO_DATA_PKT (0x400000) /* device can contain packet data */ |
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77 #define DIO_DATA_SER (0x800000) /* device can contain serial data */ |
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78 #define DIO_DATA_SER_MUX (0xa0000) /* serial device which can start a multiplexer */ |
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79 #define DIO_TYPE_ID_MASK (0xff00) /* mask for dio identifier to separate different capability structs with the same combination */ |
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80 #define DIO_TYPE_DAT_MASK (0xff0000) /* mask for dio identifier to separate kind of data support */ |
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81 #define DIO_TYPE_SER (0x800100) /* Type for serial devices like UART */ |
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82 #define DIO_TYPE_SER_MUX (0xa00100) /* Type for serial devices like UART. It is possible to start a 27.010 multiplexer on devices of this type */ |
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83 #define DIO_TYPE_PKT (0x400100) /* Type for packet devices */ |
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84 |
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85 /* |
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86 * Value constants for VAL_char_frame |
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87 */ |
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88 #define DIO_CF_8N2 (0x1) /* 8 data bits; no parity bit; 2 stop bits */ |
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89 #define DIO_CF_8O1 (0x2) /* 8 data bits; odd parity bit; 1 stop bits */ |
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90 #define DIO_CF_8E1 (0x4) /* 8 data bits; even parity bit; 1 stop bits */ |
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91 #define DIO_CF_8M1 (0x8) /* 8 data bits; mark parity bit; 1 stop bits */ |
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92 #define DIO_CF_8S1 (0x10) /* 8 data bits; space parity bit; 1 stop bits */ |
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93 #define DIO_CF_8N1 (0x20) /* 8 data bits; no parity bit; 1 stop bits */ |
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94 #define DIO_CF_7N2 (0x40) /* 7 data bits; no parity bit; 2 stop bits */ |
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95 #define DIO_CF_7O1 (0x80) /* 7 data bits; odd parity bit; 1 stop bits */ |
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96 #define DIO_CF_7E1 (0x100) /* 7 data bits; even parity bit; 1 stop bits */ |
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97 #define DIO_CF_7M1 (0x200) /* 7 data bits; mark parity bit; 1 stop bits */ |
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98 #define DIO_CF_7S1 (0x400) /* 7 data bits; space parity bit;1 stop bits */ |
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99 #define DIO_CF_7N1 (0x800) /* 7 data bits; no parity bit; 1 stop bits */ |
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100 |
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101 /* |
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102 * Value constants for VAL_flow_control |
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103 */ |
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104 #define DIO_FLOW_NONE (0x1) /* Data transmit: None Data receive: None */ |
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105 #define DIO_FLOW_NO_XOFF (0x2) /* Data transmit: None Data receive: XON/XOFF */ |
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106 #define DIO_FLOW_NO_CTS (0x4) /* Data transmit: None Data receive: CTS */ |
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107 #define DIO_FLOW_XON_NO (0x8) /* Data transmit: local XON/XOFF Data receive: None */ |
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108 #define DIO_FLOW_XON_XOFF (0x10) /* Data transmit: local XON/XOFF Data receive: XON/XOFF */ |
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109 #define DIO_FLOW_XON_CTS (0x20) /* Data transmit: local XON/XOFF Data receive:CTS */ |
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110 #define DIO_FLOW_RTS_NO (0x40) /* Data transmit: RTS Data receive: None */ |
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111 #define DIO_FLOW_RTS_XOFF (0x80) /* Data transmit: RTS Data receive: XON/XOFF */ |
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112 #define DIO_FLOW_RTS_CTS (0x100) /* Data transmit: RTS Data receive: CTS */ |
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113 #define DIO_FLOW_XTR_NO (0x200) /* Data transmit: transparent XON/XOFF Data receive: None */ |
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114 #define DIO_FLOW_XTR_XOFF (0x400) /* Data transmit: transparent XON/XOFF Data receive: CTS */ |
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115 #define DIO_FLOW_XTR_CTS (0x800) /* Data transmit: transparent XON/XOFF Data receive: CTS */ |
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116 |
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117 /* |
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118 * Value constants for VAL_line_states |
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119 */ |
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120 #define LINE_STD_DCD_ON (0x1) /* b00000001 set line DCD on */ |
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121 #define LINE_STD_DCD_OFF (0x2) /* b00000010 set line DCD off */ |
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122 #define LINE_STD_RING_ON (0x4) /* b00000100 set line RING on */ |
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123 #define LINE_STD_RING_OFF (0x8) /* b00001000 set line RING off */ |
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124 #define LINE_STD_ESCD_IND (0x10) /* b00010000 escape sequence indication */ |
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125 #define LINE_STD_DTR_LDR (0x20) /* b00100000 DTR line drop indication */ |
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126 |
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127 /* |
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128 * Value constants for VAL_ser_flags |
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129 */ |
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130 #define DIO_FLAG_SER_ESC (0x80000000)/* device supports escape sequence detection */ |
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131 |
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132 /* |
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133 * Value constants for VAL_device |
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134 */ |
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135 #define DIO_DRV_MASK (0xff000000)/* mask for driver number to identify the driver */ |
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136 #define DIO_TYPE_MASK (0xffff00) /* mask for device type */ |
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137 #define DIO_DEVICE_MASK (0xff) /* mask for actual device number chosen by the driver */ |
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138 #define DIO_DRV_UART (0x0) /* UART driver */ |
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139 #define DIO_DRV_USB (0x1000000)/* USB driver */ |
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140 #define DIO_DRV_MUX (0x2000000)/* 27.010 multiplexer driver */ |
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141 #define DIO_DRV_PKT (0x3000000)/* packet driver */ |
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142 #define DIO_DRV_MCBSP (0x4000000)/* McBSP driver */ |
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143 #define DIO_DRV_APP (0x5000000)/* Application adapter */ |
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144 #define DIO_DRV_BAT (0x6000000)/* Binary Interface Adapter */ |
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145 |
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146 /* |
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147 * Value constants for VAL_dev_flag |
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148 */ |
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149 #define DIO_FLAG_SLEEP (0x80000000)/* device provides the feature power saving state */ |
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150 |
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151 /* |
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152 * Value constants for VAL_mux_mode |
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153 */ |
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154 #define DIO_MUX_BASIC (0x1) /* mux supports Basic option */ |
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155 #define DIO_MUX_UIH (0x2) /* mux supports Advanced option with UIH frames */ |
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156 #define DIO_MUX_UI (0x4) /* mux supports Advanced option with UI frames */ |
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157 #define DIO_MUX_I (0x8) /* mux supports Advanced option with I frames (error recovery) */ |
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158 |
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159 /* |
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160 * Value constants for VAL_contr_type |
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161 */ |
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162 #define DIO4_CTRL_LINES (0x1) /* control struct contains serial line states */ |
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163 #define DIO4_CTRL_MUX (0x2) /* control struct contains mux control parameter */ |
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164 |
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165 /* |
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166 * Value constants for VAL_dev_mode |
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167 */ |
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168 #define DIO_MODE_SER (0x1) /* device acts as serial device */ |
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169 #define DIO_MODE_MUX (0x2) /* device acts as 27.010 mux device */ |
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170 |
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171 /* |
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172 * Value constants for VAL_esc_char |
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173 */ |
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174 #define ESC_CHAR_DEFAULT (0x2b) /* default escape character ('+') */ |
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175 |
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176 /* |
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177 * Value constants for VAL_guard_per |
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178 */ |
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179 #define DIO_ESC_OFF (0x0) /* turn escape sequence detection off */ |
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180 #define DIO_GUARD_PER_DEFAULT (0x3e8) /* default value 1000ms */ |
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181 |
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182 /* |
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183 * Value constants for VAL_k |
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184 */ |
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185 #define K_DEFAULT (0x2) /* k default value */ |
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186 |
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187 /* |
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188 * Value constants for VAL_n1 |
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189 */ |
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190 #define MUX_N1_BASIC_DEFAULT (0x1f) /* default value for the basic option */ |
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191 #define MUX_N1_ADVANCED_DEFAULT (0x40) /* default value for the advanced option */ |
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192 |
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193 /* |
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194 * Value constants for VAL_n2 |
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195 */ |
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196 #define MUX_N2_DEFAULT (0x3) /* default number of retransmission */ |
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197 |
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198 /* |
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199 * Value constants for VAL_sleep_mode |
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200 */ |
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201 #define DIO_SLEEP_ENABLE (0x1) /* enter sleep mode if possible */ |
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202 #define DIO_SLEEP_DISABLE (0x2) /* do not enter sleep mode */ |
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203 |
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204 /* |
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205 * Value constants for VAL_cb_line_state |
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206 */ |
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207 #define DIO_SA (0x80000000)/* read/write: device ready */ |
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208 #define DIO_SB (0x40000000)/* read/write: data valid */ |
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209 #define DIO_X (0x20000000)/* read/write: flow control */ |
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210 #define DIO_RING (0x10000000)/* write: RING indicator */ |
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211 #define DIO_ESC (0x8000000)/* read: escape seqence detected */ |
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212 #define DIO_MUX_STOPPED (0x4000000)/* multiplexer stopped */ |
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213 #define DIO_BRK (0x2000000)/* read/write: break received/to be send */ |
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214 #define DIO_BRKLEN_MASK (0xff) /* read/write: length of break signal in character; only valid if DIO_BREAK bit is set to 1 */ |
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215 |
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216 /* |
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217 * Value constants for VAL_t1 |
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218 */ |
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219 #define MUX_T1_DEFAULT (0xa) /* default acknowledgement timer (100ms) */ |
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220 |
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221 /* |
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222 * Value constants for VAL_t2 |
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223 */ |
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224 #define MUX_T2_DEFAULT (0x1e) /* default response timer */ |
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225 |
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226 /* |
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227 * Value constants for VAL_t3 |
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228 */ |
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229 #define MUX_T3_DEFAULT (0xa) /* default wake up response timer (100ms) */ |
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230 |
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231 /* |
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232 * Value constants for VAL_xoff |
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233 */ |
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234 #define XOFF_DEFAULT (0x13) /* xoff default value */ |
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235 |
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236 /* |
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237 * Value constants for VAL_xon |
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238 */ |
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239 #define XON_DEFAULT (0x11) /* xon default value */ |
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240 |
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241 /* |
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242 * Value constants for VAL_start_mux |
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243 */ |
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244 #define DIO_MUX_DYNAMIC (0x0) /* Do not start the 27.010 multiplexer immediately. The multi-plexer may be started dynamically on runtime */ |
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245 #define DIO_MUX_START (0x1) /* Starts the 27.010 multiplexer permanently. The multiplexer can not be turned off during runtime */ |
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246 |
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247 #include "CDG_LEAVE.h" |
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248 |
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249 |
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250 #endif |