FreeCalypso > hg > fc-magnetite

annotate components/frame_na7_db_ir-full @ 639:026c98f757a6

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
tpudrv12.h & targets/gtm900.h: our current support is for MGC2GSMT version only As it turns out, there exist two different Huawei-made hw platforms both bearing the marketing name GTM900-B: one is MG01GSMT, the other is MGC2GSMT. The two are NOT fw-compatible: aside from flash chip differences which should be handled by autodetection, the two hw platforms are already known to have different RFFEs with different control signals, and there may be other differences not yet known. Our current gtm900 build target is for MGC2GSMT only; we do not yet have a specimen of MG01GSMT on hand, hence no support for that version will be possible until and unless someone provides one.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 30 Jan 2020 18:19:01 +0000
parents 41b6a18ffa0b
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
297
1b561dd0368b components/frame_na7_db_ir: comment fix
Mychaela Falconia <falcon@freecalypso.org>
parents: 296
diff changeset
1 # Building frame_na7_db_ir.lib using the GPF source bits we got with TCS3.2
552
92a3afcbccb9 frame_na7_db_{fl,ir} component recipes with full OSL rebuild
Mychaela Falconia <falcon@freecalypso.org>
parents: 502
diff changeset
2 # This version rebuilds the OSL part from our reconstructed source
295
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3
296
154011ef41b1 components/frame_na7_db_{fl,ir}: missed the -o3
Mychaela Falconia <falcon@freecalypso.org>
parents: 295
diff changeset
4 CFLAGS="-mw -x -pw2 -o3 -me -mt -g -mn"
295
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 # Defines
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 CPPFLAGS="-DNU_DEBUG -D_FF_RV_EXIST_ -DRUN_INT_RAM"
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9 CPPFLAGS="$CPPFLAGS -D_TARGET_ -D_NUCLEUS_"
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11 # Includes
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/frame"
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc/nuc"
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc/nuc/arm7"
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc"
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 CPPFLAGS="$CPPFLAGS -I$SRC/gpf2/tst"
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19 # Source modules
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 SRCDIR=$SRC/gpf3/frame
1aa8cab15e14 components/frame_na7_db_{fl,ir} created as an experiment
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22
574
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
23 cfile_symlink $SRCDIR/frame.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
24 cfile_symlink $SRCDIR/vsi_sem.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
25 cfile_symlink $SRCDIR/vsi_com.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
26 cfile_symlink $SRCDIR/vsi_mem.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
27 cfile_symlink $SRCDIR/vsi_tim.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
28 cfile_symlink $SRCDIR/vsi_mis.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
29 cfile_symlink $SRCDIR/vsi_drv.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
30 cfile_symlink $SRCDIR/vsi_trc.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
31 cfile_symlink $SRCDIR/vsi_pro.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
32 cfile_symlink $SRCDIR/xalert.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
33 cfile_symlink $SRCDIR/route.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
34 cfile_symlink $SRCDIR/prf_func.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
35 cfile_symlink $SRCDIR/frm_ext.c
41b6a18ffa0b GPF rebuild from source: symlink magic to fix __FILE__
Mychaela Falconia <falcon@freecalypso.org>
parents: 552
diff changeset
36 cfile_symlink $SRCDIR/frame_version.c
489
f89439ce0d45 OSL: os_com_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 297
diff changeset
37
f89439ce0d45 OSL: os_com_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 297
diff changeset
38 # OSL
f89439ce0d45 OSL: os_com_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 297
diff changeset
39
f89439ce0d45 OSL: os_com_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 297
diff changeset
40 # drop -o3
f89439ce0d45 OSL: os_com_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 297
diff changeset
41 CFLAGS="-mw -x -pw2 -o -me -mt -g -mn"
f89439ce0d45 OSL: os_com_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 297
diff changeset
42
f89439ce0d45 OSL: os_com_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 297
diff changeset
43 SRCDIR=$SRC/gpf2/osl
f89439ce0d45 OSL: os_com_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 297
diff changeset
44
f89439ce0d45 OSL: os_com_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 297
diff changeset
45 cfile_plain $SRCDIR/os_com_ir.c
494
e9bdc8184d50 OSL: os_mem_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 489
diff changeset
46 cfile_plain $SRCDIR/os_mem_ir.c
496
2d1e5ad1d54f OSL: os_mis_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 494
diff changeset
47 cfile_plain $SRCDIR/os_mis_ir.c
498
dfa8771e84b1 OSL: os_pro_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 496
diff changeset
48 cfile_plain $SRCDIR/os_pro_ir.c
500
094ecae40880 OSL: os_sem_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 498
diff changeset
49 cfile_plain $SRCDIR/os_sem_ir.c
502
b4dd8c7e84ce OSL: os_tim_ir.c compiles
Mychaela Falconia <falcon@freecalypso.org>
parents: 500
diff changeset
50 cfile_plain $SRCDIR/os_tim_ir.c