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annotate cdg-hybrid/cdginc/p_rrrrlp.val @ 605:07d0dc4431f4

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bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents e7a67accfad9
children
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1 /*
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2 +--------------------------------------------------------------------------+
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3 | PROJECT : PROTOCOL STACK |
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4 | FILE : p_rrrrlp.val |
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5 | SOURCE : "sap\rrrrlp.pdf" |
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6 | LastModified : "2002-09-10" |
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7 | IdAndVersion : "0000.000.00.002" |
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8 | SrcFileTime : "Thu Nov 29 09:53:22 2007" |
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9 | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
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11 +--------------------------------------------------------------------------+
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12 */
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13
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14 /* PRAGMAS
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15 * PREFIX : NONE
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO
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18 * ENABLE_GROUP: NO
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19 * CAPITALIZE_TYPENAME: NO
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20 */
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21
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23 #ifndef P_RRRRLP_VAL
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24 #define P_RRRRLP_VAL
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27 #define CDG_ENTER__P_RRRRLP_VAL
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28
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29 #define CDG_ENTER__FILENAME _P_RRRRLP_VAL
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30 #define CDG_ENTER__P_RRRRLP_VAL__FILE_TYPE CDGINC
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31 #define CDG_ENTER__P_RRRRLP_VAL__LAST_MODIFIED _2002_09_10
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32 #define CDG_ENTER__P_RRRRLP_VAL__ID_AND_VERSION _0000_000_00_002
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33
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34 #define CDG_ENTER__P_RRRRLP_VAL__SRC_FILE_TIME _Thu_Nov_29_09_53_22_2007
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35
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36 #include "CDG_ENTER.h"
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38 #undef CDG_ENTER__P_RRRRLP_VAL
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40 #undef CDG_ENTER__FILENAME
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43 /*
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44 * user defined constants
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45 */
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46 #define MAX_SDU_LEN (0x1)
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47 #define MAX_NCELL_L1 (0xc)
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48 #define MAX_NCELL_EOTD (0xf)
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49 #define MAX_NCELL_EOTD_SI (0x20)
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50
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51 #include "CDG_LEAVE.h"
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54 #endif