annotate cfg-headers/rv_swe-2091-fchg.h @ 605:07d0dc4431f4

bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents 5dea7e937c37
children
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5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
Mychaela Falconia <falcon@freecalypso.org>
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1 #ifndef __RV_SWE_H__
5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
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2 #define __RV_SWE_H__
5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
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5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
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4 #define RVM_AUDIO_SWE
5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
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5 #define RVM_ETM_SWE
5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
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6 #define RVM_DAR_SWE
5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
Mychaela Falconia <falcon@freecalypso.org>
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7 #define RVM_SPI_SWE
5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
Mychaela Falconia <falcon@freecalypso.org>
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8 #define RVM_LLS_SWE
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9 #define RVM_KPD_SWE
5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
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10 #define RVM_FCHG_SWE
5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
Mychaela Falconia <falcon@freecalypso.org>
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11 #define RVM_RTC_SWE
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12 #define RVM_FFS_SWE
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5dea7e937c37 cfg-headers/rv_swe-209[12]-fchg.h created
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14 #endif /* __RV_SWE_H__ */