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annotate components/main @ 605:07d0dc4431f4

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bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents a7ed7d4483b0
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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455ac12899fd main.lib rebuilt from source except for init.obj and mem_load.obj
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1 # Building main.lib
455ac12899fd main.lib rebuilt from source except for init.obj and mem_load.obj
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2
455ac12899fd main.lib rebuilt from source except for init.obj and mem_load.obj
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3 OBJS="../../$INIT_blob"
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4
455ac12899fd main.lib rebuilt from source except for init.obj and mem_load.obj
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5 # C modules
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6
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7 CFLAGS="-mn -mt -o -x -mw -me -pw2"
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8 CPPFLAGS="-DTOOL_CHOICE=0 -D_TMS470"
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9
455ac12899fd main.lib rebuilt from source except for init.obj and mem_load.obj
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10 # Includes
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11
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12 CPPFLAGS="$CPPFLAGS -I$SRC/cs/os/nucleus"
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13 CPPFLAGS="$CPPFLAGS -I.."
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14 CPPFLAGS="$CPPFLAGS -I../config"
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15 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc"
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16 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/frame/cust_os"
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17 CPPFLAGS="$CPPFLAGS -I$SRC/cs/system"
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18 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera"
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19 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera/rv"
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20 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core"
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21 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb"
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22 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio"
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23 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm"
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24 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf"
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25 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma"
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26 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld"
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27 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth"
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28 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif"
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29 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea"
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30 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security"
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31 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi"
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32 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer"
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33 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart"
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34 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd"
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35 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app"
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36 CPPFLAGS="$CPPFLAGS -I$SRC/cs/services"
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37 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_cust0"
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38 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_include"
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39 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/cust0"
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40 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/hmacs"
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41 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/include"
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42 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/p_include"
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43 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_include"
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44 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_cust0"
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45 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/dyn_dwl_include"
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46 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/p_source0"
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47 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source0"
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48 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source"
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49
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838eeafb0051 Main and Audio source directories lowercased
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50 SRCDIR=$SRC/cs/system/main
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51
455ac12899fd main.lib rebuilt from source except for init.obj and mem_load.obj
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52 cfile_plain $SRCDIR/create_RVtasks.c
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53 cfile_plain $SRCDIR/main.c
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54 cfile_plain $SRCDIR/sys_dummy.c
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55
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56 OBJS="$OBJS ../../blobs/obj/main/mem_load.obj"
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57
455ac12899fd main.lib rebuilt from source except for init.obj and mem_load.obj
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58 # Assembly module
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59
455ac12899fd main.lib rebuilt from source except for init.obj and mem_load.obj
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60 ASMFLAGS=-me
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61 ASMFLAGS="$ASMFLAGS -dBOARD=41"
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30203d5aeb74 components/*: -DCHIPSET=$CHIPSET instead of fixed -DCHIPSET=10
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62 ASMFLAGS="$ASMFLAGS -dCHIPSET=$CHIPSET"
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63 ASMFLAGS="$ASMFLAGS -dLONG_JUMP=3"
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64 ASMFLAGS="$ASMFLAGS -dTOOL_CHOICE=0"
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65 ASMFLAGS="$ASMFLAGS -dR2D_ASM=0"
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66 ASMFLAGS="$ASMFLAGS -dR2D_LCD_TEST=0"
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67 ASMFLAGS="$ASMFLAGS -dTI_PROFILER=0"
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68 ASMFLAGS="$ASMFLAGS -dTI_NUC_MONITOR=0"
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69 ASMFLAGS="$ASMFLAGS -dL1_GPRS=$GPRS"
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70 ASMFLAGS="$ASMFLAGS -dOP_WCP=0"
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71 ASMFLAGS="$ASMFLAGS -dWCP_PROF=0"
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72
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ae18f9aad7ce C155 target support implemented in a way that should work
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73 if [ "$TARGET" = c155 ]
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74 then
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75 ASMFLAGS="$ASMFLAGS -dC155_TARGET=1"
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76 else
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77 ASMFLAGS="$ASMFLAGS -dC155_TARGET=0"
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78 fi
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79
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a7ed7d4483b0 main assembly boot path code: MEMIF change for 26 MHz targets
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80 if [ "$RF" = 12 ]
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81 then
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82 ASMFLAGS="$ASMFLAGS -dVCXO_26MHZ=1"
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83 else
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84 ASMFLAGS="$ASMFLAGS -dVCXO_26MHZ=0"
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85 fi
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86
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87 asm_file $SRCDIR/int.s