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annotate components/tpudrv @ 605:07d0dc4431f4

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bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents 909fe8b92b26
children
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96a085dd4acc recompilation of tpudrv.lib works
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1 # Building tpudrv.lib
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2
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3 CFLAGS="-g -me -pw2 -mt -o2 -mw"
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4 CPPFLAGS="-DTOOL_CHOICE=0 -D_TMS470"
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5
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6 # Includes
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7
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8 CPPFLAGS="$CPPFLAGS -I../config"
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9 CPPFLAGS="$CPPFLAGS -I$SRC/cs/os/nucleus"
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10 CPPFLAGS="$CPPFLAGS -I$SRC/cs/system"
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11 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera/rvt"
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12 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera"
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13 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_cust0"
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14 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_include"
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15 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/cust0"
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16 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/hmacs"
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17 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/include"
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18 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/p_include"
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19 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_include"
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20 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_cust0"
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21 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/dyn_dwl_include"
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22 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/p_source0"
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23 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source0"
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24 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source"
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25 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core"
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26 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb"
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27 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio"
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28 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm"
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29 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf"
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30 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma"
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31 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld"
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32 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth"
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33 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif"
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34 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea"
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35 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security"
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36 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi"
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37 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer"
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38 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart"
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39 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd"
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40
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41 # Source modules
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42
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43 SRCDIR=$SRC/cs/layer1/tpu_drivers
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44
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45 cfile_plain $SRCDIR/source/tpudrv.c
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909fe8b92b26 components/tpudrv: support RF 10 or 12
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46 cfile_plain $SRCDIR/source0/tpudrv${RF}.c
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47
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48 if [ "$GPRS" = 1 ]
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49 then
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50 cfile_plain $SRCDIR/p_source0/p_tpudr${RF}.c
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51 fi