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annotate src/cs/drivers/drv_app/lcc/lcc_handle_timers.h @ 605:07d0dc4431f4

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bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents 945cf7f506b2
children
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945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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1 /******************************************************************************
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2 * Power Task (pwr)
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3 * Design and coding by Svend Kristian Lindholm, skl@ti.com
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4 *
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5 * PWR Message Processing
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6 *
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7 * $Id: pwr_handle_timers.h 1.1 Wed, 20 Aug 2003 10:22:37 +0200 skl $
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8 *
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9 ******************************************************************************/
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10 #ifndef __LCC_HANDLE_TIMERS_H_
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11 #define __LCC_HANDLE_TIMERS_H_
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13 #include "lcc/lcc.h"
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15 T_RV_RET process_pwr_handle_T1_expiration (T_PWR_REQ *request);
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16 T_RV_RET process_pwr_handle_T2_expiration (T_PWR_REQ *request);
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17 T_RV_RET process_pwr_handle_T3_expiration (T_PWR_REQ *request);
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18 T_RV_RET process_pwr_handle_T4_expiration (T_PWR_REQ *request);
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19 T_RV_RET process_pwr_handle_mmi_info_expiration(T_PWR_REQ *request);
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21 void pwr_check_timers(void);
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22 T_RVM_RETURN pwr_create_timer(UINT32 *timer_begin);
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23 T_RVM_RETURN pwr_start_timer(UINT32 *timer_begin);
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25 #endif