FreeCalypso > hg > fc-magnetite

annotate src/cs/drivers/drv_core/inth/inth.c @ 605:07d0dc4431f4

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bootloader.s: same MEMIF fix as in int.s plus DPLL BYPASS fix Both MEMIF and DPLL settings are now the same between int.s and bootloader.s assembly code paths. Previously bootloader.s was setting DPLL BYPASS /2 mode, which persisted until _INT_Initialize code with the bootloader body omitted, or was changed to /1 in the hardware init function in the bootloader.lib:start.obj module.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 17 Jun 2019 18:40:32 +0000
parents 945cf7f506b2
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 /*******************************************************************************
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2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
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3
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4 Property of Texas Instruments -- For Unrestricted Internal Use Only
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5 Unauthorized reproduction and/or distribution is strictly prohibited. This
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6 product is protected under copyright law and trade secret law as an
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7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
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8 rights reserved.
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9
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10
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11 Filename : inth.c
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12
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13 Description : inth.c saturn interupt handler
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14
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15 Project : drivers
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16
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17 Author : pmonteil@tif.ti.com Patrice Monteil.
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18
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19 Version number : 1.15
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20
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21 Date : 05/23/03
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22
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23 Previous delta : 12/19/00 14:39:21
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24
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25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/RELEASE_GPRS/drivers1/common/SCCS/s.inth.c
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27 Sccs Id (SID) : '@(#) inth.c 1.8 01/30/01 10:22:26 '
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29
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30 *****************************************************************************/
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31
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32 #include "l1sw.cfg"
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33 #include "chipset.cfg"
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34
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35
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36 #if (CHIPSET != 12)
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37
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38 #if (OP_L1_STANDALONE == 0)
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39 #include "main/sys_types.h"
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40 #else
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41 #include "sys_types.h"
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42 #endif
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43 #include "memif/mem.h"
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44 #include "inth.h"
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45
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46 /*--------------------------------------------------------------
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47 * INTH_Ack()
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48 *--------------------------------------------------------------
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49 * Parameters : num of it
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50 * Return : none
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51 * Functionality :Acknowledge an interrupt and return the origin
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52 * of the interrupt (binary format)
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53 *--------------------------------------------------------------*/
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54
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55 SYS_UWORD16 INTH_Ack (int intARM)
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56 {
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57 if (intARM == INTH_IRQ)
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58 return((* (volatile SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM);
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59 else
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60 return((* (volatile SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM);
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61 }
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62
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63 /*--------------------------------------------------------------
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64 * INTH_GetPending()
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65 *--------------------------------------------------------------
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66 * Parameters : none
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67 * Return : none
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68 * Functionality : Return the pending interrupts
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69 *--------------------------------------------------------------*/
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70
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71 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
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72 unsigned long INTH_GetPending (void)
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73 {
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74 return((unsigned long)((* (volatile SYS_UWORD16 *) INTH_IT_REG1) |
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75 ((* (volatile SYS_UWORD16 *) INTH_IT_REG2) << 16)));
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76 }
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77 #else
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78 unsigned short INTH_GetPending (void)
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79 {
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80 return(* (volatile SYS_UWORD16 *) INTH_IT_REG);
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81 }
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82 #endif
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83
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84 /*--------------------------------------------------------------
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85 * INTH_InitLevel()
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86 *--------------------------------------------------------------
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87 * Parameters : num it,FIQ/IRQ,priority level,edge/level.
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88 * Return : none
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89 * Functionality : Initialize an interrupt
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90 * - put it on IRQ or FIQ
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91 * - set its priority level
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92 *
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93 *--------------------------------------------------------------*/
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94
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95 void INTH_InitLevel (int inputInt, int FIQ_nIRQ, int priority, int edge)
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96 {
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97 volatile SYS_UWORD16 *inthLevelReg = (SYS_UWORD16 *) INTH_EXT_REG;
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98
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99 inthLevelReg = inthLevelReg + inputInt;
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100
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101 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
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102 *inthLevelReg = (FIQ_nIRQ | (edge << 1) | (priority << 2));
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103 #else
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104 *inthLevelReg = (FIQ_nIRQ | (priority << 1) | (edge << 5));
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105 #endif
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106 }
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107
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108 /*--------------------------------------------------------------
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109 * INTH_ResetIT()
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110 *--------------------------------------------------------------
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111 * Parameters : none
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112 * Return : none
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113 * Functionality : reset the inth it register
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114 *--------------------------------------------------------------*/
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115
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116 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
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117 unsigned long INTH_ResetIT (void)
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118 {
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119 * (volatile SYS_UWORD16 *) INTH_IT_REG1 &= 0x0000;
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120 * (volatile SYS_UWORD16 *) INTH_IT_REG2 &= 0x0000;
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121 return((unsigned long)((* (volatile SYS_UWORD16 *) INTH_IT_REG1) |
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122 ((* (volatile SYS_UWORD16 *) INTH_IT_REG2) << 16)));
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123 }
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124 #else
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125 unsigned short INTH_ResetIT (void)
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126 {
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127 * (volatile SYS_UWORD16 *) INTH_IT_REG &= 0x0000;
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128 return(* (volatile SYS_UWORD16 *) INTH_IT_REG);
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129 }
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130 #endif
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131
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132
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133 #endif /* endif chipset != 12 */
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134
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135
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136