FreeCalypso > hg > fc-magnetite

annotate src/g23m-aci/uart/uart_rts.c @ 640:16eb1b9640dc

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target gtm900 renamed to gtm900mgc2 This change reflects the fact that the build target in question supports MGC2GSMT hardware only, and will NOT work on other hw that confusing bears the same end user name of GTM900, neither the LoCosto-based GTM900-C nor the Calypso-based MG01GSMT that has a different and incompatible RFFE. If we ever get our hands on a piece of MG01GSMT hw and add support for it, that other target will be named gtm900mg01.
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 31 Jan 2020 00:46:07 +0000
parents 53929b40109c
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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1 /*
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2 +-----------------------------------------------------------------------------
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3 | Project :
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4 | Modul :
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5 +-----------------------------------------------------------------------------
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6 | Copyright 2002 Texas Instruments Berlin, AG
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7 | All rights reserved.
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8 |
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9 | This file is confidential and a trade secret of Texas
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10 | Instruments Berlin, AG
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11 | The receipt of or possession of this file does not convey
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12 | any rights to reproduce or disclose its contents or to
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13 | manufacture, use, or sell anything it may describe, in
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14 | whole, or in part, without the specific written consent of
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15 | Texas Instruments Berlin, AG.
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16 +-----------------------------------------------------------------------------
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17 | Purpose : This modul is part of the entity UART and implements all
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18 | functions to handle the incoming process internal signals as
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19 | described in the SDL-documentation (RT-statemachine)
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20 +-----------------------------------------------------------------------------
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21 */
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22
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23 #ifndef UART_RTS_C
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24 #define UART_RTS_C
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25 #endif /* !UART_RTS_C */
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26
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27 #define ENTITY_UART
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28
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29 /*==== INCLUDES =============================================================*/
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30
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31 #ifdef _SIMULATION_
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32 #include <stdio.h>
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33 #endif
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34
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35 #ifdef WIN32
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36 #include "nucleus.h"
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37 #endif /* WIN32 */
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38 #include "typedefs.h" /* to get Condat data types */
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39 #include "vsi.h" /* to get a lot of macros */
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40 #include "macdef.h" /* to get a lot of macros */
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41 #include "custom.h"
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42 #include "gsm.h" /* to get a lot of macros */
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43 #include "cnf_uart.h" /* to get cnf-definitions */
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44 #include "mon_uart.h" /* to get mon-definitions */
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45 #include "prim.h" /* to get the definitions of used SAP and directions */
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46 #ifdef DTILIB
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47 #include "dti.h" /* to get dti lib */
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48 #endif /* DTILIB */
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49 #include "pei.h" /* to get PEI interface */
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50 #ifdef FF_MULTI_PORT
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51 #include "gsi.h" /* to get definitions of serial driver */
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52 #else /* FF_MULTI_PORT */
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53 #ifdef _TARGET_
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54 #include "uart/serialswitch.h"
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55 #include "uart/traceswitch.h"
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56 #else /* _TARGET_ */
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57 #include "serial_dat.h" /* to get definitions of serial driver */
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58 #endif /* _TARGET_ */
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59 #endif /* FF_MULTI_PORT */
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60 #include "uart.h" /* to get the global entity definitions */
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61
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62 /*==== CONST ================================================================*/
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63
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64 /*==== LOCAL VARS ===========================================================*/
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65
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66 /*==== PRIVATE FUNCTIONS ====================================================*/
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67
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68 /*==== PUBLIC FUNCTIONS =====================================================*/
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69
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70
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71
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72 /*
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73 +------------------------------------------------------------------------------
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74 | Function : sig_ker_rt_parameters_req
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75 +------------------------------------------------------------------------------
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76 | Description : Handles the internal signal SIG_KER_RT_PARAMETERS_REQ
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77 | This signal sets new start values for the three multiplexer
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78 | timers:
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79 | T1 - acknowledgement timer (in units of 10 ms)
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80 | T2 - response timer for multiplexer control channel
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81 | (in units of 10 ms)
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82 | T3 - wake-up response timer (in seconds)
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83 |
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84 | Parameters : t1 - new start value of timer T1
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85 | t2 - new start value of timer T2
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86 | t3 - new start value of timer T3
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87 |
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88 +------------------------------------------------------------------------------
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89 */
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90 GLOBAL void sig_ker_rt_parameters_req (UBYTE t1, UBYTE t2, UBYTE t3)
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91 {
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92 TRACE_ISIG( "sig_ker_rt_parameters_req" );
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93
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94 /*
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95 * set set new start values of timers
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96 */
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97 uart_data->rt.t1 = (T_TIME)t1 * 10;
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98 uart_data->rt.t2 = (T_TIME)t2 * 10;
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99 uart_data->rt.t3 = (T_TIME)t3 * 1000;
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100 } /* sig_ker_rt_parameters_req() */
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101
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102
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103
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104 /*
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105 +------------------------------------------------------------------------------
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106 | Function : sig_ker_rt_start_t1_req
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107 +------------------------------------------------------------------------------
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108 | Description : Handles the internal signal SIG_KER_RT_START_T1_REQ
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109 | which is used to (re-)start the timer t1
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110 |
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111 | Parameters : none
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112 |
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113 +------------------------------------------------------------------------------
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114 */
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115 GLOBAL void sig_ker_rt_start_t1_req ()
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116 {
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117 TRACE_ISIG( "sig_ker_rt_start_t1_req" );
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118
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 if(TIMER_START(UART_handle, uart_data->timer_t1_index, uart_data->rt.t1 ) NEQ VSI_OK)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121 TRACE_ERROR_P1("VSI entity: Can't start timer t1, uart_rts.c(%d)", __LINE__);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 uart_data->rt.state_t1 = UART_RT_STARTED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 } /* sig_ker_rt_start_t1_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 | Function : sig_ker_rt_start_t2_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 | Description : Handles the internal signal SIG_KER_RT_START_T2_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 | which is used to (re-)start the timer t2
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 | Parameters : none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 GLOBAL void sig_ker_rt_start_t2_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 TRACE_ISIG( "sig_ker_rt_start_t2_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 if(TIMER_START(UART_handle, uart_data->timer_t2_index, uart_data->rt.t2 ) NEQ VSI_OK)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 TRACE_ERROR_P1("VSI entity: Can't start timer t2, uart_rts.c(%d)", __LINE__);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 uart_data->rt.state_t2 = UART_RT_STARTED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 } /* sig_ker_rt_start_t2_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 | Function : sig_ker_rt_start_t3_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 | Description : Handles the internal signal SIG_KER_RT_START_T3_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 | which is used to (re-)start the timer t3
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 | Parameters : none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 GLOBAL void sig_ker_rt_start_t3_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 TRACE_ISIG( "sig_ker_rt_start_t3_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 if(TIMER_START(UART_handle, uart_data->timer_t3_index, uart_data->rt.t3 ) NEQ VSI_OK)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 TRACE_ERROR_P1("VSI entity: Can't start timer t3, uart_rts.c(%d)", __LINE__);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 uart_data->rt.state_t3 = UART_RT_STARTED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 } /* sig_ker_rt_start_t3_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 | Function : sig_dtx_rt_start_tesd_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 | Description : Handles the internal signal SIG_DTX_RT_START_TESD_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 | which is used to start the timer tesd
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 | Parameters : tesd_value - startvalue of TESD
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 GLOBAL void sig_dtx_rt_start_tesd_req (T_TIME tesd_value)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 TRACE_ISIG( "sig_dtx_rt_start_tesd_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 * store lowest value
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 if (tesd_value < uart_data->rt.tesd)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 #ifdef _SIMULATION_
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 TRACE_EVENT_P1("ESD: New start value uart_data->rt.tesd: %d", tesd_value);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 #endif /* _SIMULATION_ */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 uart_data->rt.tesd = tesd_value;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 * 1. This is the "first" call to sig_dtx_rt_start_tesd_req:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 * state is UART_RT_STOPPED
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 * 2. Called from sig_ker_dtx_timeout_tesd_req:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 * state is still UART_RT_STARTED (is reset to UART_RT_STOPPED when none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 * of the DLCs wants to restart TESD)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 if (uart_data->rt.state_tesd EQ UART_RT_STOPPED)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 #ifdef _SIMULATION_
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 TRACE_EVENT_P1("ESD: Start timer TESD( %d )", uart_data->rt.tesd);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 #endif /* _SIMULATION_ */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 if(TIMER_START (UART_handle, uart_data->timer_tesd_index, uart_data->rt.tesd ) NEQ VSI_OK)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 TRACE_ERROR_P1("VSI entity: Can't start timer, uart_rts.c(%d)", __LINE__);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 uart_data->rt.state_tesd = UART_RT_STARTED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 #ifdef _SIMULATION_
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 TRACE_EVENT("ESD: Timer TESD will be started later !");
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 #endif /* _SIMULATION_ */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 } /* sig_dtx_rt_start_tesd_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 | Function : sig_ker_rt_stop_t1_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 | Description : Handles the internal signal SIG_KER_RT_STOP_T1_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 | Parameters : none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 GLOBAL void sig_ker_rt_stop_t1_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 TRACE_ISIG( "sig_ker_rt_stop_t1_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 if( uart_data->rt.state_t1 EQ UART_RT_STARTED )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 if(TIMER_STOP(UART_handle, uart_data->timer_t1_index ) NEQ VSI_OK)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 TRACE_ERROR_P1("VSI entity: Can't stop timer t1, uartrts.c(%d)", __LINE__);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257 uart_data->rt.state_t1 = UART_RT_STOPPED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 } /* sig_ker_rt_stop_t1_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 | Function : sig_ker_rt_stop_t2_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
265 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266 | Description : Handles the internal signal SIG_KER_RT_STOP_T2_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
268 | Parameters : none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
269 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 GLOBAL void sig_ker_rt_stop_t2_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274 TRACE_ISIG( "sig_ker_rt_stop_t2_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
275
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
276 if( uart_data->rt.state_t2 EQ UART_RT_STARTED )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
277 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
278 if(TIMER_STOP(UART_handle, uart_data->timer_t2_index ) NEQ VSI_OK)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280 TRACE_ERROR_P1("VSI entity: Can't stop timer t2, uart_rts.c(%d)",__LINE__);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284 uart_data->rt.state_t2 = UART_RT_STOPPED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285 } /* sig_ker_rt_stop_t2_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
286
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
287
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
288
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
289 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291 | Function : sig_ker_rt_stop_t3_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 | Description : Handles the internal signal SIG_KER_RT_STOP_T3_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
295 | Parameters : none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
297 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
298 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
299 GLOBAL void sig_ker_rt_stop_t3_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
300 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
301 TRACE_ISIG( "sig_ker_rt_stop_t3_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
302
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
303 if( uart_data->rt.state_t3 EQ UART_RT_STARTED )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
304 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
305 if(TIMER_STOP(UART_handle, uart_data->timer_t3_index ) NEQ VSI_OK)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
306 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
307 TRACE_ERROR_P1("VSI entity: Can't stop timer t3, uart_rts.c(%d)", __LINE__);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
308 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
309 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
310
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
311 uart_data->rt.state_t3 = UART_RT_STOPPED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
312 } /* sig_ker_rt_stop_t3_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
313
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
314
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
315 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
316 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
317 | Function : sig_dtx_rt_stop_tesd_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
318 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
319 | Description : Handles the internal signal SIG_DTX_RT_STOP_TESD_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
320 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
321 | Parameters : none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
322 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
323 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
324 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
325 GLOBAL void sig_dtx_rt_stop_tesd_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
326 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
327 TRACE_ISIG( "sig_dtx_rt_stop_tesd_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
328
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
329 if( uart_data->rt.state_tesd EQ UART_RT_STARTED )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
330 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
331 if(TIMER_STOP(UART_handle, uart_data->timer_tesd_index ) NEQ VSI_OK)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
332 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
333 TRACE_ERROR_P1("VSI entity: Can't stop timer, uart_rts.c(%d)", __LINE__);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
334 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
335 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
336
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
337 uart_data->rt.state_tesd = UART_RT_STOPPED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
338 } /* sig_dtx_rt_stop_tesd_req() */