annotate targets/pirelli.conf @ 640:16eb1b9640dc

target gtm900 renamed to gtm900mgc2 This change reflects the fact that the build target in question supports MGC2GSMT hardware only, and will NOT work on other hw that confusing bears the same end user name of GTM900, neither the LoCosto-based GTM900-C nor the Calypso-based MG01GSMT that has a different and incompatible RFFE. If we ever get our hands on a piece of MG01GSMT hw and add support for it, that other target will be named gtm900mg01.
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 31 Jan 2020 00:46:07 +0000
parents 13bcc2ed7e44
children 5f00e9afd5d9
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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6c3881378a31 targets: c139 and pirelli added
Mychaela Falconia <falcon@freecalypso.org>
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1 LINK_SCRIPT_SRC=src/cs/system/template/gsm_ds_pirelli_flash.template
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7bd197063b9e building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
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2 RAM_LINK_SCRIPT_SRC=src/cs/system/template/gsm_ds_pirelli_ram.template
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6c3881378a31 targets: c139 and pirelli added
Mychaela Falconia <falcon@freecalypso.org>
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3 MAIN_blob=blobs/patches/main-pirelli.lib
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5c13f9325e2d preparations for rebuilding main.lib from partial source
Mychaela Falconia <falcon@freecalypso.org>
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4 INIT_blob=blobs/patches/main-pirelli/init.obj
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6c3881378a31 targets: c139 and pirelli added
Mychaela Falconia <falcon@freecalypso.org>
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5 TPUDRV_blob=
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13bcc2ed7e44 configure.sh & targets/*.conf: emit FLASH_BASE_ADDR & FLASH_SECTOR_SIZE
Mychaela Falconia <falcon@freecalypso.org>
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6 FLASH_BASE_ADDR=0
13bcc2ed7e44 configure.sh & targets/*.conf: emit FLASH_BASE_ADDR & FLASH_SECTOR_SIZE
Mychaela Falconia <falcon@freecalypso.org>
parents: 101
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7 FLASH_SECTOR_SIZE=0x40000