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annotate src/cs/drivers/drv_core/inth/niq.c @ 137:1974d7cacf84

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src/condat2/com/src/driver/light.c: C139 LCD backlight control
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 08 Oct 2016 05:15:48 +0000
parents 945cf7f506b2
children
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1 /******************************************************************************
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2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
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3
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4 Property of Texas Instruments -- For Unrestricted Internal Use Only
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5 Unauthorized reproduction and/or distribution is strictly prohibited. This
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6 product is protected under copyright law and trade secret law as an
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7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
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8 rights reserved.
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9
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10
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11 Filename : niq.c
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12
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13 Description : Nucleus IQ initializations
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14
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15 Project : Drivers
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16
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17 Author : proussel@ti.com Patrick Roussel.
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18
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19 Version number : 1.16
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20
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21 Date : 05/23/03
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22
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23 Previous delta : 12/19/00 14:22:24
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24
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25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/RELEASE_GPRS/drivers1/common/SCCS/s.niq.c
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26
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27 Sccs Id (SID) : '@(#) niq.c 1.8 01/30/01 10:22:21 '
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28 *******************************************************************************/
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29
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30 #include "l1sw.cfg"
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31
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32 #if (OP_L1_STANDALONE == 0)
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33 #include "debug.cfg"
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34 #endif
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35 #include "chipset.cfg"
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36 #include "rf.cfg"
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37
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38 #if (OP_L1_STANDALONE == 0)
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39 #include "main/sys_types.h"
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40 #else
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41 #include "sys_types.h"
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42 #endif
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43 #include "memif/mem.h"
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44 #include "rhea/rhea_arm.h"
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45 #if (CHIPSET != 12)
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46 #include "inth.h"
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47 #endif
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48 #include "iq.h"
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49
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50
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51 #if (CHIPSET != 12)
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52 extern SYS_FUNC irqHandlers[IQ_NUM_INT];
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53
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54 /*--------------------------------------------------------------*/
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55 /* IQ_Prty[IQ_NUM_INT] */
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56 /*--------------------------------------------------------------*/
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57 /* Parameters : none */
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58 /* Return : none */
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59 /* Functionality : IRQ priorities 0xFF means interrupt is masked*/
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60 /*--------------------------------------------------------------*/
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61
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62 #if (CHIPSET == 4)
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63 unsigned char IQ_Prty[IQ_NUM_INT] =
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64 {
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65 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
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66 0x01, 0x02, 0x02, 0xFF, 0x00, 0x04, 0x07, 0x02,
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67
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68 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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69 0x01, 0x03, 0x03, 0x00, 0x08, 0x05, 0x06, 0x03,
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70
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71 // AIRQ16 AIRQ17 AIRQ18 AIRQ19
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72 0x07, 0xFF, 0x02, 0x03
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73
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74 };
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75 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9))
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76 unsigned char IQ_Prty[IQ_NUM_INT] =
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77 {
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78 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
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79 #if (RF_FAM==35)
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80 0x01, 0x02, 0x02, 0x0F, 0x00, 0x04, 0x07, 0x02,
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81 #else
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82 0x01, 0x02, 0x02, 0xFF, 0x00, 0x04, 0x07, 0x02,
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83 #endif
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84
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85 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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86 0x01, 0x03, 0x03, 0x00, 0x08, 0x05, 0x06, 0x03,
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87
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88 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 AIRQ21 AIRQ22 AIRQ23
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89 #if (OP_L1_STANDALONE == 0)
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90 0x07, 0xFF, 0x02, 0x03, 0x0F, 0xFF, 0xFF, 0xFF,
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91 #else
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92 0x07, 0xFF, 0x02, 0x03, 0xFF, 0xFF, 0xFF, 0xFF,
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93 #endif
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94
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95 // AIRQ24
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96 0xFF
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97
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98 };
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99 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)
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100 unsigned char IQ_Prty[IQ_NUM_INT] =
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101 {
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102 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
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103 0x01, 0x02, 0x02, 0xFF, 0x00, 0x04, 0x07, 0x02,
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104
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105 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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106 0x01, 0x03, 0x03, 0x00, 0x08, 0x05, 0x06, 0x03,
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107
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108 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20
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109 0x07, 0xFF, 0x02, 0x03, 0xFF
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110
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111 };
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112
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113 #else
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114 unsigned char IQ_Prty[IQ_NUM_INT] =
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115 {
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116 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
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117 0x01, 0x02, 0x02, 0xFF, 0x00, 0x04, 0x07, 0x02,
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118
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119 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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120 0x01, 0x03, 0x03, 0x00, 0x08, 0x05, 0x06, 0x03
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121
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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122 };
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123 #endif
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124
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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125
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126 /*--------------------------------------------------------------*/
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127 /* IQ_LEVEL[IQ_NUM_INT] */
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128 /*--------------------------------------------------------------*/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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129 /* Parameters : none */
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130 /* Return : none */
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131 /* Functionality : IRQ sensitivity */
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132 /* 1: falling edge 0: low level (default) */
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133 /*--------------------------------------------------------------*/
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134
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135 #if (CHIPSET == 4)
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136 unsigned char IQ_LEVEL[IQ_NUM_INT] =
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137 {
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138 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
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139 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00,
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140
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141 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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142 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01,
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143
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144 // AIRQ16 AIRQ17 AIRQ18 AIRQ19
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145 0x01, 0x01, 0x00, 0x00
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146
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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147 };
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148 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9))
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149 unsigned char IQ_LEVEL[IQ_NUM_INT] =
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150 {
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151 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
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152 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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153
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154 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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155 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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156
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157 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 AIRQ21 AIRQ22 AIRQ23
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158 #if (OP_L1_STANDALONE == 0)
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159 0x01, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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160 #else
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161 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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162 #endif
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163
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164 // AIRQ24
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165 0x00
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166
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167 };
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168 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)
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169 unsigned char IQ_LEVEL[IQ_NUM_INT] =
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170 {
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171 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
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172 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00,
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173
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174 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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175 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01,
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176
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177 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20
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178 0x01, 0x01, 0x00, 0x00, 0x00
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179
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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180 };
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181
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182 #else
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183 unsigned char IQ_LEVEL[IQ_NUM_INT] =
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184 {
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185 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
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186 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00,
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187
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188 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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189 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01
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190
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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191 };
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192 #endif
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193
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194
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195 /*--------------------------------------------------------------*/
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196 /* IQ_FIQ_nIRQ[IQ_NUM_INT] */
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197 /*--------------------------------------------------------------*/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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198 /* Parameters : none */
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199 /* Return : none */
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200 /* Functionality : IRQ sensitivity */
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201 /* 0: falling edge 1: low level (default) */
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202 /*--------------------------------------------------------------*/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
203
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204 #if (CHIPSET == 4)
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205 unsigned char IQ_FIQ_nIRQ[IQ_NUM_INT] =
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206 {
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207 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
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208 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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209
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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210 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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diff changeset
211 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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212
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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213 // AIRQ16 AIRQ17 AIRQ18 AIRQ19
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diff changeset
214 INTH_FIQ, INTH_FIQ, INTH_IRQ, INTH_IRQ
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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215
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
216 };
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diff changeset
217 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9))
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218 unsigned char IQ_FIQ_nIRQ[IQ_NUM_INT] =
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diff changeset
219 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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220 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
221 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
222
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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223 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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parents:
diff changeset
224 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ,
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225
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
226 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20 AIRQ21 AIRQ22 AIRQ23
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diff changeset
227 INTH_FIQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
228
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
229 // AIRQ24
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 INTH_IRQ
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
232 };
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
233 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)
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diff changeset
234 unsigned char IQ_FIQ_nIRQ[IQ_NUM_INT] =
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diff changeset
235 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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236 // AIRQ0 AIRQ1 AIRQ2 AIRQ3 AIRQ4 AIRQ5 AIRQ6 AIRQ7
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ,
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238
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239 // AIRQ8 AIRQ9 AIRQ10 AIRQ11 AIRQ12 AIRQ13 DMA LEAD
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240 INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ, INTH_IRQ,
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241
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242 // AIRQ16 AIRQ17 AIRQ18 AIRQ19 AIRQ20
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243 INTH_FIQ, INTH_FIQ, INTH_IRQ, INTH_IRQ, INTH_IRQ
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244
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245 };
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246
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247 #endif
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248 #endif /* (CHIPSET != 12)*/
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249
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250 /*--------------------------------------------------------------*/
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251 /* IQ_GetBuild */
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252 /*--------------------------------------------------------------*/
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253 /* Parameters : none */
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254 /* Return : Return library build number */
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255 /* Functionality : */
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256 /*--------------------------------------------------------------*/
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257
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258 unsigned IQ_GetBuild(void)
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259 {
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260 return(IQ_BUILD);
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261 }
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262
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263 #if (CHIPSET != 12)
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264 /*--------------------------------------------------------------*/
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265 /* IQ_SetupInterrupts */
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266 /*--------------------------------------------------------------*/
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267 /* Parameters : none */
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268 /* Return : none */
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269 /* Functionality : Set IRQ interrupt levels and unmask */
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270 /*--------------------------------------------------------------*/
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271
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272 void IQ_SetupInterrupts(void)
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273 {
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274 int i;
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275 char prty;
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276
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277 /* Setup all interrupts to IRQ with different levels */
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278 for (i=INTH_TIMER;i<=IQ_NUM_INT;i++ )
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279 {
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280 prty = IQ_Prty[i];
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281 if (prty != 0xFF)
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282 {
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283 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
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284 INTH_InitLevel(i, IQ_FIQ_nIRQ[i], prty, IQ_LEVEL[i]);
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285 #else
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286 INTH_InitLevel(i, INTH_IRQ, prty, IQ_LEVEL[i]);
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287 #endif
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288 }
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289 INTH_DISABLEONEIT(i);
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290 }
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291 }
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292
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293 /*--------------------------------------------------------------*/
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294 /* IQ_InitWaitState */
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295 /*--------------------------------------------------------------*/
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296 /* Parameters :rom, ram, spy, lcd, jtag */
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297 /* Return : none */
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298 /* Functionality : Init wait states */
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299 /*--------------------------------------------------------------*/
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300
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301 void IQ_InitWaitState(unsigned short rom, unsigned short ram, unsigned short spy, unsigned short lcd, unsigned short jtag)
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302 {
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303 volatile char ws;
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304
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305 ws = * (volatile SYS_UWORD16 *) MEM_REG_nCS0;
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306 ws &= ~WS_MASK;
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307 ws |= rom;
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308 * (volatile SYS_UWORD16 *) MEM_REG_nCS0 = ws;
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309
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310 ws = * (volatile SYS_UWORD16 *) MEM_REG_nCS1;
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311 ws &= ~WS_MASK;
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312 ws |= ram;
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313 * (volatile SYS_UWORD16 *) MEM_REG_nCS1 = ws;
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314
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315 ws = * (volatile SYS_UWORD16 *) MEM_REG_nCS2;
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316 ws &= ~WS_MASK;
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317 ws |= spy;
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318 * (volatile SYS_UWORD16 *) MEM_REG_nCS2 = ws;
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319
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320 ws = * (volatile SYS_UWORD16 *) MEM_REG_nCS4;
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321 ws &= ~WS_MASK;
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322 ws |= lcd;
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323 * (volatile SYS_UWORD16 *) MEM_REG_nCS4 = ws;
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324
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325 #if ((CHIPSET != 4) && (CHIPSET != 7) && (CHIPSET != 8) && (CHIPSET != 10) && (CHIPSET != 11))
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326 ws = * (volatile SYS_UWORD16 *) MEM_REG_nCS5;
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327 ws &= ~WS_MASK;
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328 ws |= jtag;
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329 * (volatile SYS_UWORD16 *) MEM_REG_nCS5 = ws;
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diff changeset
330 #endif
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331
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332 }
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333
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334 void IQ_Unmask(unsigned irqNum)
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335 {
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336 INTH_ENABLEONEIT(irqNum);
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337 }
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338
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339 void IQ_Mask(unsigned irqNum)
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diff changeset
340 {
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341 INTH_DISABLEONEIT(irqNum);
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diff changeset
342 }
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343
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344 void IQ_MaskAll(void)
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345 {
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346 INTH_DISABLEALLIT;
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diff changeset
347 }
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diff changeset
348
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349
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diff changeset
350 #endif /* (CHIPSET != 12)*/
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351
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diff changeset
352 #if (OP_L1_STANDALONE == 0)
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diff changeset
353 #if (CHIPSET == 12)
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diff changeset
354 /*
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355 * IQ_MaskAll is being used by TI Berlin's alr.lib and therefore needs to be
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diff changeset
356 * patched for Calypso+.
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diff changeset
357 */
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358 void IQ_MaskAll(void)
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diff changeset
359 {
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diff changeset
360 #include "sys_inth.h"
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361
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diff changeset
362 F_INTH_DISABLE_ALL_IT;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 #endif /* CHIPSET == 12 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
365 #endif /* OP_L1_STANDALONE == 0 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
366
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
367 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
368 * IQ_GetJtagId
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
369 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
370 * JTAG part identifier
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
371 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
372 SYS_UWORD16 IQ_GetJtagId(void)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
373 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
374 unsigned short v;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
375
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
376 v = *( (volatile unsigned short *) (MEM_JTAGID_PART));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
377 return(v);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
378 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
379
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
380
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
381
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
382 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
383 * IQ_GetDeviceVersion
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
384 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
385 * Read from CLKM module
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
386 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
387 SYS_UWORD16 IQ_GetDeviceVersion(void)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
388 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
389 SYS_UWORD16 v;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
390
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
391 v = *( (volatile SYS_WORD16 *) (MEM_JTAGID_VER));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
392 return(v);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
393 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
394
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
395
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
396 //// !!!! TO BE REMOVED IN NEXT CONDAT RELEASE >2.55
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
397 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
398 * IQ_GetDeviceVersion
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
399 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
400 * Read from CLKM module
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
401 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
402 SYS_UWORD16 IQ_GetPoleStarVersion(void)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
403 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
404 SYS_UWORD16 v;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
405
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
406 v = *( (volatile SYS_UWORD16 *) (MEM_JTAGID_VER));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
407 return(v);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
408 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
409
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
410
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
411
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
412 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
413 * IQ_RamBasedLead
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
414 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
415 * Returns TRUE if the LEAD has RAM and needs to be downloaded
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
416 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
417 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
418
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
419 SYS_BOOL IQ_RamBasedLead(void)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
420 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
421 unsigned short id;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
422
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
423 id = IQ_GetJtagId();
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
424
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
425 #if (CHIPSET != 7)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
426 return ((id == SATURN || id == HERCRAM || id == 0xB2AC) ? 1 : 0);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
427 #else
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
428 // Calypso G2 rev. A and Samson share the same JTAG ID
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
429 return (0);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
430 #endif
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
431 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
432
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
433 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
434 * IQ_Power
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
435 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
436 * Switch-on or off the board
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
437 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
438 * Parameters : BOOL power : 1 to power-on (maintain power)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
439 * 0 to power-off
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
440 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
441 * See A-Sample board specification
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
442 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
443 void IQ_Power(SYS_UWORD8 power)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
444 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
445 // This is only implemented for the A-Sample
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
446 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
447
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
448 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
449 * IQ_GetRevision
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
450 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
451 * Silicon revision - Read from JTAG version code
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
452 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
453 SYS_UWORD16 IQ_GetRevision(void)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
454 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
455 unsigned short v;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
456
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
457 v = *( (volatile unsigned short *) (MEM_JTAGID_VER));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
458 return(v);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
459 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
460
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
461 #if (OP_L1_STANDALONE == 0)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
462 #if (TI_PROFILER == 1)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
463 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
464 * IQ_InitLevel
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
465 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
466 * Parameters : interrupt, FIQ_nIRQ, priority, edge
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
467 * Return : none
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
468 * Functionality : initialize Interrupt Level Registers
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
469 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
470
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
471 void IQ_InitLevel ( SYS_UWORD16 inputInt,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
472 SYS_UWORD16 FIQ_nIRQ,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
473 SYS_UWORD16 priority,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
474 SYS_UWORD16 edge )
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
475 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
476 volatile SYS_UWORD16 *inthLevelReg = (SYS_UWORD16 *) INTH_EXT_REG;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
477
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
478 inthLevelReg = inthLevelReg + inputInt;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
479
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
480 *inthLevelReg = (FIQ_nIRQ | (priority << 6) | (edge << 1));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
481 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
482
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
483 #endif /* TI_PROFILER == 1 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
484 #endif /* OP_L1_STANDALONE == 0 */