FreeCalypso > hg > fc-magnetite

annotate src/g23m-aci/uart/uart_drxs.c @ 493:2e73bbc0648e

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OSL: os_mem_fl.c compiles
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 24 Jun 2018 18:59:22 +0000
parents 53929b40109c
children
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53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
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1 /*
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2 +-----------------------------------------------------------------------------
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3 | Project :
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4 | Modul :
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5 +-----------------------------------------------------------------------------
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6 | Copyright 2002 Texas Instruments Berlin, AG
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7 | All rights reserved.
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8 |
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9 | This file is confidential and a trade secret of Texas
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10 | Instruments Berlin, AG
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11 | The receipt of or possession of this file does not convey
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12 | any rights to reproduce or disclose its contents or to
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13 | manufacture, use, or sell anything it may describe, in
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14 | whole, or in part, without the specific written consent of
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15 | Texas Instruments Berlin, AG.
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16 +-----------------------------------------------------------------------------
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17 | Purpose : This modul is part of the entity UART and implements all
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18 | functions to handles the incoming process internal signals as
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19 | described in the SDL-documentation (DRX-statemachine)
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20 +-----------------------------------------------------------------------------
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21 */
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22
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23 #ifndef UART_DRXS_C
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24 #define UART_DRXS_C
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25 #endif /* !UART_DRXS_C */
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26
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27 #define ENTITY_UART
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28
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29 /*==== INCLUDES =============================================================*/
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30
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31 #ifdef WIN32
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32 #include "nucleus.h"
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33 #endif /* WIN32 */
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34 #include "typedefs.h" /* to get Condat data types */
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35 #include "vsi.h" /* to get a lot of macros */
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36 #include "macdef.h" /* to get a lot of macros */
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37 #include "custom.h"
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38 #include "gsm.h" /* to get a lot of macros */
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39 #include "cnf_uart.h" /* to get cnf-definitions */
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40 #include "mon_uart.h" /* to get mon-definitions */
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41 #include "prim.h" /* to get the definitions of used SAP and directions */
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42 #ifdef DTILIB
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43 #include "dti.h" /* to get dti lib */
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44 #endif /* DTILIB */
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45 #include "pei.h" /* to get PEI interface */
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46 #ifdef FF_MULTI_PORT
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47 #include "gsi.h" /* to get definitions of serial driver */
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48 #else /* FF_MULTI_PORT */
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49 #ifdef _TARGET_
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50 #include "uart/serialswitch.h"
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51 #include "uart/traceswitch.h"
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52 #else /* _TARGET_ */
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53 #include "serial_dat.h" /* to get definitions of serial driver */
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54 #endif /* _TARGET_ */
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55 #endif /* FF_MULTI_PORT */
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56 #include "uart.h" /* to get the global entity definitions */
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57
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58 #include "uart_drxf.h" /* to get the DRX function declarations */
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59 #include "uart_kers.h" /* to get the KER signal declarations */
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60 #ifdef FF_MULTI_PORT
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61 #include "uart_ptxs.h" /* to get signal definitions for service TX */
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62 #else /* FF_MULTI_PORT */
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63 #include "uart_txs.h" /* to get signal definitions for service TX */
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64 #endif /* FF_MULTI_PORT */
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65
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66 /*==== CONST ================================================================*/
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67
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68 /*==== LOCAL VARS ===========================================================*/
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69
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70 /*==== PRIVATE FUNCTIONS ====================================================*/
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71
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72 /*==== PUBLIC FUNCTIONS =====================================================*/
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73
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74
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75
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76 /*
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77 +------------------------------------------------------------------------------
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78 | Function : sig_ker_drx_ready_mode_req
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79 +------------------------------------------------------------------------------
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80 | Description : Handles the internal signal SIG_KER_DRX_READY_MODE_REQ
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81 |
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82 | Parameters : dlc_instance - dlc instance wich belongs to this DRX instance
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83 |
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84 +------------------------------------------------------------------------------
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85 */
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86 GLOBAL void sig_ker_drx_ready_mode_req (UBYTE dlc_instance)
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87 {
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88 TRACE_ISIG( "sig_ker_drx_ready_mode_req" );
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89
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90 uart_data->drx->dlc_instance = dlc_instance;
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91
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92 switch( GET_STATE( UART_SERVICE_DRX ) )
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93 {
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94 case DRX_DEAD:
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95 /*
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96 * new DLC starts with enabled data flow
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97 */
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98 uart_data->drx->data_flow = UART_FLOW_ENABLED;
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99
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100 #ifdef DTILIB
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101 if((uart_data->drx->dti_drx_state NEQ DTI_CLOSED ) &&
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102 (uart_data->drx->sending_state EQ UART_DRX_NOT_SENDING))
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103 {
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104 /*
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105 * signal availability to higher layer if currently not sending
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106 */
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107 SET_STATE( UART_SERVICE_DRX, DRX_READY );
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108 #ifdef FLOW_TRACE
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109 sndcp_trace_flow_control(FLOW_TRACE_UART, FLOW_TRACE_DOWN, FLOW_TRACE_TOP, TRUE);
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110 #endif /* FLOW_TRACE */
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111 dti_start(
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112 uart_hDTI,
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113 uart_data->device,
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114 UART_DTI_UP_INTERFACE,
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115 uart_data->drx->dlc_instance);
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116 }
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117 #else /* DTILIB */
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118 if((uart_data->drx->hComm_DRX_UPLINK NEQ VSI_ERROR ) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 (uart_data->drx->sending_state EQ UART_DRX_NOT_SENDING))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 * signal availability to higher layer if currently not sending
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 PALLOC (dti_ready_ind, DTI_READY_IND);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 SET_STATE( UART_SERVICE_DRX, DRX_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 dti_ready_ind->tui = uart_data->tui_uart;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 dti_ready_ind->c_id = drx_get_channel_id();
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 #ifdef _SIMULATION_
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 dti_ready_ind->op_ack = 0;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 #endif /* _SIMULATION_ */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 #ifdef FLOW_TRACE
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 sndcp_trace_flow_control(FLOW_TRACE_UART, FLOW_TRACE_DOWN, FLOW_TRACE_TOP, TRUE);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 #endif /* FLOW_TRACE */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 PSEND (uart_data->drx->hComm_DRX_UPLINK, dti_ready_ind);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 #endif /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 * no peer yet, just switch to NOT READY and wait
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 * for the signal SIG_KER_DRX_SET_DTI_PEER_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 #ifdef DTILIB
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 if(uart_data->drx->dti_drx_state NEQ DTI_CLOSED )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 dti_stop(
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 uart_hDTI,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 uart_data->device,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 UART_DTI_UP_INTERFACE,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 uart_data->drx->dlc_instance
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 #endif /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 SET_STATE( UART_SERVICE_DRX, DRX_NOT_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 case DRX_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 case DRX_NOT_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 case DRX_FLUSHING:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 TRACE_ERROR( "SIG_KER_DRX_READY_MODE_REQ unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 } /* sig_ker_drx_ready_mode_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 | Function : sig_ker_drx_dead_mode_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 | Description : Handles the internal signal SIG_KER_DRX_DEAD_MODE_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 | Parameters : none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 GLOBAL void sig_ker_drx_dead_mode_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 TRACE_ISIG( "sig_ker_drx_dead_mode_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 switch( GET_STATE( UART_SERVICE_DRX ) )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 case DRX_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 SET_STATE( UART_SERVICE_DRX, DRX_DEAD );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 * free all resources
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 #ifdef DTILIB
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 uart_data->drx->dti_drx_state = DTI_CLOSED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 #else /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 uart_data->drx->hComm_DRX_UPLINK = VSI_ERROR;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 #endif /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 drx_free_resources();
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 case DRX_FLUSHING:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 sig_any_ker_flushed_ind(uart_data->drx->dlc_instance);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 /* fall through */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 case DRX_NOT_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 SET_STATE( UART_SERVICE_DRX, DRX_DEAD );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 #ifdef DTILIB
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 uart_data->drx->dti_drx_state = DTI_CLOSED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 #else /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 uart_data->drx->hComm_DRX_UPLINK = VSI_ERROR;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 #endif /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 if(uart_data->drx->sending_state EQ UART_DRX_NOT_SENDING)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 * signal that there is not any more data available
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 sig_drx_tx_data_not_available_ind(uart_data->drx->dlc_instance);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 * free all resources:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 drx_free_resources();
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 uart_data->drx->sending_state = UART_DRX_INVALID;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 case DRX_DEAD:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 TRACE_ERROR( "SIG_KER_DRX_DEAD_MODE_REQ unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 } /* sig_ker_drx_dead_mode_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 | Function : sig_ker_drx_enable_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 | Description : Handles the internal signal SIG_KER_DRX_ENABLE_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 | Parameters : none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 GLOBAL void sig_ker_drx_enable_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 TRACE_ISIG( "sig_ker_drx_enable_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 uart_data->drx->data_flow = UART_FLOW_ENABLED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 switch( GET_STATE( UART_SERVICE_DRX ) )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 case DRX_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 case DRX_FLUSHING:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257 case DRX_NOT_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259 * if DRX is not already sending and there is some data to be sent out,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260 * notify service TX that there is data available
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 if(uart_data->drx->sending_state EQ UART_DRX_NOT_SENDING)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 if(uart_data->drx->received_data)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
265 sig_drx_tx_data_available_ind( uart_data->drx->dlc_instance,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266 uart_data->drx->received_data,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 uart_data->drx->read_pos);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
268 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
269 #ifdef DTILIB
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270 if( uart_data->drx->dti_drx_state NEQ DTI_CLOSED )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 SET_STATE( UART_SERVICE_DRX, DRX_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273 #ifdef FLOW_TRACE
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274 sndcp_trace_flow_control(FLOW_TRACE_UART, FLOW_TRACE_DOWN, FLOW_TRACE_TOP, TRUE);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
275 #endif /* FLOW_TRACE */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
276 dti_start(
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
277 uart_hDTI,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
278 uart_data->device,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279 UART_DTI_UP_INTERFACE,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280 uart_data->drx->dlc_instance
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281 );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283 #else /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284 if(uart_data->drx->hComm_DRX_UPLINK NEQ VSI_ERROR)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
286 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
287 * nothing more to send,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
288 * signal to higher layer that we are able to receive more data
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
289 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 PALLOC (dti_ready_ind, DTI_READY_IND);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291 SET_STATE( UART_SERVICE_DRX, DRX_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292 dti_ready_ind->tui = uart_data->tui_uart;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 dti_ready_ind->c_id = drx_get_channel_id();
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294 #ifdef _SIMULATION_
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
295 dti_ready_ind->op_ack = 0;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296 #endif /* _SIMULATION_ */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
297 #ifdef FLOW_TRACE
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
298 sndcp_trace_flow_control(FLOW_TRACE_UART, FLOW_TRACE_DOWN, FLOW_TRACE_TOP, TRUE);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
299 #endif /* FLOW_TRACE */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
300 PSEND (uart_data->drx->hComm_DRX_UPLINK, dti_ready_ind);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
301 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
302 #endif /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
303 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
304 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
305
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
306 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
307 TRACE_ERROR( "SIG_KER_DRX_ENABLE_REQ unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
308 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
309 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
310 } /* sig_ker_drx_enable_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
311
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
312
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
313
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
314 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
315 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
316 | Function : sig_ker_drx_disable_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
317 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
318 | Description : Handles the internal signal SIG_KER_DRX_DISABLE_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
319 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
320 | Parameters : none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
321 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
322 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
323 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
324 GLOBAL void sig_ker_drx_disable_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
325 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
326 TRACE_ISIG( "sig_ker_drx_disable_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
327
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
328 uart_data->drx->data_flow = UART_FLOW_DISABLED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
329
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
330 switch( GET_STATE( UART_SERVICE_DRX ) )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
331 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
332 case DRX_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
333 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
334
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
335 case DRX_FLUSHING:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
336 case DRX_NOT_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
337 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
338 * stop sending if possible
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
339 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
340 if(uart_data->drx->sending_state EQ UART_DRX_NOT_SENDING)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
341 sig_drx_tx_data_not_available_ind(uart_data->drx->dlc_instance);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
342 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
343
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
344 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
345 TRACE_ERROR( "SIG_KER_DRX_DISABLE_REQ unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
346 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
347 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
348 } /* sig_ker_drx_disable_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
349
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
350
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
351
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
352 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
353 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
354 | Function : sig_tx_drx_sending_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
355 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
356 | Description : Handles the internal signal SIG_TX_DRX_SENDING_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
357 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
358 | Parameters : dummy - description of parameter dummy
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
359 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
360 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
361 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
362 GLOBAL void sig_tx_drx_sending_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 TRACE_ISIG( "sig_tx_drx_sending_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
365
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
366 switch( GET_STATE( UART_SERVICE_DRX ) )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
367 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
368 case DRX_FLUSHING:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
369 case DRX_NOT_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
370 uart_data->drx->sending_state = UART_DRX_SENDING;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
371 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
372
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
373 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
374 TRACE_ERROR( "SIG_TX_DRX_SENDING_REQ unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
375 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
376 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
377 } /* sig_tx_drx_sending_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
378
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
379
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
380
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
381 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
382 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
383 | Function : sig_tx_drx_data_sent_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
384 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
385 | Description : Handles the internal signal SIG_TX_DRX_DATA_SENT_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
386 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
387 | Parameters : rest_data - generic data descriptor of "still to send" data
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
388 | pos - current position in first rest data buffer
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
389 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
390 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
391 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
392 GLOBAL void sig_tx_drx_data_sent_req ( T_desc2 *rest_data, USHORT pos )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
393 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
394 T_desc2 *next_desc;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
395 T_desc2 *desc;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
396
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
397 TRACE_ISIG( "sig_tx_drx_data_sent_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
398
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
399 switch( GET_STATE( UART_SERVICE_DRX ) )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
400 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
401 case DRX_DEAD:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
402 uart_data->drx->sending_state = UART_DRX_NOT_SENDING;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
403 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
404 * Since the service is dead, free all resources and the rest of data
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
405 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
406 drx_free_resources();
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
407 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
408
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
409 case DRX_NOT_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
410 if(uart_data->drx->sending_state EQ UART_DRX_INVALID)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
411 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
412 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
413 * because we are in an invalid sending state, free all resources
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
414 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
415 drx_free_resources();
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
416 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
417 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
418 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
419 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
420 * free all data descriptors in front of the remaining data
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
421 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
422 desc = uart_data->drx->received_data;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
423 while((desc NEQ rest_data) && (desc NEQ NULL))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
424 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
425 next_desc = (T_desc2 *)desc->next;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
426 MFREE (desc);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
427 desc = next_desc;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
428 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
429 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
430 * set received_data descriptor to remaining data, remember position
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
431 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
432 uart_data->drx->received_data = desc;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
433 uart_data->drx->read_pos = pos;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
434 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
435
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
436 uart_data->drx->sending_state = UART_DRX_NOT_SENDING;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
437
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
438 if(uart_data->drx->data_flow EQ UART_FLOW_ENABLED)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
439 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
440 if(uart_data->drx->received_data)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
441 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
442 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
443 * data flow is enabled and there is more data to send
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
444 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
445 sig_drx_tx_data_available_ind(uart_data->drx->dlc_instance,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
446 uart_data->drx->received_data,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
447 uart_data->drx->read_pos);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
448 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
449 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
450 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
451 * data flow is enabled but there is nothing more to send,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
452 * so do positive flow control
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
453 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
454 #ifdef DTILIB
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
455 if( uart_data->drx->dti_drx_state NEQ DTI_CLOSED )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
456 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
457 SET_STATE( UART_SERVICE_DRX, DRX_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
458 #ifdef FLOW_TRACE
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
459 sndcp_trace_flow_control(FLOW_TRACE_UART, FLOW_TRACE_DOWN, FLOW_TRACE_TOP, TRUE);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
460 #endif /* FLOW_TRACE */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
461 dti_start(
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
462 uart_hDTI,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
463 uart_data->device,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
464 UART_DTI_UP_INTERFACE,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
465 uart_data->drx->dlc_instance
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
466 );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
467 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
468 #else /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
469 if(uart_data->drx->hComm_DRX_UPLINK NEQ VSI_ERROR)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
470 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
471 PALLOC (dti_ready_ind, DTI_READY_IND);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
472 SET_STATE( UART_SERVICE_DRX, DRX_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
473 dti_ready_ind->tui = uart_data->tui_uart;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
474 dti_ready_ind->c_id = drx_get_channel_id();
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
475 #ifdef _SIMULATION_
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
476 dti_ready_ind->op_ack = 0;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
477 #endif /* _SIMULATION_ */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
478 #ifdef FLOW_TRACE
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
479 sndcp_trace_flow_control(FLOW_TRACE_UART, FLOW_TRACE_DOWN, FLOW_TRACE_TOP, TRUE);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
480 #endif /* FLOW_TRACE */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
481 PSEND (uart_data->drx->hComm_DRX_UPLINK, dti_ready_ind);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
482 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
483 #endif /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
484 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
485 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
486
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
487 case DRX_FLUSHING:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
488 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
489 * free all data descriptors in front of the remaining data
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
490 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
491 desc = uart_data->drx->received_data;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
492 while((desc NEQ rest_data) && (desc NEQ NULL))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
493 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
494 next_desc = (T_desc2 *)desc->next;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
495 MFREE (desc);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
496 desc = next_desc;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
497 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
498 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
499 * set received_data descriptor to remaining data, remember position
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
500 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
501 uart_data->drx->received_data = desc;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
502 uart_data->drx->read_pos = pos;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
503
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
504 uart_data->drx->sending_state = UART_DRX_NOT_SENDING;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
505
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
506 if(uart_data->drx->received_data)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
507 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
508 if(uart_data->drx->data_flow EQ UART_FLOW_ENABLED)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
509 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
510 * data flow is enabled and there is more data to send
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
511 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
512 sig_drx_tx_data_available_ind(uart_data->drx->dlc_instance,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
513 uart_data->drx->received_data,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
514 uart_data->drx->read_pos);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
515 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
516 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
517 #ifdef DTILIB
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
518 if(( uart_data->drx->dti_drx_state NEQ DTI_CLOSED ) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
519 (uart_data->drx->data_flow EQ UART_FLOW_ENABLED))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
520 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
521 SET_STATE( UART_SERVICE_DRX, DRX_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
522 sig_any_ker_flushed_ind(uart_data->drx->dlc_instance);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
523 #ifdef FLOW_TRACE
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
524 sndcp_trace_flow_control(FLOW_TRACE_UART, FLOW_TRACE_DOWN, FLOW_TRACE_TOP, TRUE);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
525 #endif /* FLOW_TRACE */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
526 dti_start(
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
527 uart_hDTI,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
528 uart_data->device,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
529 UART_DTI_UP_INTERFACE,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
530 uart_data->drx->dlc_instance
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
531 );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
532 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
533 #else /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
534 if((uart_data->drx->hComm_DRX_UPLINK NEQ VSI_ERROR) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
535 (uart_data->drx->data_flow EQ UART_FLOW_ENABLED))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
536 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
537 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
538 * data flow is enabled but there is nothing more to send,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
539 * so send flush signal and positive flow control
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
540 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
541 PALLOC (dti_ready_ind, DTI_READY_IND);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
542 SET_STATE( UART_SERVICE_DRX, DRX_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
543 sig_any_ker_flushed_ind(uart_data->drx->dlc_instance);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
544 dti_ready_ind->tui = uart_data->tui_uart;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
545 dti_ready_ind->c_id = drx_get_channel_id();
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
546 #ifdef _SIMULATION_
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
547 dti_ready_ind->op_ack = 0;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
548 #endif /* _SIMULATION_ */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
549 #ifdef FLOW_TRACE
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
550 sndcp_trace_flow_control(FLOW_TRACE_UART, FLOW_TRACE_DOWN, FLOW_TRACE_TOP, TRUE);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
551 #endif /* FLOW_TRACE */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
552 PSEND (uart_data->drx->hComm_DRX_UPLINK, dti_ready_ind);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
553 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
554 #endif /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
555 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
556 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
557 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
558 * data flushed
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
559 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
560 SET_STATE( UART_SERVICE_DRX, DRX_NOT_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
561 #ifdef DTILIB
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
562 dti_stop(
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
563 uart_hDTI,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
564 uart_data->device,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
565 UART_DTI_UP_INTERFACE,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
566 uart_data->drx->dlc_instance
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
567 );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
568 #endif /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
569 sig_any_ker_flushed_ind(uart_data->drx->dlc_instance);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
570 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
571 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
572
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
573 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
574 TRACE_ERROR( "SIG_TX_DRX_DATA_SENT_REQ unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
575 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
576 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
577 } /* sig_tx_drx_data_sent_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
578
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
579
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
580
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
581 #ifdef DTILIB
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
582
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
583 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
584 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
585 | Function : sig_ker_drx_disconnected_mode_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
586 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
587 | Description : Handles the internal signal SIG_KER_DRX_DISCONNECTED_MODE_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
588 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
589 | Parameters : none
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
590 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
591 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
592 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
593 GLOBAL void sig_ker_drx_disconnected_mode_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
594 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
595 TRACE_ISIG( "sig_ker_drx_disconnected_mode_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
596
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
597 uart_data->drx->dti_drx_state = DTI_CLOSED;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
598
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
599 switch(GET_STATE( UART_SERVICE_DRX) )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
600 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
601 case DRX_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
602 SET_STATE( UART_SERVICE_DRX, DRX_NOT_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
603 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
604 case DRX_NOT_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
605 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
606 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
607 TRACE_ERROR( "SIG_KER_DRX_DISCONNECTED_MODE_REQ unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
608 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
609 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
610
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
611 } /* sig_ker_drx_disconnected_mode_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
612
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
613
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
614
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
615 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
616 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
617 | Function : sig_ker_drx_set_dtilib_peer_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
618 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
619 | Description : Handles the internal signal SIG_KER_DRX_SET_DTI_PEER_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
620 | which is used to inform the service DRX that from now on it
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
621 | needs to communicate with a (new) peer
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
622 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
623 | Parameters : -
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
624 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
625 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
626 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
627 GLOBAL void sig_ker_drx_set_dtilib_peer_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
628 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
629 TRACE_ISIG( "sig_ker_drx_set_dtilib_peer_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
630
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
631 uart_data->drx->dti_drx_state = DTI_IDLE;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
632
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
633 switch( GET_STATE( UART_SERVICE_DRX ) )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
634 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
635 case DRX_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
636 case DRX_NOT_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
637 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
638 * signal availability to higher layer if currently not sending
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
639 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
640 if((uart_data->drx->received_data EQ NULL) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
641 (uart_data->drx->data_flow EQ UART_FLOW_ENABLED) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
642 (uart_data->drx->sending_state EQ UART_DRX_NOT_SENDING))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
643 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
644 SET_STATE( UART_SERVICE_DRX, DRX_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
645 #ifdef FLOW_TRACE
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
646 sndcp_trace_flow_control(FLOW_TRACE_UART, FLOW_TRACE_DOWN, FLOW_TRACE_TOP, TRUE);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
647 #endif /* FLOW_TRACE */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
648 dti_start(
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
649 uart_hDTI,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
650 uart_data->device,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
651 UART_DTI_UP_INTERFACE,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
652 uart_data->drx->dlc_instance
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
653 );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
654 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
655 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
656 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
657 SET_STATE( UART_SERVICE_DRX, DRX_NOT_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
658 dti_stop(
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
659 uart_hDTI,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
660 uart_data->device,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
661 UART_DTI_UP_INTERFACE,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
662 uart_data->drx->dlc_instance
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
663 );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
664 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
665 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
666
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
667 case DRX_FLUSHING:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
668 case DRX_DEAD:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
669 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
670
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
671 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
672 TRACE_ERROR( "SIG_KER_DRX_SET_DTI_PEER_REQ unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
673 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
674 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
675 } /* sig_ker_drx_set_dtilib_peer_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
676
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
677
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
678 #else /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
679
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
680 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
681 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
682 | Function : sig_ker_drx_set_dti_peer_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
683 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
684 | Description : Handles the internal signal SIG_KER_DRX_SET_DTI_PEER_REQ
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
685 | which is used to inform the service DRX that from now on it
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
686 | needs to communicate with a (new) peer
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
687 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
688 | Parameters : tui_peer - transmission unit identifier of peer
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
689 | peer_handle - VSI handle of peer (channel has to be opened)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
690 | c_id - channel identifier of peer
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
691 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
692 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
693 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
694 GLOBAL void sig_ker_drx_set_dti_peer_req (USHORT tui_peer,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
695 T_HANDLE peer_handle,
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
696 UBYTE c_id)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
697 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
698 USHORT i,pos;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
699
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
700 TRACE_ISIG( "sig_ker_drx_set_dti_peer_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
701
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
702 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
703 * set new vsi handle and
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
704 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
705 uart_data->drx->hComm_DRX_UPLINK = peer_handle;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
706
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
707 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
708 * search position in table
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
709 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
710 pos = UART_INSTANCES * UART_MAX_NUMBER_OF_CHANNELS;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
711 for(i = 0; i < pos; i++)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
712 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
713 if((uart_cid_table[i].drx EQ uart_data->drx) ||
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
714 (uart_cid_table[i].c_id EQ c_id))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
715 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
716 pos = i;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
717 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
718 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
719
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
720 if(pos < (UART_INSTANCES * UART_MAX_NUMBER_OF_CHANNELS))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
721 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
722 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
723 * valid position in table, update entry
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
724 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
725 uart_cid_table[pos].c_id = c_id;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
726 uart_cid_table[pos].drx = uart_data->drx;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
727 uart_cid_table[pos].uart_data = uart_data;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
728 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
729 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
730 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
731 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
732 * create new entry in table
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
733 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
734 for(i = 0; i < UART_INSTANCES * UART_MAX_NUMBER_OF_CHANNELS; i++)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
735 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
736 if(uart_cid_table[i].dtx EQ NULL)
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
737 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
738 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
739 * free space found, insert data
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
740 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
741 uart_cid_table[i].c_id = c_id;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
742 uart_cid_table[i].drx = uart_data->drx;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
743 uart_cid_table[i].uart_data = uart_data;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
744 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
745 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
746 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
747 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
748
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
749 switch( GET_STATE( UART_SERVICE_DRX ) )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
750 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
751 case DRX_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
752 case DRX_NOT_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
753 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
754 * signal availability to higher layer if currently not sending
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
755 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
756 if((uart_data->drx->received_data EQ NULL) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
757 (uart_data->drx->data_flow EQ UART_FLOW_ENABLED) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
758 (uart_data->drx->sending_state EQ UART_DRX_NOT_SENDING))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
759 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
760 PALLOC (dti_ready_ind, DTI_READY_IND);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
761 SET_STATE( UART_SERVICE_DRX, DRX_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
762 dti_ready_ind->tui = uart_data->tui_uart;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
763 dti_ready_ind->c_id = drx_get_channel_id();
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
764 #ifdef _SIMULATION_
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
765 dti_ready_ind->op_ack = 0;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
766 #endif /* _SIMULATION_ */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
767 #ifdef FLOW_TRACE
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
768 sndcp_trace_flow_control(FLOW_TRACE_UART, FLOW_TRACE_DOWN, FLOW_TRACE_TOP, TRUE);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
769 #endif /* FLOW_TRACE */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
770 PSEND (uart_data->drx->hComm_DRX_UPLINK, dti_ready_ind);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
771 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
772 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
773 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
774 SET_STATE( UART_SERVICE_DRX, DRX_NOT_READY );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
775 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
776 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
777
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
778 case DRX_FLUSHING:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
779 case DRX_DEAD:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
780 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
781
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
782 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
783 TRACE_ERROR( "SIG_KER_DRX_SET_DTI_PEER_REQ unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
784 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
785 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
786 } /* sig_ker_drx_set_dti_peer_req() */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
787
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
788 #endif /* DTILIB */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
789
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
790
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
791 /*
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
792 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
793 | Function : sig_ker_drx_flush_req
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
794 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
795 | Description : Handles the internal signal SIG_KER_DRX_FLUSH_REQ which is used
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
796 | to trigger flushing of the service.
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
797 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
798 | Parameters : no parameters
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
799 |
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
800 +------------------------------------------------------------------------------
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
801 */
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
802 GLOBAL void sig_ker_drx_flush_req ()
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
803 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
804 TRACE_ISIG( "sig_ker_drx_flush_req" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
805
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
806 switch( GET_STATE( UART_SERVICE_DRX ) )
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
807 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
808 case DRX_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
809 sig_any_ker_flushed_ind(uart_data->drx->dlc_instance);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
810 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
811
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
812 case DRX_NOT_READY:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
813 if((uart_data->drx->received_data) &&
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
814 (uart_data->drx->sending_state NEQ UART_DRX_INVALID))
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
815 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
816 SET_STATE( UART_SERVICE_DRX, DRX_FLUSHING );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
817 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
818 else
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
819 {
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
820 sig_any_ker_flushed_ind(uart_data->drx->dlc_instance);
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
821 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
822 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
823
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
824 case DRX_FLUSHING:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
825 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
826
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
827 default:
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
828 TRACE_ERROR( "SIG_KER_DRX_FLUSH_REQ unexpected" );
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
829 break;
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
830 }
53929b40109c src/g23m-aci: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
831 } /* sig_ker_drx_flush_req() */