annotate cdg-hybrid/cdginc/p_mac.h @ 629:3231dd9b38c1

armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Jan 2020 05:38:26 +0000
parents e7a67accfad9
children
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1 /*
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2 +--------------------------------------------------------------------------+
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3 | PROJECT : PROTOCOL STACK |
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4 | FILE : p_mac.h |
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5 | SOURCE : "sap\mac.pdf" |
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6 | LastModified : "2003-02-26" |
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7 | IdAndVersion : "8441.111.03.009" |
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8 | SrcFileTime : "Thu Nov 29 09:45:32 2007" |
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9 | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
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11 +--------------------------------------------------------------------------+
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12 */
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13
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14 /* PRAGMAS
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15 * PREFIX : NONE
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO
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18 * ENABLE_GROUP: NO
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19 * CAPITALIZE_TYPENAME: NO
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20 */
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21
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22
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23 #ifndef P_MAC_H
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24 #define P_MAC_H
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25
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26
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27 #define CDG_ENTER__P_MAC_H
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28
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29 #define CDG_ENTER__FILENAME _P_MAC_H
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30 #define CDG_ENTER__P_MAC_H__FILE_TYPE CDGINC
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31 #define CDG_ENTER__P_MAC_H__LAST_MODIFIED _2003_02_26
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32 #define CDG_ENTER__P_MAC_H__ID_AND_VERSION _8441_111_03_009
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33
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34 #define CDG_ENTER__P_MAC_H__SRC_FILE_TIME _Thu_Nov_29_09_45_32_2007
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35
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36 #include "CDG_ENTER.h"
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37
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38 #undef CDG_ENTER__P_MAC_H
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39
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40 #undef CDG_ENTER__FILENAME
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41
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42
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43 #include "p_mac.val"
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44
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45 #ifndef __T_ul_poll_resp__
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46 #define __T_ul_poll_resp__
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47 /*
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48 * Uplink Poll Response
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49 * CCDGEN:WriteStruct_Count==1778
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50 */
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51 typedef struct
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52 {
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53 U16 block_status; /*< 0: 2> Block Status */
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54 U16 tn; /*< 2: 2> Timeslot number */
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55 U16 ul_block[13]; /*< 4: 26> Uplink block */
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56 U8 _align0; /*< 30: 1> alignment */
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57 U8 _align1; /*< 31: 1> alignment */
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58 } T_ul_poll_resp;
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59 #endif
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60
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61 #ifndef __T_ul_data__
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62 #define __T_ul_data__
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63 /*
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64 * Uplink Data
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65 * CCDGEN:WriteStruct_Count==1779
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66 */
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67 typedef struct
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68 {
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69 U16 block_status; /*< 0: 2> Block Status */
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70 U16 ul_block[28]; /*< 2: 56> Uplink block */
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71 U8 _align0; /*< 58: 1> alignment */
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72 U8 _align1; /*< 59: 1> alignment */
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73 } T_ul_data;
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74 #endif
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75
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76 #ifndef __T_dl_data__
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77 #define __T_dl_data__
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78 /*
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79 * Downlink Data
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80 * CCDGEN:WriteStruct_Count==1780
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81 */
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82 typedef struct
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83 {
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84 U16 block_status; /*< 0: 2> Block Status */
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85 U16 tn; /*< 2: 2> Timeslot number */
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86 U16 d_macc; /*< 4: 2> Accumulated Metric */
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87 U16 d_nerr; /*< 6: 2> Number of estimated erorrs */
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88 U16 dl_block[27]; /*< 8: 54> Downlink block */
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89 U8 _align0; /*< 62: 1> alignment */
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90 U8 _align1; /*< 63: 1> alignment */
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91 } T_dl_data;
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92 #endif
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93
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94
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95 /*
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96 * End of substructure section, begin of primitive definition section
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97 */
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98
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99 #ifndef __T_MAC_DATA_REQ__
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100 #define __T_MAC_DATA_REQ__
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101 /*
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102 *
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103 * CCDGEN:WriteStruct_Count==1781
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104 */
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105 typedef struct
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106 {
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107 T_ul_data ul_data; /*< 0: 60> Uplink Data */
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108 } T_MAC_DATA_REQ;
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109 #endif
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110
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111 #ifndef __T_MAC_DATA_IND__
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112 #define __T_MAC_DATA_IND__
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113 /*
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114 *
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115 * CCDGEN:WriteStruct_Count==1782
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116 */
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117 typedef struct
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118 {
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119 U32 fn; /*< 0: 4> Framenumber */
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120 U16 rx_no; /*< 4: 2> Number of received Timeslots */
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121 U8 _align0; /*< 6: 1> alignment */
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122 U8 _align1; /*< 7: 1> alignment */
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123 T_dl_data dl_data; /*< 8: 64> Downlink Data */
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124 } T_MAC_DATA_IND;
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125 #endif
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126
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127 #ifndef __T_MAC_READY_IND__
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128 #define __T_MAC_READY_IND__
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129 /*
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130 *
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131 * CCDGEN:WriteStruct_Count==1783
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132 */
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133 typedef struct
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134 {
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135 U8 nts; /*< 0: 1> Maximum number of Timeslots for uplink TBF */
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136 U8 _align0; /*< 1: 1> alignment */
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137 U8 _align1; /*< 2: 1> alignment */
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138 U8 _align2; /*< 3: 1> alignment */
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139 U32 fn; /*< 4: 4> Framenumber */
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140 U8 rlc_blocks_sent; /*< 8: 1> number of transmitted rlc/mac blocks (except polling) */
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141 U8 last_poll_resp; /*< 9: 1> Last Poll Response */
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142 U8 ta_value; /*< 10: 1> Timing Advance Value */
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143 U8 _align3; /*< 11: 1> alignment */
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144 } T_MAC_READY_IND;
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145 #endif
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146
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147 #ifndef __T_MAC_POLL_REQ__
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148 #define __T_MAC_POLL_REQ__
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149 /*
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150 *
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151 * CCDGEN:WriteStruct_Count==1784
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152 */
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153 typedef struct
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154 {
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155 T_ul_poll_resp ul_poll_resp; /*< 0: 32> Uplink Poll Response */
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156 } T_MAC_POLL_REQ;
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157 #endif
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158
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159 #ifndef __T_MAC_PWR_CTRL_IND__
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160 #define __T_MAC_PWR_CTRL_IND__
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161 /*
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162 *
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163 * CCDGEN:WriteStruct_Count==1785
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164 */
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165 typedef struct
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166 {
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167 U32 assignment_id; /*< 0: 4> assignment identifier; . */
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168 U8 crc_error; /*< 4: 1> CRC error; . */
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169 U8 bcch_level; /*< 5: 1> Signal level of BCCH serving Cell; . */
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170 U16 radio_freq[MAC_BURST_PER_BLOCK]; /*< 6: 8> Radio frequency of the TDMA frame; . */
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171 U8 burst_level[MAC_BURST_PER_BLOCK]; /*< 14: 4> Signal level of the first valid downlink PDCH; . */
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172 U8 _align0; /*< 18: 1> alignment */
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173 U8 _align1; /*< 19: 1> alignment */
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174 } T_MAC_PWR_CTRL_IND;
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175 #endif
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176
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177
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178 #include "CDG_LEAVE.h"
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179
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180
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181 #endif