annotate cdg211/cdginc/p_cst.h @ 629:3231dd9b38c1

armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Jan 2020 05:38:26 +0000
parents 56abf6cf8a0b
children
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1 /*
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2 +--------------------------------------------------------------------------+
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3 | PROJECT : PROTOCOL STACK |
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4 | FILE : p_cst.h |
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5 | SOURCE : "__out__\g23m_dfile\prim\cst.pdf" |
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6 | LastModified : "1999-09-21" |
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7 | IdAndVersion : "8415.060.99.003" |
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8 | SrcFileTime : "Mon Nov 24 15:50:30 2003" |
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9 | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:14 2007 |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
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11 +--------------------------------------------------------------------------+
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12 */
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13
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14 /* PRAGMAS
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15 * PREFIX : NONE
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO
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18 * ENABLE_GROUP: NO
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19 * CAPITALIZE_TYPENAME: NO
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20 */
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21
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23 #ifndef P_CST_H
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24 #define P_CST_H
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27 #define CDG_ENTER__P_CST_H
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28
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29 #define CDG_ENTER__FILENAME _P_CST_H
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30 #define CDG_ENTER__P_CST_H__FILE_TYPE CDGINC
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31 #define CDG_ENTER__P_CST_H__LAST_MODIFIED _1999_09_21
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32 #define CDG_ENTER__P_CST_H__ID_AND_VERSION _8415_060_99_003
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33
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34 #define CDG_ENTER__P_CST_H__SRC_FILE_TIME _Mon_Nov_24_15_50_30_2003
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36 #include "CDG_ENTER.h"
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38 #undef CDG_ENTER__P_CST_H
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40 #undef CDG_ENTER__FILENAME
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43 #include "p_cst.val"
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44
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46 /*
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47 * End of substructure section, begin of primitive definition section
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48 */
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49
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50 #ifndef __T_CST_ADC_IND__
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51 #define __T_CST_ADC_IND__
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52 /*
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53 *
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54 * CCDGEN:WriteStruct_Count==894
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55 */
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56 typedef struct
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57 {
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58 U16 adc_values[9]; /*< 0: 18> AD conversion values */
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59 U8 _align0; /*< 18: 1> alignment */
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60 U8 _align1; /*< 19: 1> alignment */
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61 } T_CST_ADC_IND;
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62 #endif
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63
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64 #ifndef __T_CST_VM_STOP_PLAY_IND__
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65 #define __T_CST_VM_STOP_PLAY_IND__
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66 /*
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67 *
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68 * CCDGEN:WriteStruct_Count==895
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69 */
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70 typedef struct
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71 {
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72 U32 stop_address; /*< 0: 4> contains stop address */
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73 } T_CST_VM_STOP_PLAY_IND;
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74 #endif
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75
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76 #ifndef __T_CST_VM_STOP_RECORD_IND__
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77 #define __T_CST_VM_STOP_RECORD_IND__
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78 /*
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79 *
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80 * CCDGEN:WriteStruct_Count==896
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81 */
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82 typedef struct
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83 {
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84 U32 stop_address; /*< 0: 4> contains stop address */
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85 } T_CST_VM_STOP_RECORD_IND;
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86 #endif
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87
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88 #ifndef __T_CST_SR_IND__
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89 #define __T_CST_SR_IND__
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90 /*
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91 *
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92 * CCDGEN:WriteStruct_Count==897
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93 */
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94 typedef struct
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95 {
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96 U8 error_code; /*< 0: 1> Error code */
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97 U8 index; /*< 1: 1> Index */
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98 U8 _align0; /*< 2: 1> alignment */
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99 U8 _align1; /*< 3: 1> alignment */
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100 } T_CST_SR_IND;
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101 #endif
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102
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103
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104 #include "CDG_LEAVE.h"
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105
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106
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107 #endif