FreeCalypso > hg > fc-magnetite
annotate cdg211/cdginc/p_uart.val @ 629:3231dd9b38c1
armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets
Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively,
and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code
for C-Sample and earlier turns them into GPIOs configured as outputs also
driving 1 - so far, so good - but TI's code for BOARD 41 (which covers
D-Sample, Leonardo and all real world Calypso devices derived from the
latter) switches them from MCUEN to GPIOs, but then leaves them as inputs.
Given that the hardware powerup state of these two pins is outputs driving 1,
every Calypso board design MUST be compatible with such driving; typically
these GPIO signals will be either unused and unconnected or connected as
outputs driving some peripheral. Turning these pins into GPIO inputs will
result in floating inputs on every reasonably-wired board, thus I am
convinced that this configuration is nothing but a bug on the part of
whoever wrote this code at TI.
This floating input bug had already been fixed earlier for GTA modem and
FCDEV3B targets; the present change makes the fix unconditional for all
"classic" targets. The newly affected targets are D-Sample, Leonardo,
Tango and GTM900.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 02 Jan 2020 05:38:26 +0000 |
parents | 56abf6cf8a0b |
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rev | line source |
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1 /* |
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2 +--------------------------------------------------------------------------+ |
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3 | PROJECT : PROTOCOL STACK | |
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4 | FILE : p_uart.val | |
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5 | SOURCE : "__out__\g23m_dfile\prim\uart.pdf" | |
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6 | LastModified : "2002-03-11" | |
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7 | IdAndVersion : "8441.117.99.014" | |
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8 | SrcFileTime : "Tue Nov 30 11:21:48 2004" | |
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9 | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:16 2007 | |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | |
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11 +--------------------------------------------------------------------------+ |
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12 */ |
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13 |
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14 /* PRAGMAS |
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15 * PREFIX : NONE |
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX) |
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO |
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18 * ENABLE_GROUP: NO |
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19 * CAPITALIZE_TYPENAME: NO |
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20 */ |
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21 |
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22 |
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23 #ifndef P_UART_VAL |
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24 #define P_UART_VAL |
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25 |
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26 |
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27 #define CDG_ENTER__P_UART_VAL |
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28 |
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29 #define CDG_ENTER__FILENAME _P_UART_VAL |
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30 #define CDG_ENTER__P_UART_VAL__FILE_TYPE CDGINC |
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31 #define CDG_ENTER__P_UART_VAL__LAST_MODIFIED _2002_03_11 |
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32 #define CDG_ENTER__P_UART_VAL__ID_AND_VERSION _8441_117_99_014 |
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33 |
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34 #define CDG_ENTER__P_UART_VAL__SRC_FILE_TIME _Tue_Nov_30_11_21_48_2004 |
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35 |
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36 #include "CDG_ENTER.h" |
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37 |
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38 #undef CDG_ENTER__P_UART_VAL |
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39 |
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40 #undef CDG_ENTER__FILENAME |
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41 |
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42 |
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43 /* |
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44 * Value constants for VAL_esc_valid |
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45 */ |
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46 #define UART_IO_ESC_UNDEF (0x0) /* values for escape sequence detection remain unchanged */ |
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47 #define UART_IO_ESC_VALID (0x1) /* values for escape sequence detection are valid */ |
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48 |
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49 /* |
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50 * Value constants for VAL_xoff |
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51 */ |
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52 #define UART_IO_XOFF_DEFAULT (0x13) /* default value for XOff character */ |
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53 |
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54 /* |
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55 * Value constants for VAL_xon |
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56 */ |
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57 #define UART_IO_XON_DEFAULT (0x11) /* default value for XOn character */ |
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58 |
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59 /* |
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60 * Value constants for VAL_parity |
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61 */ |
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62 #define UART_IO_PA_UNDEF (0xff) /* parity remain unchanged */ |
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63 #define UART_IO_PA_NONE (0x0) /* no parity and no space */ |
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64 #define UART_IO_PA_EVEN (0x1) /* even parity */ |
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65 #define UART_IO_PA_ODD (0x2) /* odd parity */ |
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66 #define UART_IO_PA_SPACE (0x3) /* no parity but space */ |
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67 |
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68 /* |
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69 * Value constants for VAL_flow_tx |
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70 */ |
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71 #define UART_IO_FC_TX_UNDEF (0xff) /* TX flow control mode remain unchanged */ |
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72 #define UART_IO_FC_TX_NONE (0x0) /* no TX flow control */ |
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73 #define UART_IO_FC_TX_RTS (0x1) /* RTS/CTS flow control */ |
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74 #define UART_IO_FC_TX_XOFF (0x2) /* XON/XOFF flow control */ |
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75 |
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76 /* |
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77 * Value constants for VAL_esc_char |
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78 */ |
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79 #define UART_IO_ESC_CHAR_DEFAULT (0x2b) /* default value for escape character ('+') */ |
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80 |
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81 /* |
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82 * Value constants for VAL_flow_rx |
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83 */ |
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84 #define UART_IO_FC_RX_UNDEF (0xff) /* RX flow control mode remain unchanged */ |
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85 #define UART_IO_FC_RX_NONE (0x0) /* no RX flow control */ |
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86 #define UART_IO_FC_RX_RTS (0x1) /* RTS/CTS flow control */ |
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87 #define UART_IO_FC_RX_XOFF (0x2) /* XON/XOFF flow control */ |
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88 |
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89 /* |
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90 * Value constants for VAL_nsb |
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91 */ |
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92 #define UART_IO_SB_UNDEF (0xff) /* stop bits remain unchanged */ |
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93 #define UART_IO_SB_1 (0x1) /* one stop bit */ |
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94 #define UART_IO_SB_2 (0x2) /* two stop bits */ |
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95 |
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96 /* |
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97 * Value constants for VAL_speed |
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98 */ |
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99 #define UART_IO_SPEED_UNDEF (0xff) /* baud rate remain unchanged */ |
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100 #define UART_IO_SPEED_AUTO (0x0) /* auto detection of baud rate */ |
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101 #define UART_IO_SPEED_75 (0x1) /* baud rate of 75 bits per second */ |
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102 #define UART_IO_SPEED_150 (0x2) /* baud rate of 150 bits per second */ |
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103 #define UART_IO_SPEED_300 (0x3) /* baud rate of 300 bits per second */ |
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104 #define UART_IO_SPEED_600 (0x4) /* baud rate of 600 bits per second */ |
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105 #define UART_IO_SPEED_1200 (0x5) /* baud rate of 1200 bits per second */ |
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106 #define UART_IO_SPEED_2400 (0x6) /* baud rate of 2400 bits per second */ |
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107 #define UART_IO_SPEED_4800 (0x7) /* baud rate of 4800 bits per second */ |
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108 #define UART_IO_SPEED_7200 (0x8) /* baud rate of 7200 bits per second */ |
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109 #define UART_IO_SPEED_9600 (0x9) /* baud rate of 9600 bits per second */ |
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110 #define UART_IO_SPEED_14400 (0xa) /* baud rate of 14400 bits per second */ |
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111 #define UART_IO_SPEED_19200 (0xb) /* baud rate of 19200 bits per second */ |
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112 #define UART_IO_SPEED_28800 (0xc) /* baud rate of 28800 bits per second */ |
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113 #define UART_IO_SPEED_33900 (0xd) /* baud rate of 33900 bits per second */ |
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114 #define UART_IO_SPEED_38400 (0xe) /* baud rate of 38400 bits per second */ |
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115 #define UART_IO_SPEED_57600 (0xf) /* baud rate of 57600 bits per second */ |
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116 #define UART_IO_SPEED_115200 (0x10) /* baud rate of 115200 bits per second */ |
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117 #define UART_IO_SPEED_203125 (0x11) /* baud rate of 203125 bits per second */ |
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118 #define UART_IO_SPEED_406250 (0x12) /* baud rate of 406250 bits per second */ |
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119 #define UART_IO_SPEED_812500 (0x13) /* baud rate of 812500 bits per second */ |
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120 |
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121 /* |
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122 * Value constants for VAL_esc_gp |
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123 */ |
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124 #define UART_IO_ESC_GP_DEFAULT (0x3e8) /* default value for guard period (1000 ms) */ |
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125 #define UART_IO_ESC_OFF (0x0) /* no escape sequence detection */ |
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126 |
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127 /* |
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128 * Value constants for VAL_xoff_valid |
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129 */ |
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130 #define UART_IO_XOFF_UNDEF (0x0) /* XOff character remain unchanged */ |
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131 #define UART_IO_XOFF_VALID (0x1) /* XOff character valid */ |
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132 |
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133 /* |
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134 * Value constants for VAL_xon_valid |
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135 */ |
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136 #define UART_IO_XON_UNDEF (0x0) /* XOn character remain unchanged */ |
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137 #define UART_IO_XON_VALID (0x1) /* XOn character valid */ |
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138 |
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139 /* |
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140 * Value constants for VAL_bpc |
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141 */ |
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142 #define UART_IO_BPC_UNDEF (0xff) /* bits per character remain unchanged */ |
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143 #define UART_IO_BPC_7 (0x7) /* 7 bits per character */ |
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144 #define UART_IO_BPC_8 (0x8) /* 8 bits per character */ |
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145 |
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146 /* |
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147 * Value constants for VAL_dti_conn |
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148 */ |
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149 #define UART_CONNECT_DTI (0x0) /* Connect DTI to UART */ |
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150 #define UART_DISCONNECT_DTI (0x1) /* Disconnect DTI from UART */ |
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151 |
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152 /* |
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153 * Value constants for VAL_line_state |
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154 */ |
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155 #define UART_LINE_ON (0x0) /* activate line */ |
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156 #define UART_LINE_OFF (0x1) /* deactivate line */ |
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157 |
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158 /* |
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159 * Value constants for VAL_detection |
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160 */ |
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161 #define UART_ESC_DETECTION_OFF (0x0) /* turn off escape sequence detection */ |
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162 #define UART_ESC_DETECTION_ON (0x1) /* turn on escape sequence detection */ |
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163 |
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164 /* |
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165 * Value constants for VAL_cause |
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166 */ |
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167 #define UART_DETECT_ESC (0x1) /* escape sequence detected */ |
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168 #define UART_DETECT_DTR (0x2) /* DTR line of serial link drops */ |
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169 |
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170 /* |
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171 * Value constants for VAL_error |
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172 */ |
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173 #define UART_ERROR_NO_CHANNEL (0x8) /* can not open VSI communication channel */ |
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174 #define UART_ERROR_MUX_ESTABLISH_FAIL (0x9) /* establishment of multiplexer operation fails */ |
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175 #define UART_ERROR_MUX_NO_RESPONSE (0xa) /* no response from TE multiplexer */ |
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176 |
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177 /* |
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178 * Value constants for VAL_mode |
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179 */ |
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180 #define UART_MUX_MODE_BASIC (0x0) /* basic option */ |
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181 #define UART_MUX_MODE_ADVANCED (0x1) /* advanced option */ |
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182 |
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183 /* |
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184 * Value constants for VAL_frame_type |
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185 */ |
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186 #define UART_MUX_FRAME_UIH (0x0) /* UIH frames used only */ |
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187 #define UART_MUX_FRAME_UI (0x1) /* UI frames used only */ |
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188 #define UART_MUX_FRAME_I (0x2) /* I frames used only */ |
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189 #define UART_MUX_FRAME_DEFAULT (0x0) /* default value */ |
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190 |
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191 /* |
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192 * Value constants for VAL_n1 |
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193 */ |
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194 #define UART_MUX_N1_BASIC_DEFAULT (0x1f) /* default value for the basic option */ |
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195 #define UART_MUX_N1_ADVANCED_DEFAULT (0x40) /* default value for the advanced option */ |
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196 |
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197 /* |
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198 * Value constants for VAL_t1 |
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199 */ |
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200 #define UART_MUX_T1_DEFAULT (0xa) /* default value (100 ms) */ |
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201 |
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202 /* |
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203 * Value constants for VAL_n2 |
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204 */ |
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205 #define UART_MUX_N2_DEFAULT (0x3) /* default value */ |
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206 |
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207 /* |
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208 * Value constants for VAL_t2 |
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209 */ |
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210 #define UART_MUX_T2_DEFAULT (0x1e) /* default value (300 ms) */ |
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211 |
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212 /* |
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213 * Value constants for VAL_t3 |
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214 */ |
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215 #define UART_MUX_T3_DEFAULT (0xa) /* default value (10 seconds) */ |
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216 |
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217 /* |
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218 * Value constants for VAL_convergence |
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219 */ |
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220 #define UART_MUX_CONVERGENCE_UOS (0x1) /* unstructed octet stream */ |
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221 #define UART_MUX_CONVERGENCE_UOSV24 (0x2) /* unstructed octet stream with transmission of V.24 signal states */ |
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222 #define UART_MUX_CONVERGENCE_UFD (0x3) /* uninterruptible framed data */ |
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223 #define UART_MUX_CONVERGENCE_IFD (0x4) /* interruptible framed data */ |
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224 #define UART_MUX_CONVERGENCE_DEFAULT (0x1) /* default value */ |
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225 |
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226 /* |
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227 * Value constants for VAL_service |
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228 */ |
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229 #define UART_MUX_SERVICE_AT (0x0) /* AT command mode */ |
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230 #define UART_MUX_SERVICE_DATA (0x1) /* data service */ |
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231 #define UART_MUX_SERVICE_VOICE_0621 (0x2) /* voice service (coded - GSM 06.21) */ |
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232 #define UART_MUX_SERVICE_VOICE_PCM64U (0x3) /* voice service (coded - PCM 64 kbits/s U-law) */ |
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233 #define UART_MUX_SERVICE_VOICE_ADPCM (0x4) /* voice service (coded - ADPCM 32 kbits/s) */ |
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234 #define UART_MUX_SERVICE_VOICE_PCM64A (0x5) /* voice service (coded - PCM 64 kbits/s A-law) */ |
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235 #define UART_MUX_SERVICE_VOICE_PCM128 (0x6) /* voice service (coded - PCM 128 kbits/s) */ |
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236 #define UART_MUX_SERVICE_GPRS (0x7) /* GPRS data */ |
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237 #define UART_MUX_SERVICE_CS (0x8) /* Circuit-Switched data */ |
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238 #define UART_MUX_SERVICE_TRACE (0x9) /* Trace / Debug output */ |
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239 #define UART_MUX_SERVICE_DEFAULT (0x0) /* default value */ |
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240 |
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241 /* |
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242 * user defined constants |
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243 */ |
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244 #define UART_DLCI_NOT_MULTIPLEXED (0x0) |
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245 |
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246 #include "CDG_LEAVE.h" |
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247 |
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248 |
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249 #endif |