FreeCalypso > hg > fc-magnetite
annotate cdg3/fflags-conservative.h @ 629:3231dd9b38c1
armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets
Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively,
and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code
for C-Sample and earlier turns them into GPIOs configured as outputs also
driving 1 - so far, so good - but TI's code for BOARD 41 (which covers
D-Sample, Leonardo and all real world Calypso devices derived from the
latter) switches them from MCUEN to GPIOs, but then leaves them as inputs.
Given that the hardware powerup state of these two pins is outputs driving 1,
every Calypso board design MUST be compatible with such driving; typically
these GPIO signals will be either unused and unconnected or connected as
outputs driving some peripheral. Turning these pins into GPIO inputs will
result in floating inputs on every reasonably-wired board, thus I am
convinced that this configuration is nothing but a bug on the part of
whoever wrote this code at TI.
This floating input bug had already been fixed earlier for GTA modem and
FCDEV3B targets; the present change makes the fix unconditional for all
"classic" targets. The newly affected targets are D-Sample, Leonardo,
Tango and GTM900.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 02 Jan 2020 05:38:26 +0000 |
parents | c15047b3d00d |
children |
rev | line source |
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16
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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1 /* |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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2 * This version of fflags.h (ccdgen config file) is a FreeCalypso concoction. |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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3 * Here I set all feature flags to OFF in order to create a configuration |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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4 * that mimics the TCS211 program. |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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5 */ |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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6 |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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7 #undef FF_PS_RSSI |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
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8 #undef SIM_PERS |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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9 #undef FF_PHONE_LOCK |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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10 #undef TI_PS_FF_AT_CMD_P_ECC |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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11 #undef TI_PS_FF_REL99_AND_ABOVE |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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12 #undef TI_DUAL_MODE |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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13 #undef REL99 |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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14 #undef FF_BHO |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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15 #undef TI_PS_FF_EMR |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
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16 #undef TI_PS_FF_RTD |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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17 #undef FF_EGPRS |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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18 #undef REL4 |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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19 #undef TI_PS_FF_TBF_EST_PACCH |
c15047b3d00d
cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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20 #undef TI_PS_FF_QUAD_BAND_SUPPORT |