FreeCalypso > hg > fc-magnetite
annotate cfg-headers/gprs/swconfig.cfg @ 629:3231dd9b38c1
armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets
Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively,
and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code
for C-Sample and earlier turns them into GPIOs configured as outputs also
driving 1 - so far, so good - but TI's code for BOARD 41 (which covers
D-Sample, Leonardo and all real world Calypso devices derived from the
latter) switches them from MCUEN to GPIOs, but then leaves them as inputs.
Given that the hardware powerup state of these two pins is outputs driving 1,
every Calypso board design MUST be compatible with such driving; typically
these GPIO signals will be either unused and unconnected or connected as
outputs driving some peripheral. Turning these pins into GPIO inputs will
result in floating inputs on every reasonably-wired board, thus I am
convinced that this configuration is nothing but a bug on the part of
whoever wrote this code at TI.
This floating input bug had already been fixed earlier for GTA modem and
FCDEV3B targets; the present change makes the fix unconditional for all
"classic" targets. The newly affected targets are D-Sample, Leonardo,
Tango and GTM900.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 02 Jan 2020 05:38:26 +0000 |
parents | fd8227e3047d |
children |
rev | line source |
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5
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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1 #ifndef __SWCONFIG_CFG__ |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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2 #define __SWCONFIG_CFG__ |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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3 #define ALR 1 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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4 #define BT 0 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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5 #define DP 0 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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6 #define DWNLD 1 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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7 #define GSMLITE 0 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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8 #define L1_DYN_DSP_DWNLD 1 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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9 #define LONG_JUMP 3 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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10 #define MOVE_IN_INTERNAL_RAM 1 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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11 #define OP_WCP 0 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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12 #define PMODE 2 |
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Mychaela Falconia <falcon@freecalypso.org>
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13 #define RVDATA_INTERNALRAM 0 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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14 #define SRVC 1 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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15 #define TR_BAUD_CONFIG TR_BAUD_115200 |
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Mychaela Falconia <falcon@freecalypso.org>
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16 #define WCP_PROF 0 |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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17 #endif /* __SWCONFIG_CFG__ */ |