annotate components/l1_ext @ 629:3231dd9b38c1

armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively, and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code for C-Sample and earlier turns them into GPIOs configured as outputs also driving 1 - so far, so good - but TI's code for BOARD 41 (which covers D-Sample, Leonardo and all real world Calypso devices derived from the latter) switches them from MCUEN to GPIOs, but then leaves them as inputs. Given that the hardware powerup state of these two pins is outputs driving 1, every Calypso board design MUST be compatible with such driving; typically these GPIO signals will be either unused and unconnected or connected as outputs driving some peripheral. Turning these pins into GPIO inputs will result in floating inputs on every reasonably-wired board, thus I am convinced that this configuration is nothing but a bug on the part of whoever wrote this code at TI. This floating input bug had already been fixed earlier for GTA modem and FCDEV3B targets; the present change makes the fix unconditional for all "classic" targets. The newly affected targets are D-Sample, Leonardo, Tango and GTM900.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 02 Jan 2020 05:38:26 +0000
parents 838eeafb0051
children
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1 # Building l1_ext.lib
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2
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3 CFLAGS="-g -me -pw2 -mt -o -mw"
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4 CPPFLAGS="-DRV_TRACE_LEVEL_WARNING=2 -DTOOL_CHOICE=0 -D_TMS470"
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5
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6 # Includes
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8 CPPFLAGS="$CPPFLAGS -I../config"
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9 CPPFLAGS="$CPPFLAGS -I$SRC/cs/os/nucleus"
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10 CPPFLAGS="$CPPFLAGS -I.."
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11 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/frame/cust_os"
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12 CPPFLAGS="$CPPFLAGS -I$SRC/cs/system"
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13 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app"
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14 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/buzzer"
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15 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/ffs"
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16 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/sim"
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17 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/uart"
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18 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera"
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19 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera/rv"
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20 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera/rvt"
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21 CPPFLAGS="$CPPFLAGS -I$SRC/cs/services"
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22 CPPFLAGS="$CPPFLAGS -I$SRC/cs/services/audio"
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23 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_cust0"
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24 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_include"
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25 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/cust0"
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26 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/hmacs"
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27 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/include"
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28 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/p_include"
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29 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_include"
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30 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_cust0"
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31 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/dyn_dwl_include"
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32 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/p_source0"
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33 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source0"
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34 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source"
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35 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core"
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36 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb"
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37 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio"
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38 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm"
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39 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf"
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40 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma"
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41 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld"
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42 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth"
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43 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif"
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44 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea"
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45 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security"
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46 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi"
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47 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer"
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48 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart"
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49 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd"
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50
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51 # Source modules
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52
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53 SRCDIR=$SRC/cs/layer1
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54
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55 cfile_plain $SRCDIR/cfile/l1_pwmgr.c
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56 cfile_plain $SRCDIR/cfile/l1_afunc.c
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57 cfile_plain $SRCDIR/cfile/l1_trace.c
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58 cfile_plain $SRCDIR/cfile/l1_init.c
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59 cfile_plain $SRCDIR/cfile/l1_sync.c
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60 cfile_plain $SRCDIR/cfile/l1_cmplx.c
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62 cfile_plain $SRCDIR/tm_cfile/l1tm_async.c
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63 cfile_plain $SRCDIR/tm_cfile/l1tm_func.c
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64 cfile_plain $SRCDIR/tm_cfile/l1tm_stats.c
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66 cfile_plain $SRCDIR/audio_cfile/l1audio_async.c
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67 cfile_plain $SRCDIR/audio_cfile/l1audio_afunc.c
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68 cfile_plain $SRCDIR/audio_cfile/l1audio_init.c
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69 cfile_plain $SRCDIR/audio_cfile/l1audio_drive.c
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70 cfile_plain $SRCDIR/audio_cfile/l1audio_back.c
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71 cfile_plain $SRCDIR/audio_cfile/l1audio_abb.c
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72
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73 #cfile_plain $SRCDIR/gtt_cfile/l1gtt_async.c
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74 #cfile_plain $SRCDIR/gtt_cfile/l1gtt_sync.c
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75 #cfile_plain $SRCDIR/gtt_cfile/l1gtt_func.c
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76 #cfile_plain $SRCDIR/gtt_cfile/l1gtt_drive.c
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77 #cfile_plain $SRCDIR/gtt_cfile/l1gtt_init.c
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78 #cfile_plain $SRCDIR/gtt_cfile/l1gtt_back.c
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79 #cfile_plain $SRCDIR/gtt_cfile/l1gtt_baudot_functions.c
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80 #cfile_plain $SRCDIR/gtt_cfile/ctm/conv_encoder.c
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81 #cfile_plain $SRCDIR/gtt_cfile/ctm/conv_poly.c
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82 #cfile_plain $SRCDIR/gtt_cfile/ctm/ctm_receiver.c
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83 #cfile_plain $SRCDIR/gtt_cfile/ctm/ctm_transmitter.c
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84 #cfile_plain $SRCDIR/gtt_cfile/ctm/diag_interleaver.c
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85 #cfile_plain $SRCDIR/gtt_cfile/ctm/m_sequence.c
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86 #cfile_plain $SRCDIR/gtt_cfile/ctm/ucs_functions.c
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87 #cfile_plain $SRCDIR/gtt_cfile/ctm/diag_deinterleaver.c
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88 #cfile_plain $SRCDIR/gtt_cfile/ctm/fifo.c
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89 #cfile_plain $SRCDIR/gtt_cfile/ctm/init_interleaver.c
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90
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91 if [ "$L1_DYN_DSP_DWNLD" = 1 ]
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92 then
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93 cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_afunc.c
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94 cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_async.c
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95 cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_init.c
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96 cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_sync.c
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97 cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_apihisr.c
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98 cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_func.c
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99 cfile_plain $SRCDIR/dsp1/Dyn_dwnld/tty_patch_file36_10.c
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100 cfile_plain $SRCDIR/dsp1/Dyn_dwnld/amr_mms_patch_file36_10.c
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101 cfile_plain $SRCDIR/dsp1/Dyn_dwnld/amr_sch_patch_file36_10.c
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102 cfile_plain $SRCDIR/dsp1/Dyn_dwnld/e2_patch_file36_10.c
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103 cfile_plain $SRCDIR/dsp1/Dyn_dwnld/speech_acoustic_patch_file36_10.c
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104 cfile_plain $SRCDIR/dsp1/Dyn_dwnld/gprs_patch_file36_10.c
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105 cfile_plain $SRCDIR/dsp1/patch_file36_10_dyn_dwl.c
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106 else
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107 cfile_plain $SRCDIR/dsp1/patch_file${DSP}_${CHIPSET}.c
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108 fi
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109
72
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110 cfile_plain $SRCDIR/dsp1/leadboot.c
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111
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112 if [ "$GPRS" = 1 ]
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113 then
303
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114 cfile_plain $SRCDIR/p_cfile/l1p_afun.c
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115 cfile_plain $SRCDIR/p_cfile/l1p_asyn.c
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116 cfile_plain $SRCDIR/p_cfile/l1p_cmpl.c
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117 cfile_plain $SRCDIR/p_cfile/l1p_sync.c
72
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118 fi
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119
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120 # Different CFLAGS for l1_small.c
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121
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122 CFLAGS="-g -me -pw2 -mw"
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123
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124 cfile_plain $SRCDIR/cfile/l1_small.c
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125
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126 # Different again for l1_async.c
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127
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128 CFLAGS="-g -me -pw2 -mt -mw -o1"
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129
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130 cfile_plain $SRCDIR/cfile/l1_async.c