FreeCalypso > hg > fc-magnetite
annotate src/cs/layer1/tm_include/l1tm_signa.h @ 629:3231dd9b38c1
armio.c: make GPIOs 8 & 13 outputs driving 1 on all "classic" targets
Calypso GPIOs 8 & 13 are pinmuxed with MCUEN1 & MCUEN2, respectively,
and on powerup these pins are MCUEN, i.e., outputs driving 1. TI's code
for C-Sample and earlier turns them into GPIOs configured as outputs also
driving 1 - so far, so good - but TI's code for BOARD 41 (which covers
D-Sample, Leonardo and all real world Calypso devices derived from the
latter) switches them from MCUEN to GPIOs, but then leaves them as inputs.
Given that the hardware powerup state of these two pins is outputs driving 1,
every Calypso board design MUST be compatible with such driving; typically
these GPIO signals will be either unused and unconnected or connected as
outputs driving some peripheral. Turning these pins into GPIO inputs will
result in floating inputs on every reasonably-wired board, thus I am
convinced that this configuration is nothing but a bug on the part of
whoever wrote this code at TI.
This floating input bug had already been fixed earlier for GTA modem and
FCDEV3B targets; the present change makes the fix unconditional for all
"classic" targets. The newly affected targets are D-Sample, Leonardo,
Tango and GTM900.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 02 Jan 2020 05:38:26 +0000 |
parents | 945cf7f506b2 |
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rev | line source |
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1 /************* Revision Controle System Header ************* |
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2 * GSM Layer 1 software |
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3 * L1TM_SIGNA.H |
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4 * |
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5 * Filename l1tm_signa.h |
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6 * Copyright 2003 (C) Texas Instruments |
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7 * |
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8 ************* Revision Controle System Header *************/ |
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9 |
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10 #define P_TMODE ( P_L1C + 3 ) // keep compatibility with GPRS code |
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11 |
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12 |
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13 //TestMode |
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14 #define TMODE_RXLEV_REQ ( ( P_TMODE << 8 ) | 1 ) |
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15 #define TMODE_RXLEV_IND ( ( P_TMODE << 8 ) | 2 ) |
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16 #define TMODE_STOP_RXLEV_CON ( ( P_TMODE << 8 ) | 3 ) |
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17 #define TMODE_FB0_REQ ( ( P_TMODE << 8 ) | 4 ) |
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18 #define TMODE_FB1_REQ ( ( P_TMODE << 8 ) | 5 ) |
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19 #define TMODE_SB_REQ ( ( P_TMODE << 8 ) | 6 ) |
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20 #define TMODE_FB_CON ( ( P_TMODE << 8 ) | 7 ) |
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21 #define TMODE_SB_CON ( ( P_TMODE << 8 ) | 8 ) |
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22 #define TMODE_BCCHS_CON ( ( P_TMODE << 8 ) | 9 ) |
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23 #define TMODE_RA_START ( ( P_TMODE << 8 ) | 10 ) |
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24 #define TMODE_RA_DONE ( ( P_TMODE << 8 ) | 11 ) |
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25 #define TMODE_SCELL_NBCCH_REQ ( ( P_TMODE << 8 ) | 12 ) |
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26 #define TMODE_STOP_SCELL_BCCH_REQ ( ( P_TMODE << 8 ) | 13 ) |
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27 #define TMODE_NEW_SCELL_REQ ( ( P_TMODE << 8 ) | 14 ) |
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28 #define TMODE_TCH_REQ ( ( P_TMODE << 8 ) | 15 ) |
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29 #define TMODE_IMMED_ASSIGN_REQ ( ( P_TMODE << 8 ) | 16 ) |
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30 #define TMODE_IMMED_ASSIGN_CON ( ( P_TMODE << 8 ) | 17 ) |
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31 #define TMODE_STOP_RX_TX ( ( P_TMODE << 8 ) | 18 ) |
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32 #define TMODE_SACCH_INFO ( ( P_TMODE << 8 ) | 19 ) |
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33 #define TESTMODE_PRIM ( ( P_TMODE << 8 ) | 20 ) |
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34 #define TMODE_FB_SB_REQ ( ( P_TMODE << 8 ) | 21 ) |
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35 #define TMODE_NETWORK_SYNC_IND ( ( P_TMODE << 8 ) | 22 ) |
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36 #define TMODE_TCH_INFO ( ( P_TMODE << 8 ) | 23 ) |
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37 #if L1_GPRS |
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38 #define TMODE_PDTCH_ASSIGN_REQ ( ( P_TMODE << 8 ) | 24 ) |
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39 #define TMODE_PDTCH_INFO ( ( P_TMODE << 8 ) | 25 ) |
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40 #endif |
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41 |
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42 // #define TMODE_RXLEV_REQ ( ( P_TMODE << 8 ) | 24 ) |
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43 // #define TMODE_RXLEV_IND ( ( P_TMODE << 8 ) | 25 ) |