annotate blobs/patches/main-pirelli.patch @ 467:3285960cc1b9

romvecs-patch: experimental insert code written
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 25 Mar 2018 01:18:50 +0000
parents 8dd671b7d41e
children
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8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
Mychaela Falconia <falcon@freecalypso.org>
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1 # This patch applies to the Init_Target() function in the init.obj module in
8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
Mychaela Falconia <falcon@freecalypso.org>
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2 # main.lib; the present version is for making TCS211 run on the Pirelli.
8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
Mychaela Falconia <falcon@freecalypso.org>
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3 # This patch sets the same memory and peripheral chip select timings and
8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
Mychaela Falconia <falcon@freecalypso.org>
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4 # widths as Pirelli's fw.
8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
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8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
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6 [init.obj]
8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
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8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
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8 # value goes into nCS0, nCS1 and nCS3 config registers
8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
Mychaela Falconia <falcon@freecalypso.org>
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9 .text 66 A4
8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
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10 # the nCS2 setting in our original blob is already correct for the Pirelli
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8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
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12 # value goes into nCS4 config reg
8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
Mychaela Falconia <falcon@freecalypso.org>
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13 .text 72 A7
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8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
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15 # nop out the write into 0x02700000
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8dd671b7d41e blobs/patches: main-pirelli and main-rvtmodem patches added
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17 .text 128 C0
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18 .text 129 46