annotate src/cs/drivers/drv_app/sim/sim.h @ 685:3fb7384e820d

tpudrv12.h: FCDEV3B goes back to being itself A while back we had the idea of a FreeCalypso modem family whereby our current fcdev3b target would some day morph into fcmodem, with multiple FC modem family products, potentially either triband or quadband, being firmware-compatible with each other and with our original FCDEV3B. But in light of the discovery of Tango modules that earlier idea is now being withdrawn: instead the already existing Tango hw is being adopted into our FreeCalypso family. Tango cannot be firmware-compatible with triband OM/FCDEV3B targets because the original quadband RFFE on Tango modules is wired in TI's original Leonardo arrangement. Because this Leonardo/Tango way is now becoming the official FreeCalypso way of driving quadband RFFEs thanks to the adoption of Tango into our FC family, our earlier idea of extending FIC's triband RFFE control signals with TSPACT5 no longer makes much sense - we will probably never produce any new hardware with that once-proposed arrangement. Therefore, that triband-or-quadband FCFAM provision is being removed from the code base, and FCDEV3B goes back to being treated the same way as CONFIG_TARGET_GTAMODEM for RFFE control purposes.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 24 Sep 2020 21:03:08 +0000
parents 945cf7f506b2
children
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945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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1 /*
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2 * SIM.H
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3 *
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4 * Pole Star SIM
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5 *
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6 * Target : ARM
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7 *
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8 * Copyright (c) Texas Instruments 1995-1997
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9 *
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10 */
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11
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12 /*
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13 * Device addresses - GCS000 (Gemini / Polestar)
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14 * HER207 (Hercules)
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15 */
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16
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17 #ifndef _WINDOWS
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18 #include "l1sw.cfg"
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19 #include "chipset.cfg"
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20 #endif
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21
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22 #include "nucleus.h"
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23
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24 /* Flags activation section */
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25 // #define SIM_RETRY /* by default : NOT ACTIVE */
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26 //#define SIM_DEBUG_TRACE /* by default : NOT ACTIVE */
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27 //#define SIM_UWORD16_MASK 0x00ff //when using SIM entity not maped to length on 16 bits
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28 #define SIM_UWORD16_MASK 0xffff //when using SIM entity maped to length on 16 bits
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29 //#define SIM_APDU_TEST
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30 //#define SIM_SAT_REFRESH_TEST
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31
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32 #define SIM_CMD (MEM_SIM + 0x00)
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33 #define SIM_STAT (MEM_SIM + 0x02)
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34 #define SIM_CONF1 (MEM_SIM + 0x04)
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35 #define SIM_CONF2 (MEM_SIM + 0x06)
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36 #define SIM_IT (MEM_SIM + 0x08)
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37 #define SIM_DRX (MEM_SIM + 0x0A)
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38 #define SIM_DTX (MEM_SIM + 0x0C)
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39 #define SIM_MASK (MEM_SIM + 0x0E)
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40
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41
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42
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43 /*
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44 * Bit definitions
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45 */
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46 // control regidter
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47 #define SIM_CMD_CRST 0x0001
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48 #define SIM_CMD_SWRST 0x0002
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49 #define SIM_CMD_STOP 0x0004
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50 #define SIM_CMD_START 0x0008
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51 #define SIM_CMD_CLKEN 0x0010
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52
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53 // status register
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54 #define SIM_STAT_CD 0x0001 // card present
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55 #define SIM_STAT_TXPAR 0x0002 // transmit parity status
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56 #define SIM_STAT_FFULL 0x0004 // fifo full
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57 #define SIM_STAT_FEMPTY 0x0008 // fifo empty
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58
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59 // configuration register
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60 #define SIM_CONF1_CHKPAR 0x0001 // enable receipt check parity
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61 #define SIM_CONF1_CONV 0x0002 // coding convention
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62 #define SIM_CONF1_TXRX 0x0004 // SIO line direction
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63 #define SIM_CONF1_SCLKEN 0x0008 // enable SIM clock
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64 #define SIM_CONF1_RSVD 0x0010 // reserved
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65 #define SIM_CONF1_SCLKDIV 0x0020 // SIM clock frquency
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66 #define SIM_CONF1_SCLKLEV 0x0040 // SIM clock idle level
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67 #define SIM_CONF1_ETU 0x0080 // ETU period
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68 #define SIM_CONF1_BYPASS 0x0100 // bypass hardware timers
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69 #define SIM_CONF1_SVCCLEV 0x0200
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70 #define SIM_CONF1_SRSTLEV 0x0400
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71 #define SIM_CONF1_SIOLOW 0x8000 //force SIO to low level
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72
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73 // interrupt status register
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74 #define SIM_IT_NATR 0x0001 // No answer to reset
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75 #define SIM_IT_WT 0x0002
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76 #define SIM_IT_ITOV 0x0004
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77 #define SIM_IT_ITTX 0x0008 // Transmit
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78 #define SIM_IT_ITRX 0x0010 // Receipt
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79
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80 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
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81 #define SIM_IT_CD 0x0001 // Card insertion/extraction
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82 #else
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83 #define SIM_IT_CD 0x0020 // Card insertion/extraction
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84 #endif
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85
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86 // interrupt mask register
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87 #define SIM_MASK_NATR 0x0001 // No answer to reset
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88 #define SIM_MASK_WT 0x0002
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89 #define SIM_MASK_OV 0x0004
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90 #define SIM_MASK_TX 0x0008 // Transmit
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91 #define SIM_MASK_RX 0x0010 // Receipt
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92 #define SIM_MASK_CD 0x0020 // Card insertion/extraction
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93
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94 // receveid byte register
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95 #define SIM_DRX_STATRXPAR 0x0100 // received byte parity status
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96
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97 // SIM return code OK
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98 #define SIM_OK 0
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99
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100 // SIM return error codes
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101 #define SIM_ERR_NOCARD 1
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102 #define SIM_ERR_NOINT 2
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103 #define SIM_ERR_NATR 3
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104 #define SIM_ERR_READ 4
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105 #define SIM_ERR_XMIT 5
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106 #define SIM_ERR_OVF 6
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107 #define SIM_ERR_LEN 7
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108 #define SIM_ERR_CARDREJECT 8
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109 #define SIM_ERR_WAIT 9
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110 #define SIM_ERR_ABNORMAL_CASE1 10
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111 #define SIM_ERR_ABNORMAL_CASE2 11
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112 #define SIM_ERR_BUFF_OVERFL 12
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113
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114 // begin of JYT modifications
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115 #define SIM_ERR_HARDWARE_FAIL 13
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116 // end of JYT modifications
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117 #define SIM_ERR_RETRY_FAILURE 14
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118
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119 #define SIM_SLEEP_NONE 0 // No SIM available
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120 #define SIM_SLEEP_DESACT 1 // The Driver is NOT currently in sleep mode (clock is off)
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121 #define SIM_SLEEP_ACT 2 // The Driver is currently in sleep mode (clock is on)
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122 #define SIM_SLEEP_NOT_ALLOWED 3 // The Driver cannot stop the clock :
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123 // The card don't want or the interface is not able
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124 // to do it.
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125 #define SIM_SLEEP_WAITING_TIME 500 //represent 2.3s of period before entering in sleep mode
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126
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127 #define SIM_CLK_STOP_MASK 0x0D // Clock Stop mask defined by ETSI 11.11
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128 #define SIM_CLK_STOP_NOT_ALLWD 0x00 // see ETSI 11.11 : Clock Stop never allowed
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129 #define SIM_CLK_STOP_ALLWD 0x01 // see ETSI 11.11 : No prefered level
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130 #define SIM_CLK_STOP_HIGH 0x04 // see ETSI 11.11 : High level only
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131 #define SIM_CLK_STOP_LOW 0x08 // see ETSI 11.11 : Low level only
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132
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133 #if(ANLG_FAM == 1)
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134 //OMEGA specific definitions
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135 #define MODE5V_OMEGA 0x06 // used in SIM_SwitchVolt
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136 #define MODE_INIT_OMEGA_3V 0x05 // used in SIM_StartVolt
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137 #define MODE_INIT_OMEGA_5V 0x07 // unused !!!!
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138 #define MODE3V_OMEGA 0x01 // unused !!!!
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139 #define MODE_DIS_SIMLDOEN 0xDF // used in SIM_PowerOff
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140 #define MODE_DIS_SIMEN 0xFD // used in SIM_PowerOff
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141 #define MODE_ENA_SIMLDOEN 0x20 // used in SIM_ManualStart
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142 #define MODE_ENA_SIMEN 0x02 // used in SIM_ManualStart
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143 #elif(ANLG_FAM == 2)
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144 //IOTA specific definitions
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145 #define MODE1_8V_IOTA 0x00
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146 #define MODE_INIT_IOTA_3V 0x03
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147 #define MODE_INIT_IOTA_1_8V 0x02
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148 #define MODE3V_IOTA 0x01
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149 #define MODE_DIS_SIMLDOEN 0xFC // SIMSEL + Regulator RSIMEN
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150 #define MODE_DIS_SIMEN 0xF7
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151 #define MODE_ENA_SIMLDOEN 0x03 // SIMSEL + Regulator RSIMEN
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152 #define MODE_ENA_SIMEN 0x08
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153 #elif(ANLG_FAM == 3)
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154 //SYREN specific definitions
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155 #define MODE1_8V_SYREN 0x00
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156 #define MODE_INIT_SYREN_3V 0x03
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157 #define MODE_INIT_SYREN_1_8V 0x02
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158 #define MODE3V_SYREN 0x01
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159 #define MODE_DIS_SIMLDOEN 0x1FC // SIMSEL + Regulator RSIMEN
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160 #define MODE_DIS_SIMEN 0x1F7
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161 #define MODE_ENA_SIMLDOEN 0x03 // SIMSEL + Regulator RSIMEN
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162 #define MODE_ENA_SIMEN 0x08
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163 #endif
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164
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165 // define type of interface if not defined
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166 // 5V only ME SIM_TYPE = 0
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167 // 3V technology ME SIM_TYPE = 1
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168 // 3V only ME SIM_TYPE = 2
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169 // 1.8V technology ME SIM_TYPE = 3 // JYT, 29/01/02, from new specs IOTA
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170 // 1.8V Only ME SIM_TYPE = 4 // JYT, 29/01/02, from new specs IOTA
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171
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172 #define SIM_TYPE_5V 0
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173 #define SIM_TYPE_3_5V 1
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174 #define SIM_TYPE_3V 2
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175 #define SIM_TYPE_1_8_3V 3
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176 #define SIM_TYPE_1_8V 4
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177
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178 //default configuration
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179 #ifndef SIM_TYPE
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180 #if((ANLG_FAM == 2) || (ANLG_FAM == 3))
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181 // Until now (20/03/2003), it is impossible to test IOTA or SYREN with 1.8V Sim Card,
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182 // so SIM drv is configured in 3V only with IOTA.and SYREN
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183 // When 1.8V Sim Card will be delivered and tested on IOTA and SYREN, then Sim driver will pass
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184 // to : #define SIM_TYPE SIM_TYPE_1_8_3V
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185 #define SIM_TYPE SIM_TYPE_1_8_3V // MODIFY BY JENNIFER SIM_TYPE_3V
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186 #else
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187 #define SIM_TYPE SIM_TYPE_3_5V
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188 #endif
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189 #endif
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190
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191 // begin of modifications of JYT
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192
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193 #if((ANLG_FAM == 2) || (ANLG_FAM == 3))
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194 #define SIM_MASK_INFO_VOLT 0x70
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195 #else
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196 #define SIM_MASK_INFO_VOLT 0x10
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197 #endif
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198
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199 #define SIM_1_8V 0x30
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200 #define SIM_3V 0x10
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201 #define SIM_5V 0x00
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202
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203 // end of modifications of JYT
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204
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205 // Max size of Answer to Reset (GSM11.11 5.7.1)
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206 #define MAX_ATR_SIZE 33
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207
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208 // GSM Instruction Class (GSM 11.11 SIM spec)
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209 #define GSM_CLASS 0xA0
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210
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211 // SIM Instruction Codes
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212 #define SIM_SELECT 0xA4
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213 #define SIM_STATUS 0xF2
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214 #define SIM_READ_BINARY 0xB0
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215 #define SIM_UPDATE_BINARY 0xD6
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216 #define SIM_READ_RECORD 0xB2
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217 #define SIM_UPDATE_RECORD 0xDC
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218 #define SIM_SEEK 0xA2
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219 #define SIM_INCREASE 0x32
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220 #define SIM_VERIFY_CHV 0x20
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221 #define SIM_CHANGE_CHV 0x24
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222 #define SIM_DISABLE_CHV 0x26
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223 #define SIM_ENABLE_CHV 0x28
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224 #define SIM_UNBLOCK_CHV 0x2C
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225 #define SIM_INVALIDATE 0x04
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226 #define SIM_REHABILITATE 0x44
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227 #define SIM_RUN_GSM_ALGO 0x88
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228 #define SIM_GET_RESPONSE 0xC0
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229 #define SIM_TERMINAL_PROFILE 0x10
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230 #define SIM_FETCH 0x12
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231 #define SIM_TERMINAL_RESPONSE 0x14
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232 #define SIM_ENVELOPE 0xC2
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233
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234
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235
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236 // SIM file identifiers
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237 #define MF 0x3F00
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238 #define EF_ICCID 0x2FE2
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239 #define DF_GSM 0x7F20
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240 #define DF_DCS1800 0x7F21
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241 #define EF_LP 0x6F05
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242 #define EF_IMSI 0x6F07
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243 #define EF_KC 0x6F20
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244 #define EF_PLMNSEL 0x6F30
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245 #define EF_HPLMN 0x6F31
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246 #define EF_ACMAX 0x6F37
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247 #define EF_SST 0x6F38
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248 #define EF_ACM 0x6F39
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249 #define EF_PUCT 0x6F41
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250 #define EF_CBMI 0x6F45
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251 #define EF_BCCH 0x6F74
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252 #define EF_ACC 0x6F78
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253 #define EF_FPLMN 0x6F7B
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254 #define EF_LOCI 0x6F7E
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255 #define EF_AD 0x6FAD
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256 #define EF_PHASE 0x6FAE
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257 #define DF_TELECOM 0x7F10
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258 #define EF_ADN 0x6F3A
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259 #define EF_FDN 0x6F3B
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260 #define EF_SMS 0x6F3C
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261 #define EF_CCP 0x6F3D
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262 #define EF_MSISDN 0x6F40
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263 #define EF_SMSP 0x6F42
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264 #define EF_SMSS 0x6F43
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265 #define EF_LND 0x6F44
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266 #define EF_EXT1 0x6F4A
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267 #define EF_EXT2 0x6F4B
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268 #define EF_ECC 0x6FB7
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269
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270
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271 #define MASK_INS 0xFE
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272 #define MASK_CMD 0x11
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273 #define MASK_RST 0x10
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274
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275
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276 // Buffer sizes
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277 #define RSIMBUFSIZE 270
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278 #define RSIZESW1SW2 2
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279 #define XSIMBUFSIZE 270
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280
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281
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282
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283
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284 // Structures
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285 typedef struct
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286 {
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287 volatile unsigned short cmd;
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288 volatile unsigned short stat;
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289 volatile unsigned short conf1;
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290 volatile unsigned short conf2;
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291 volatile unsigned short it;
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292 volatile unsigned short rx;
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293 volatile unsigned short tx;
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294 volatile unsigned short maskit;
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295 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
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296 volatile unsigned short it_cd;
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297 #endif
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298 } SIM_CONTROLLER;
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299
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300
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301 typedef struct
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302 {
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303 SYS_UWORD8 Inverse;
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304 SYS_UWORD8 AtrSize;
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305 SYS_UWORD8 AtrData[MAX_ATR_SIZE];
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306 } SIM_CARD;
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307
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308
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309 typedef struct
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310 {
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311 SIM_CONTROLLER *c;
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312 SYS_UWORD8 *xIn; // xmit input pointer
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313 SYS_UWORD8 *xOut; // xmit output pointer
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314 unsigned errorSIM; // code return in case of error detectd
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315 unsigned short conf1; // image of the configuration register - avoids read/mod/write cycles
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316 volatile unsigned short txParityErr;
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317 unsigned short rxParityErr; // if 0 no parity error on receipt, 1 if...
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318 SYS_UWORD8 Freq_Algo; //use to determine which sim clk freq to choose for running GSM algo
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319 SYS_UWORD8 PTS_Try; //use to calculate how many PTS try were already done
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320 SYS_UWORD8 FileC; //value of File Characteristic
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321 SYS_UWORD16 etu9600;
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322 SYS_UWORD16 etu400;
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323 SYS_UWORD16 startclock; //744 clock cycle translated in ETU
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324 SYS_UWORD16 stopclock; //1860 clock cycle translated in ETU
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325 SYS_UWORD8 moderx; //inform that we are in receive mode
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326 // 0 : mode of normal reception without procedure
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327 // 1 : mode of wait for acknowledge during reception of char
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328 // 2 : mode of reception of data by bloc
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329 // 3 : mode of reception of data char by char (proc char)
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330 // 4 : mode of reception of data char by char (data)
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331 // 5 : mode of reception of procedure char SW1/SW2
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332 // 6 : mode of wait for acknowledge char after transmission of char
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333 SYS_UWORD16 expected_data; //number of expected char in receive mode proc char
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334 SYS_UWORD8 ack; //acknowledge char
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335 SYS_UWORD8 null_received; //indicates if a NULL char was received
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336 SYS_UWORD8 hw_mask; //mask used because of pole112 hw prb
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337
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338 SYS_UWORD8 rbuf[RSIMBUFSIZE];
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339 SYS_UWORD8 rx_index; // receive index on rbuf buffer
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340
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341 SYS_UWORD8 xbuf[XSIMBUFSIZE];
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342 SYS_UWORD8 rSW12[RSIZESW1SW2]; //buffer to store SW1 and SW2
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343 SYS_UWORD8 SWcount; //static counter
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344 void (*InsertFunc)(SIM_CARD *);
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345 void (*RemoveFunc)(void);
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346 SYS_UWORD16 apdu_ans_length;
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347 }
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348 SIM_PORT;
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349
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350
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351
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352 void SIM_IntHandler(void);
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353 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
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354 void SIM_CD_IntHandler(void);
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355 #endif
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356
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diff changeset
357
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
358
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
359
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
360
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
361 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
362 * Prototypes
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 // obsolete function
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
365 void SIM_Init(void (Insert(SIM_CARD *cP)), void (Remove(void)));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
366
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
367 // initialization
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
368 void SIM_Initialize(void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
369 SYS_UWORD16 SIM_Register(void (Insert(SIM_CARD *cP)), void (Remove(void)));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
370 SYS_UWORD16 SIM_Reset(SIM_CARD *cP);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
371 SYS_UWORD16 SIM_Restart(SIM_CARD *cP);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
372
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
373 // file commands
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
374 SYS_UWORD16 SIM_Select(SYS_UWORD16 id, SYS_UWORD8 *dat, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
375 SYS_UWORD16 SIM_Status(SYS_UWORD8 *dat, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
376 SYS_UWORD16 SIM_ReadBinary(SYS_UWORD8 *dat, SYS_UWORD16 offset, SYS_UWORD16 len, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
377 SYS_UWORD16 SIM_UpdateBinary(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 offset, SYS_UWORD16 len, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
378 SYS_UWORD16 SIM_ReadRecord(SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD8 recNum, SYS_UWORD16 len, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
379 SYS_UWORD16 SIM_UpdateRecord(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD8 recNum, SYS_UWORD16 len, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
380 SYS_UWORD16 SIM_Seek(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD16 len, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
381 SYS_UWORD16 SIM_Increase(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
382
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
383 // Authentication
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
384 SYS_UWORD16 SIM_VerifyCHV(SYS_UWORD8 *result, SYS_UWORD8 *chv, SYS_UWORD8 chvType, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
385 SYS_UWORD16 SIM_ChangeCHV(SYS_UWORD8 *result,SYS_UWORD8 *oldChv, SYS_UWORD8 *newChv, SYS_UWORD8 chvType, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
386 SYS_UWORD16 SIM_DisableCHV(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
387 SYS_UWORD16 SIM_EnableCHV(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
388 SYS_UWORD16 SIM_UnblockCHV(SYS_UWORD8 *result, SYS_UWORD8 *unblockChv, SYS_UWORD8 *newChv, SYS_UWORD8 chvType, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
389
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
390 // managing
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
391 SYS_UWORD16 SIM_Invalidate(SYS_UWORD8 *rP, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
392 SYS_UWORD16 SIM_Rehabilitate(SYS_UWORD8 *rP, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
393 SYS_UWORD16 SIM_RunGSMAlgo(SYS_UWORD8 *result, SYS_UWORD8 *rand, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
394 SYS_UWORD16 SIM_GetResponse(SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *size);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
395
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
396 // STK
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
397 SYS_UWORD16 SIM_TerminalProfile(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
398 SYS_UWORD16 SIM_Fetch(SYS_UWORD8 *result, SYS_UWORD16 len, SYS_UWORD16 *rcvSize);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
399 SYS_UWORD16 SIM_TerminalResponse(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
400 SYS_UWORD16 SIM_Envelope(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
401
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
402 // power off
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
403 void SIM_PowerOff(void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
404
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
405 // WIM
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
406 SYS_UWORD16 SIM_XchTPDU(SYS_UWORD8 *dat, SYS_UWORD16 trxLen, SYS_UWORD8 *result,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
407 SYS_UWORD16 rcvLen, SYS_UWORD16 *rcvSize);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
408
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
409 void SIM_lock_cr17689(void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
410
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
411
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
412
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
413 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
414 * Internal Prototypes
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
415 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
416 void SIM_WriteBuffer(SIM_PORT *p, SYS_UWORD16 offset, SYS_UWORD16 n);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
417 SYS_UWORD16 SIM_Result(SIM_PORT *p, SYS_UWORD8 *rP, SYS_UWORD16 *lenP, SYS_UWORD8 offset);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
418 SYS_UWORD16 SIM_Command(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *rP, SYS_UWORD16 *lP);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
419 SYS_UWORD16 SIM_Command_Base(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *dP, SYS_UWORD16 *lP);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
420 SYS_UWORD16 SIM_Dummy(void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
421 void SIM_InitLog(void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
422
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
423 SYS_UWORD16 SIM_TxParityErrors();
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
424 SYS_UWORD16 SIM_WaitReception(SIM_PORT *p);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
425 void SIM_Interpret_FileCharacteristics(SIM_PORT *p);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
426 SYS_UWORD16 SIM_PTSprocedure(SIM_CARD *cP, SIM_PORT *p);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
427 void SIM_WARMReset (SIM_PORT *p);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
428 void SIM_SleepMode_In(SYS_UWORD32 param);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
429 void SIM_SleepMode_Out(SIM_PORT *p);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
430 SYS_UWORD8 SIM_GetFileCharacteristics(SIM_PORT *p);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
431 SYS_UWORD16 SIM_ATRdynamictreatement (SIM_PORT *p, SIM_CARD *cP);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
432 SYS_UWORD16 SIM_Waitforchars (SIM_PORT *p, SYS_UWORD16 max_wait);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
433 void SIM_Calcetu (SIM_PORT *p);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
434 SYS_UWORD8 SIM_Translate_atr_char (SYS_UWORD8 input, SIM_CARD *cP);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
435
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
436
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
437 SYS_UWORD8 SIM_StartVolt (SYS_UWORD8 ResetFlag);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
438 SYS_UWORD8 SIM_SwitchVolt (SYS_UWORD8 ResetFlag);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
439
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
440 SYS_UWORD16 SIM_ManualStart (SIM_PORT *p);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
441 SYS_UWORD8 SIM_Memcpy(SYS_UWORD8 *Buff_target, SYS_UWORD8 Buff_source[], SYS_UWORD16 len);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
442 SYS_BOOL SIM_SleepStatus(void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
443 SYS_UWORD16 SIM_Reset_Restart_Internal(SIM_CARD *cP, SYS_UWORD8 ResetFlag);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
444
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
445 /*
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
446 * Global variables
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
447 */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
448 #ifdef SIM_C
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
449 #define SI_GLOBAL
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
450 #else
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
451 #define SI_GLOBAL extern
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
452 #endif
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
453
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
454
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
455 SI_GLOBAL SIM_PORT Sim[1];
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
456 SI_GLOBAL NU_TIMER SIM_timer;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
457 SI_GLOBAL STATUS status_os_sim;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
458 SI_GLOBAL SYS_UWORD8 SIM_sleep_status;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
459