annotate src/cs/system/bootloader/inc/target.h @ 685:3fb7384e820d

tpudrv12.h: FCDEV3B goes back to being itself A while back we had the idea of a FreeCalypso modem family whereby our current fcdev3b target would some day morph into fcmodem, with multiple FC modem family products, potentially either triband or quadband, being firmware-compatible with each other and with our original FCDEV3B. But in light of the discovery of Tango modules that earlier idea is now being withdrawn: instead the already existing Tango hw is being adopted into our FreeCalypso family. Tango cannot be firmware-compatible with triband OM/FCDEV3B targets because the original quadband RFFE on Tango modules is wired in TI's original Leonardo arrangement. Because this Leonardo/Tango way is now becoming the official FreeCalypso way of driving quadband RFFEs thanks to the adoption of Tango into our FC family, our earlier idea of extending FIC's triband RFFE control signals with TSPACT5 no longer makes much sense - we will probably never produce any new hardware with that once-proposed arrangement. Therefore, that triband-or-quadband FCFAM provision is being removed from the code base, and FCDEV3B goes back to being treated the same way as CONFIG_TARGET_GTAMODEM for RFFE control purposes.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 24 Sep 2020 21:03:08 +0000
parents 945cf7f506b2
children
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1 /******************************************************************************
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2 * FLUID (Flash Loader Utility Independent of Device)
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3 *
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4 * (C) Delta Technologies 2001.
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5 * Cleanup, modifications and extensions by Mads Meisner-Jensen, mmj@ti.com.
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6 *
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7 * Target common definitions
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8 *
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9 * $Id: target.h,v 1.3 2003/07/10 17:50:21 rlendenmann Exp $
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10 *
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11 ******************************************************************************/
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12 #ifndef __TARGET_H__
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13 #define __TARGET_H__
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14 #include "protocol.h"
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15
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16
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17 /******************************************************************************
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18 * Typedefs and Prototypes
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19 ******************************************************************************/
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20
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21 #ifndef RIVIERA_INCLUDED
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22 typedef unsigned char UBYTE;
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23 typedef unsigned short UINT16;
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24 typedef unsigned long UINT32;
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25 typedef signed char INT8;
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26 typedef signed short INT16;
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27 typedef signed long INT32;
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28 #endif
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29
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30 typedef unsigned char uint8;
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31 typedef unsigned short uint16;
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32 typedef unsigned long uint32;
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33 typedef signed char int8;
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34 typedef signed short int16;
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35 typedef signed long int32;
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36
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37 typedef union {
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38 UINT32 i; // integer value
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39 UBYTE b[4]; // byte array
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40 } union32_t;
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41
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42 typedef union {
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43 UINT16 i; // integer value
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44 UBYTE b[2]; // byte array
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45 } union16_t;
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46
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47 typedef struct {
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48 char (*init)(uint32 addr);
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49 char (*erase)(uint32 *addr, int size);
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50 char (*program)(uint32 addr, uint16 *buf, int size);
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51 uint8 (*getchar)(void);
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52 void (*putchar)(uint8 ch);
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53 void (*debug_putstr)(uint32 uart, char *string);
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54 void (*debug_putnum)(uint32 uart, unsigned int number);
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55 uint32 uart_base;
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56 } method_table_t;
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57
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58 // Prototypes for functions in debug.c
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59 void debug_putstr(uint32 uart, char *string);
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60 void debug_putnum(uint32 uart, unsigned int number);
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61
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62
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63 /******************************************************************************
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64 * Macros
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65 ******************************************************************************/
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66
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67 #define REGISTER_8_READ(addr) (*((volatile uint8 *) (addr)))
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68 #define REGISTER_8_WRITE(addr, data) (*((volatile uint8 *) (addr)) = data)
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69 #define REGISTER_16_READ(addr) (*((volatile uint16 *) (addr)))
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70 #define REGISTER_16_WRITE(addr, data) (*((volatile uint16 *) (addr)) = data)
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71
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72 #define BIT_SET(reg, bit) (*((volatile UINT16 *) (reg)) |= (1 << (bit)))
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73 #define BIT_CLR(reg, bit) (*((volatile UINT16 *) (reg)) &= ~(1 << (bit)))
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74
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75 #define FLASH_READ(addr) (*(volatile uint16 *) (addr))
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76 #define FLASH_WRITE(addr, data) (*(volatile uint16 *) (addr)) = data
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77
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78 #define PUTCHAR_FUNCTION_CODE(uart) \
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79 while (!(REGISTER_8_READ(uart + UART_LSR) & STAT_TXRDY)) ; \
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80 REGISTER_8_WRITE(uart + UART_THR, ch);
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81
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82 #define GETCHAR_FUNCTION_CODE(uart) \
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83 while (!(REGISTER_8_READ(uart + UART_LSR) & STAT_RXRDY)) ; \
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84 return (uint8) REGISTER_8_READ(uart + UART_RHR);
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85
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86
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87 /******************************************************************************
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88 * Debug Macros
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89 ******************************************************************************/
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90
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91 #define DEBUG_PUTSTR(uart, text) ((method_table_t *)(my_addr))->debug_putstr(uart, text);
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92 #define DEBUG_PUTNUM(uart, num) ((method_table_t *)(my_addr))->debug_putnum(uart, num);
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93
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94
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95 /******************************************************************************
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96 * Hardware Definitions
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97 ******************************************************************************/
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98
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99 #define UART_BASE_MODEM (0xFFFF5800)
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100 #define UART_BASE_IRDA (0xFFFF5000)
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101
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102 // ROM/Flash Config register
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103 #define WS_REG_ROM 0x400000
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104
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105 // UART register definitions.
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106 #define UART_RHR (0x00) /* Receive Holding Register */
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107 #define UART_THR (0x00) /* Transmit Holding Register */
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108 #define UART_FCR (0x02) /* FIFO Control Register */
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109 #define UART_LCR (0x03) /* Line Control Register */
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110 #define UART_LSR (0x05) /* Line Status Register */
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111 #define UART_MDR1 (0x08) /* Mode Definition Register 1 */
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112 #define UART_EFR (0x02) /* Enhanced Feature Register */
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113 #define UART_DLL (0x00) /* Divisor Latches */
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114 #define UART_DLH (0x01) /* Divisor Latches */
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115 #define UART_UIR (0xFFFF6000) /* UART Interface Register */
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116
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117 // UART status bit definitions.
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118 #define STAT_RXRDY (0x01)
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119 #define STAT_TXRDY (0x20)
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120 #define STAT_TX_E (0x40)
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121
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122 // UART_UIR bit definitions.
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123 #define UART_ACCESS (0)
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124 #define UART_MASK_IT (1)
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125
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126 // UART_EFR bit definitions.
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127 #define ENHANCED_EN (4)
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128
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129 // UART command bit definitions.
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130 #define CMD_UART_RESET (0x07)
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131 #define CMD_EFR_EN (0xBF)
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132 #define CMD_FCR_MCR_EN (0x80)
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133 #define CMD_FIFO_EN (0x07)
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134 #define CMD_UART_MODE (0x00)
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135 #define CMD_CHAR8_STOP1_NOPAR (0x03)
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136
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137 // UART ???
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138 #define BAUD_38400 (0x15)
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139 #define BAUD_115200 (0x07)
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140 #define BAUD_406250 (0x02)
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141 #define BAUD_812500 (0x01)
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142
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143
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144 // Enable/Disable ROM/Flash write strobe
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145 #define ROM_WRITE_ENABLE() *((volatile uint16*) WS_REG_ROM) |= 0x80;
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146 #define ROM_WRITE_DISABLE() *((volatile uint16*) WS_REG_ROM) &= ~0x80;
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147
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148 #endif /* __TARGET_H__ */