0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3 * UARTFAX.C
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5 * This driver allows to control the UARTs of chipset 1.5 for fax and data
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
6 * services. It performs flow control: RTS/CTS, XON/XOFF.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
7 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
8 * On C & D-Sample, DCD and DTR signals are supported on UART modem only with 2
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
9 * I/Os.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
10 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
11 * On E-Sample, DCD and DTR signals are directly handled by Calypso+.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
12 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
13 * On Calypso, RTS and CTS are supported on both UARTs.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
14 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
15 * On Calypso+, RTS and CTS are supported on UART Modem1 & IrDA. UART Modem2 is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
16 * not available through DB9 connector on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
17 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
18 * (C) Texas Instruments 1999 - 2003
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
19 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
20 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
21
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
22 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
23 * E-Sample
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
24 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
25 * UART Modem1 UART Irda
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
26 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
27 * DB9 Calypso+ DB9 Calypso+
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
28 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
29 * 1 DCD DCD output 1 1, 6 and 4 are connected together on DB9
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
30 * 2 RX TX output 2 RX TX2 output
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
31 * 3 TX RX input 3 TX RX2 input
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
32 * 4 DTR DSR input 4
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
33 * 5 GND 5 GND
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
34 * 6 NC 6
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
35 * 7 RTS CTS input 7 RTS CTS2 input
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
36 * 8 CTS RTS output 8 CTS RTS2 output
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
37 * 9 NC 9 NC
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
38 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
39 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
40
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
41 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
42 * C & D-Sample
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
43 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
44 * UART Modem UART Irda
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
45 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
46 * DB9 Calypso DB9 Calypso
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
47 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
48 * 1 DCD I/O 2 output 1 1, 6 and 4 are connected together on DB9
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
49 * 2 RX TX output 2 RX TX2 output
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
50 * 3 TX RX input 3 TX RX2 input
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
51 * 4 DTR I/O 3 input 4
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
52 * 5 GND 5 GND
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
53 * 6 NC 6
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
54 * 7 RTS CTS input 7 RTS CTS2 input
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
55 * 8 CTS RTS output 8 CTS RTS2 output
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
56 * 9 NC 9 NC
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
57 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
58 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
59
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
60 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
61 * B-Sample
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
62 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
63 * UART Modem UART Irda
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
64 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
65 * DB9 Ulysse DB9 Ulysse
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
66 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
67 * 1 1, 6 and 4 are connected together on DB9 (Modem and Irda)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
68 * 2 RX TX 2 RX TX
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
69 * 3 TX RX 3 TX RX
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
70 * 4 4
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
71 * 5 GND 5 GND
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
72 * 6 6
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
73 * 7 RTS CTS 7 7 and 8 are connected together on DB9
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
74 * 8 CTS RTS 8
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
75 * 9 NC 9 NC
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
76 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
77 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
78
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
79 #include "swconfig.cfg"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
80
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
81 #include "l1sw.cfg"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
82
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
83 #if (OP_L1_STANDALONE == 0)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
84 #include "rv.cfg"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
85 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
86 #include "board.cfg"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
87 #include "chipset.cfg"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
88 #ifdef BLUETOOTH_INCLUDED
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
89 #include "btemobile.cfg"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
90 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
91
|
602
92dbfa906f66
fc-target.cfg config header renamed to more sensible fc-target.h
Mychaela Falconia <falcon@freecalypso.org>
diff
changeset
|
92 #include "fc-target.h"
|
80
|
93
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
94
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
95 #include <string.h>
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
96 #include "nucleus.h"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
97
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
98 #include "main/sys_types.h"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
99 #include "faxdata.h"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
100 #include "uartfax.h"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
101
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
102 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
103 * Needed to reset and restart the sleep timer in case of incoming characters.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
104 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
105
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
106 #include "serialswitch.h"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
107 extern SYS_BOOL uart_sleep_timer_enabled;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
108
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
109 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
110 * rv_general.h is needed for macros Min & Min3.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
111 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
112
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
113 #include "rv/rv_general.h"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
114
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
115 #include "memif/mem.h"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
116
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
117 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
118 #include "armio/armio.h"
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
119 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
120
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
121 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
122 * Maximal value for an unsigned 32 bits.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
123 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
124
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
125 #define MAX_UNSIGNED_32 (4294967295)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
126
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
127 #define FIFO_SIZE (64) /* In bytes. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
128
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
129
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
130 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
131 * TLR is used to program the RX FIFO trigger levels. FCR[7:4] are not used.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
132 * No trigger level used for TX FIFO. THR_IT generated on TX FIFO empty.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
133 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
134
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
135 #define RX_FIFO_TRIGGER_LEVEL (12 << 4)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
136
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
137
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
138 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
139 * 16750 addresses. Registers accessed when LCR[7] = 0.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
140 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
141
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
142 #define RHR (0x00) /* Rx buffer register - Read access */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
143 #define THR (0x00) /* Tx holding register - Write access */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
144 #define IER (0x01) /* Interrupt enable register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
145
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
146 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
147 * 16750 addresses. Registers accessed when LCR[7] = 1.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
148 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
149
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
150 #define DLL (0x00) /* Divisor latch (LSB) */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
151 #define DLM (0x01) /* Divisor latch (MSB) */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
152
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
153
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
154 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
155 * EFR is accessed when LCR[7:0] = 0xBF.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
156 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
157
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
158 #define EFR (0x02) /* Enhanced feature register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
159
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
160
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
161 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
162 * 16750 addresses. Bit 5 of the FCR register is accessed when LCR[7] = 1.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
163 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
164
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
165 #define IIR (0x02) /* Interrupt ident. register - Read only */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
166 #define FCR (0x02) /* FIFO control register - Write only */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
167 #define LCR (0x03) /* Line control register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
168 #define MCR (0x04) /* Modem control register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
169 #define LSR (0x05) /* Line status register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
170 #define MSR (0x06) /* Modem status register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
171 #define TCR (0x06) /* Transmission control register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
172 #define TLR (0x07) /* Trigger level register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
173 #define MDR1 (0x08) /* Mode definition register 1 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
174 #define SCR (0x10) /* Supplementary Control register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
175 #define SSR (0x11) /* Supplementary Status register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
176 #define UASR (0x0E) /* Autobauding Status register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
177
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
178 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
179 * Supplementary control register.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
180 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
181
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
182 #define TX_EMPTY_CTL_IT (0x08)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
183 #define RX_CTS_WAKE_UP_ENABLE_BIT (4) /* Use RESET_BIT and SET_BIT macros. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
184 #define DSR_IT_BIT (5) /* Use RESET_BIT and SET_BIT macros. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
185
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
186 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
187 * Enhanced feature register.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
188 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
189
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
190 #define ENHANCED_FEATURE_BIT (4) /* Use RESET_BIT and SET_BIT macros. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
191 #define AUTO_CTS_BIT (7) /* Transmission is halted when the CTS pin is high (inactive). */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
192
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
193 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
194 * Mode definition register 1.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
195 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
196
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
197 #define UART_MODE (0x00)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
198 #define SIR_MODE (0x01)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
199 #define UART_MODE_AUTOBAUDING (0x02) /* Reserved in UART/IrDA. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
200 #define RESET_DEFAULT_STATE (0x07)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
201 #define IR_SLEEP_DISABLED (0x00)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
202 #define IR_SLEEP_ENABLED (0x08)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
203 #define SIR_TX_WITHOUT_ACREG2 (0x00) /* Reserved in UART/modem. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
204 #define SIR_TX_WITH_ACREG2 (0x20) /* Reserved in UART/modem. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
205 #define FRAME_LENGTH_METHOD (0x00) /* Reserved in UART/modem. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
206 #define EOT_BIT_METHOD (0x80) /* Reserved in UART/modem. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
207
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
208 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
209 * Supplementary Status Register
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
210 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
211
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
212 #define TX_FIFO_FULL (0x01)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
213
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
214
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
215 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
216 * Interrupt enable register.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
217 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
218
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
219 #define ERBI (0x01) /* Enable received data available interrupt */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
220 #define ETBEI (0x02) /* Enable transmitter holding register empty interrupt */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
221 #define ELSI (0x04) /* Enable receiver line status interrupt */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
222 #define EDSSI (0x08) /* Enable modem status interrupt */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
223 #define IER_SLEEP (0x10) /* Enable sleep mode */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
224
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
225 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
226 * Modem control register.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
227 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
228
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
229 #define MDCD (0x01) /* Data Carrier Detect. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
230 #define MRTS (0x02) /* Request To Send. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
231 #define TCR_TLR_BIT (6)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
232
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
233 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
234 * Line status register.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
235 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
236
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
237 #define DR (0x01) /* Data ready */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
238 #define OE (0x02) /* Overrun error */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
239 #define PE (0x04) /* Parity error */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
240 #define FE (0x08) /* Framing error */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
241 #define BI (0x10) /* Break interrupt */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
242 #define THRE (0x20) /* Transmitter holding register (FIFO empty) */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
243 #define TEMT (0x40) /* Transmitter empty (FIFO and TSR both empty) */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
244
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
245 #define BYTE_ERROR (OE | PE | FE | BI)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
246
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
247 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
248 * Interrupt identification register.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
249 * Bit 0 is set to 0 if an IT is pending.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
250 * Bits 1 and 2 are used to identify the IT.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
251 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
252
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
253 #define IIR_BITS_USED (0x07)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
254 #define IT_PENDING (0x01)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
255 #define RX_DATA (0x04)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
256 #define TX_EMPTY (0x02)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
257 #define MODEM_STATUS (0x00)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
258
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
259 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
260 * Modem status register.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
261 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
262
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
263 #define DELTA_CTS (0x01)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
264 #define DELTA_DSR (0x02)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
265 #define MCTS (0x10) /* Clear to send */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
266 #define MDSR (0x20) /* Data set ready */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
267
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
268 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
269 * Line control register.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
270 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
271
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
272 #define WLS_5 (0x00) /* Word length: 5 bits */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
273 #define WLS_6 (0x01) /* Word length: 6 bits */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
274 #define WLS_7 (0x02) /* Word length: 7 bits */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
275 #define WLS_8 (0x03) /* Word length: 8 bits */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
276 #define STB (0x04) /* Number of stop bits: 0: 1, 1: 1,5 or 2 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
277 #define PEN (0x08) /* Parity enable */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
278 #define EPS (0x10) /* Even parity select */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
279 #define BREAK_CONTROL (0x40) /* Enable a break condition */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
280 #define DLAB (0x80) /* Divisor latch access bit */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
281
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
282 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
283 * FIFO control register.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
284 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
285
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
286 #define FIFO_ENABLE (0x01)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
287 #define RX_FIFO_RESET (0x02)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
288 #define TX_FIFO_RESET (0x04)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
289
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
290 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
291 * These constants define the states of the escape sequence detection.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
292 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
293
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
294 #define INITIALIZATION (0)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
295 #define NO_ESCAPE_SEQUENCE (1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
296 #define ONE_CHAR_DETECTED (2)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
297 #define TWO_CHARS_DETECTED (3)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
298 #define THREE_CHARS_DETECTED (4)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
299
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
300 #define CHARACTERS_IN_ESC_SEQ (3)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
301 #define DEFAULT_ESC_SEQ_CHARACTER '+'
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
302 #define DEFAULT_GUARD_PERIOD (1000) /* 1 second. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
303
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
304 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
305 * 3 HISR are used to avoid to execute operations from the LISR.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
306 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
307
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
308 #define RX_HISR_PRIORITY (2)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
309
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
310
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
311
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
312
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
313 // NGENGE increase hisr stack otherwise overflows with multiple callbacks
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
314 //#define RX_HISR_STACK_SIZE (512) /* Bytes. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
315 #define RX_HISR_STACK_SIZE (768) /* Bytes. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
316
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
317
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
318
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
319
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
320 #define TX_HISR_PRIORITY (2)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
321
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
322
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
323
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
324 // NGENGE increase hisr stack otherwise overflows with multiple callbacks
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
325 //#define TX_HISR_STACK_SIZE (512) /* Bytes. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
326 #define TX_HISR_STACK_SIZE (768) /* Bytes. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
327
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
328
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
329
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
330
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
331 #define V24_HISR_PRIORITY (2)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
332 #define V24_HISR_STACK_SIZE (512) /* Bytes. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
333
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
334 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
335 * When the break interrupt indicator (BI) is set in the line status register
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
336 * (LSR), it indicates that the received data input was held in the low state
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
337 * for longer than a full-word transmission time. In the FIFO mode, when a break
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
338 * occurs, only one 0 character is loaded into the FIFO. The next character
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
339 * transfer is enabled after SIN goes to the marking state for at least two RCLK
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
340 * samples and then receives the next valid start bit.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
341 * This constant defined a defined break length returned by the US_GetLineState
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
342 * function.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
343 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
344
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
345 #define MINIMAL_BREAK_LENGTH (2)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
346
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
347 #define BREAK_HISR_PRIORITY (2)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
348 #define BREAK_HISR_STACK_SIZE (512) /* Bytes. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
349
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
350 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
351 * These macros allow to read and write a UART register.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
352 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
353
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
354 #define READ_UART_REGISTER(UART,REG) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
355 *((volatile SYS_UWORD8 *) ((UART)->base_address + (REG)))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
356
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
357 #define WRITE_UART_REGISTER(UART,REG,VALUE) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
358 *((volatile SYS_UWORD8 *) ((UART)->base_address + (REG))) = (VALUE)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
359
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
360 #define RESET_BIT(UART,REG,BIT) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
361 (WRITE_UART_REGISTER ( \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
362 UART, REG, READ_UART_REGISTER (UART, REG) & ~(1 << (BIT))))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
363
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
364 #define SET_BIT(UART,REG,BIT) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
365 (WRITE_UART_REGISTER ( \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
366 UART, REG, READ_UART_REGISTER (UART, REG) | (1 << (BIT))))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
367
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
368
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
369 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
370 * These macros allow to enable or disable the wake-up interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
371 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
372
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
373 #define ENABLE_WAKEUP_INTERRUPT(UART) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
374 SET_BIT(UART, SCR, RX_CTS_WAKE_UP_ENABLE_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
375
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
376 #define DISABLE_WAKEUP_INTERRUPT(UART) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
377 RESET_BIT(UART, SCR, RX_CTS_WAKE_UP_ENABLE_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
378
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
379
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
380 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
381 * These macros allow to enable or disable the DSR interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
382 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
383
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
384 #define ENABLE_DSR_INTERRUPT(UART) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
385 SET_BIT(UART, SCR, DSR_IT_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
386
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
387 #define DISABLE_DSR_INTERRUPT(UART) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
388 RESET_BIT(UART, SCR, DSR_IT_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
389
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
390
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
391 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
392 * The transmitter is disabled only when the application disables the driver.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
393 * To disable the driver, the receiver and the transmitter are disabled by the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
394 * application. The transmitter is disabled first to test if the driver is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
395 * disabled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
396 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
397
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
398 #define DRIVER_DISABLED(UART) ((UART)->tx_stopped_by_application)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
399
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
400 #define DISABLE_DRIVER(UART) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
401 { \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
402 (UART)->tx_stopped_by_application = 1; \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
403 (UART)->rx_stopped_by_application = 1; \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
404 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
405
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
406 #define ENABLE_DRIVER(UART) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
407 { \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
408 (UART)->rx_stopped_by_application = 0; \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
409 (UART)->tx_stopped_by_application = 0; \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
410 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
411
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
412 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
413 * Low and high watermarks for the RX buffer. If it is enabled, the flow
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
414 * control is activated or deactivated according to these values.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
415 * The high watermark value allows to copy an array filled with the RX FIFO
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
416 * into the RX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
417 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
418
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
419 #define RX_LOW_WATERMARK(RX_BUFFER_SIZE) (FIFO_SIZE)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
420 #define RX_HIGH_WATERMARK(RX_BUFFER_SIZE) ((RX_BUFFER_SIZE) - 2 * FIFO_SIZE)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
421
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
422 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
423 * This macro allows to know if the RX buffer is full. It must be called only
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
424 * from the RX HISR. If it is called from the application, the rx_in and
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
425 * rx_fifo_in pointers may be updated if a RX interrupt occurs or if the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
426 * RX HISR is activated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
427 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
428
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
429 #define RX_BUFFER_FULL(UART) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
430 (((UART)->rx_in == (UART)->rx_out - 1) || \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
431 ((UART)->rx_in == (UART)->rx_out + (UART)->buffer_size))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
432
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
433 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
434 * This macro allows to know if the TX buffer is empty.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
435 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
436
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
437 #define TX_BUFFER_EMPTY(UART) \
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
438 ((UART)->tx_in == (UART)->tx_out)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
439
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
440 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
441 * This macro is used to convert a time (unit: ms) into a number of TDMA.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
442 * 1 TDMA = 4.6 ms (23/5).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
443 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
444
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
445 #define CONVERT_TIME_IN_TDMA(TIME) (((TIME) * 5) / 23)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
446
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
447 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
448 * This structure describes an UART compatible with the UART 16750 and
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
449 * contains some fields to manage this UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
450 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
451
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
452 typedef struct s_uart {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
453
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
454 SYS_UWORD32 base_address;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
455
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
456 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
457 * HISR executed from the RX/TX interrupt handler.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
458 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
459
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
460 NU_HISR rx_hisr_ctrl_block;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
461 NU_HISR tx_hisr_ctrl_block;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
462 NU_HISR v24_hisr_ctrl_block;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
463
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
464 char rx_hisr_stack[RX_HISR_STACK_SIZE];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
465 char tx_hisr_stack[TX_HISR_STACK_SIZE];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
466 char v24_hisr_stack[V24_HISR_STACK_SIZE];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
467
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
468 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
469 * 2 arrays are used to store bytes read in RX FIFO. A UART RX interrupt
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
470 * may occur while executing RX operations in RX HISR. To avoid overwriting
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
471 * the array in which received bytes are stored, a second array is used.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
472 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
473
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
474 SYS_UWORD8 *rx_buffer_used_by_rx_lisr;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
475 SYS_UWORD8 *rx_buffer_used_by_rx_hisr;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
476 SYS_UWORD8 rx_fifo_byte_1[FIFO_SIZE];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
477 SYS_UWORD8 rx_fifo_byte_2[FIFO_SIZE];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
478 SYS_UWORD16 bytes_in_rx_buffer_1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
479 SYS_UWORD16 bytes_in_rx_buffer_2;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
480
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
481 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
482 * RX and TX buffers.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
483 * One character is not used in each buffer to allow to know if the buffer
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
484 * is empty or not (See macro RX_BUFFER_FULL). If buffers are empty,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
485 * rx_in = rx_out and tx_in = tx_out. It is impossible to use fields to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
486 * count the number of bytes in each buffer because these fields may be
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
487 * updated from the application and from the interrupt handlers. That avoids
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
488 * to have conflicts.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
489 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
490
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
491 SYS_UWORD16 buffer_size;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
492 SYS_UWORD16 rx_threshold_level;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
493 SYS_UWORD16 tx_threshold_level;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
494 SYS_UWORD8 rx_buffer[FD_MAX_BUFFER_SIZE + 1];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
495 SYS_UWORD8 tx_buffer[FD_MAX_BUFFER_SIZE + 1];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
496 SYS_UWORD8 *rx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
497 SYS_UWORD8 *rx_out;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
498 SYS_UWORD8 *tx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
499 SYS_UWORD8 *tx_out;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
500
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
501 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
502 * Escape sequence.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
503 * the field esc_seq_modified may have 2 values:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
504 * - 0: No modification.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
505 * - 1: Parameters are in the process of modification: The detection
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
506 * is stopped.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
507 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
508
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
509 NU_TIMER guard_period_timer_ctrl_block;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
510 SYS_UWORD8 esc_seq_modified;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
511 SYS_UWORD8 esc_seq_detection_state;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
512 SYS_UWORD8 esc_seq_character;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
513 UNSIGNED guard_period;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
514 UNSIGNED current_time;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
515 UNSIGNED previous_time;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
516
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
517 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
518 * Flow control.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
519 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
520
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
521 T_flowCtrlMode flow_control_mode;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
522 SYS_BOOL send_xon_xoff;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
523 SYS_UWORD8 xon_xoff_to_send;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
524 SYS_UWORD8 xon_character;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
525 SYS_UWORD8 xoff_character;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
526 SYS_BOOL rx_stopped_by_application;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
527 SYS_BOOL rx_stopped_by_driver;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
528 SYS_BOOL rx_stopped_by_lisr;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
529 SYS_BOOL tx_stopped_by_application;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
530 SYS_BOOL tx_stopped_by_driver;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
531 /* SYS_BOOL tx_stopped_by_lisr;*/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
532
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
533 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
534 * Break.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
535 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
536
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
537 SYS_BOOL break_received;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
538 SYS_BOOL break_to_send;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
539 SYS_BOOL break_in_progress;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
540 NU_HISR break_hisr_ctrl_block;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
541 char break_hisr_stack[BREAK_HISR_STACK_SIZE];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
542 NU_TIMER break_timer_ctrl_block;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
543 UNSIGNED baudrate;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
544 UNSIGNED autobauding;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
545 UNSIGNED bits_per_char; /* Including start, stop and parity bits. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
546 UNSIGNED break_length; /* In bytes. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
547 UNSIGNED time_without_character;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
548
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
549 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
550 * Callback (UAF_ReadData and UAF_WriteData).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
551 * rd: read, wr: write.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
552 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
553
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
554 SYS_BOOL esc_seq_received;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
555 SYS_UWORD8 rts_level; /* RTS on RS232 side, CTS on chipset side.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
556 1: The RS232 line is deactivated (low). */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
557
|
80
|
558 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
559 SYS_UWORD8 dtr_level; /* Controlled with an I/O on C & D-Sample and
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
560 handled by Calypso+ on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
561 1: The RS232 line is deactivated (low). */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
562 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
563 * When the DTR interrupt is detected the user's Rx callback function must
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
564 * be called but if the Rx FIFO is not empty the Rx HISR must be activated
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
565 * to read the bytes received in the Rx FIFO and to put them into the Rx
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
566 * buffer before to call the user's Rx callback function.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
567 * If the Rx HISR is activated due to a Rx interrupt the user's Rx callback
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
568 * function will be called if conditions to call it are fulfilled. If it is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
569 * activated due to the DTR interrupt the user's Rx callback function must
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
570 * be called without any conditions.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
571 * Because the Rx HISR may have been activated but not executed before the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
572 * DTR interrupt we must be sure that the user's Rx callback function will
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
573 * be called for each Rx HISR activation. Call is done for Rx HISR activated
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
574 * on Rx interrupt if conditions are fulfilled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
575 * A circular buffer of 2 elements is used to memorize the source of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
576 * interrupt. Before the activation of the Rx HISR, the source of interrupt
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
577 * is memorized into this array. When the code of the Rx HISR is executed
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
578 * the user's Rx callback function is called if the source of interrupt was
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
579 * the DTR interrupt regardless of the other conditions.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
580 * The level of DTR is saved to provide the level detected on Rx interrupt
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
581 * or DTR interrupt in the 'state' parameter of the user's Rx callback
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
582 * function.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
583 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
584
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
585 SYS_BOOL dtr_change_detected[2];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
586 SYS_UWORD8 dtr_level_saved[2];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
587 SYS_UWORD8 index_it;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
588 SYS_UWORD8 index_hisr;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
589 #endif /* BOARD 8 or 9 or 40 or 41 or CHIPSET 12 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
590
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
591 SYS_BOOL reading_suspended;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
592 SYS_BOOL writing_suspended;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
593 SYS_BOOL rd_call_from_hisr_in_progress;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
594 SYS_BOOL wr_call_from_hisr_in_progress;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
595 T_reInstMode rd_call_setup;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
596 T_reInstMode wr_call_setup;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
597 SYS_UWORD8 *rd_address[2];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
598 SYS_UWORD8 *wr_address[2];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
599 SYS_UWORD16 rd_size_before_call[2];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
600 SYS_UWORD16 rd_size_after_call[2];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
601 SYS_UWORD16 wr_size_before_call[2];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
602 SYS_UWORD16 wr_size_after_call[2];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
603
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
604 void (*readOutFunc) (SYS_BOOL cldFromIrq,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
605 T_reInstMode *reInstall,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
606 SYS_UWORD8 nsource,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
607 SYS_UWORD8 *source[],
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
608 SYS_UWORD16 size[],
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
609 SYS_UWORD32 state);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
610
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
611 void (*writeInFunc) (SYS_BOOL cldFromIrq,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
612 T_reInstMode *reInstall,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
613 SYS_UWORD8 ndest,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
614 SYS_UWORD8 *dest[],
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
615 SYS_UWORD16 size[]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
616
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
617 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
618 * These fields are used to store the state defined in UAF_GetLineState.The
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
619 * first field is used when UAF_GetLineState and UAF_ReadData are not called.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
620 * When one of these functions is called the second field is used. That
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
621 * avoids to lose events when UAF_GetLineState or UAF_ReadData resets the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
622 * first field.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
623 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
624
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
625 SYS_UWORD32 state_1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
626 SYS_UWORD32 state_2;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
627 SYS_UWORD32 *state;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
628
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
629 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
630 * Errors counters.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
631 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
632
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
633 SYS_UWORD32 framing_error;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
634 SYS_UWORD32 parity_error;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
635 SYS_UWORD32 overrun_error;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
636 SYS_UWORD32 spurious_interrupts;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
637
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
638 SYS_UWORD16 max_rx_fifo_level;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
639
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
640 } t_uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
641
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
642
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
643 static t_uart uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
644
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
645
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
646 static const SYS_UWORD32 base_address[NUMBER_OF_FD_UART] =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
647 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
648 MEM_UART_IRDA,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
649 MEM_UART_MODEM
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
650 #if (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
651 , MEM_UART_MODEM2
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
652 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
653 };
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
654
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
655
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
656 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
657 * DLL (LSB) and DLH (MSB) registers values using the 13 MHz clock.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
658 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
659
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
660 static const SYS_UWORD8 dll[] =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
661 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
662 0, /* Auto baud: */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
663 81, /* 75 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
664 40, /* 150 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
665 148, /* 300 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
666 74, /* 600 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
667 165, /* 1200 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
668 83, /* 2400 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
669 169, /* 4800 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
670 113, /* 7200 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
671 84, /* 9600 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
672 56, /* 14400 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
673 42, /* 19200 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
674 28, /* 28800 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
675 24, /* 33900 baud: not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
676 21, /* 38400 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
677 14, /* 57600 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
678 7, /* 115200 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
679 0, /* 203125 baud: not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
680 0, /* 406250 baud: not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
681 0 /* 812500 baud: not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
682 };
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
683
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
684 static const SYS_UWORD8 dlh[] =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
685 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
686 0, /* Auto baud: */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
687 42, /* 75 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
688 21, /* 150 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
689 10, /* 300 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
690 5, /* 600 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
691 2, /* 1200 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
692 1, /* 2400 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
693 0, /* 4800 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
694 0, /* 7200 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
695 0, /* 9600 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
696 0, /* 14400 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
697 0, /* 19200 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
698 0, /* 28800 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
699 0, /* 33900 baud: not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
700 0, /* 38400 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
701 0, /* 57600 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
702 0, /* 115200 baud. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
703 0, /* 203125 baud: not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
704 0, /* 406250 baud: not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
705 0 /* 812500 baud: not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
706 };
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
707
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
708 static const UNSIGNED baudrate_value[] =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
709 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
710 1,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
711 75,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
712 150,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
713 300,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
714 600,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
715 1200,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
716 2400,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
717 4800,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
718 7200,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
719 9600,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
720 14400,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
721 19200,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
722 28800,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
723 0, /* Not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
724 38400,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
725 57600,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
726 115200,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
727 0, /* Not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
728 0, /* Not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
729 0 /* Not supported. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
730 };
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
731
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
732
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
733
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
734
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
735 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
736 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
737 * get_bytes_in_rx_buffer
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
738 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
739 * Purpose : Gets the number of bytes in the RX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
740 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
741 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
742 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
743 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
744 * Returns : The number of bytes in the RX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
745 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
746 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
747
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
748 static SYS_UWORD16
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
749 get_bytes_in_rx_buffer (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
750 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
751 SYS_UWORD16 bytes_in_rx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
752 volatile SYS_UWORD8 *rx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
753
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
754 rx_in = uart->rx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
755
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
756 if (uart->rx_out <= rx_in)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
757 bytes_in_rx_buffer = (SYS_UWORD16) (rx_in - uart->rx_out);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
758 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
759 bytes_in_rx_buffer =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
760 (SYS_UWORD16) (rx_in - uart->rx_out + uart->buffer_size + 1);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
761
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
762 return (bytes_in_rx_buffer);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
763 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
764
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
765 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
766 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
767 * get_bytes_in_tx_buffer
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
768 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
769 * Purpose : Gets the number of bytes in the TX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
770 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
771 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
772 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
773 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
774 * Returns : The number of bytes in the TX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
775 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
776 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
777
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
778 static SYS_UWORD16
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
779 get_bytes_in_tx_buffer (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
780 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
781 SYS_UWORD16 bytes_in_tx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
782 volatile SYS_UWORD8 *tx_out;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
783
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
784 tx_out = uart->tx_out;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
785
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
786 if (tx_out <= uart->tx_in)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
787 bytes_in_tx_buffer = (SYS_UWORD16) (uart->tx_in - tx_out);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
788 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
789 bytes_in_tx_buffer =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
790 (SYS_UWORD16) (uart->tx_in - tx_out + uart->buffer_size + 1);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
791
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
792 return (bytes_in_tx_buffer);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
793 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
794
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
795 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
796 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
797 * compute_break_time
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
798 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
799 * Purpose : Computes a number of TDMA from 3 parameters:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
800 * - baudrate,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
801 * - bits per character including start bit, stop bits and parity,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
802 * - number of characters.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
803 * Due to the TDMA value (4.6 ms), a minimal value is sent: 2 TDMA.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
804 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
805 * Arguments: In : baudrate
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
806 * bits_per_char
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
807 * number_of_chars
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
808 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
809 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
810 * Returns : The number of TDMA.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
811 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
812 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
813
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
814 static UNSIGNED
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
815 compute_break_time (UNSIGNED baudrate,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
816 UNSIGNED bits_per_char,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
817 UNSIGNED number_of_chars)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
818 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
819 UNSIGNED number_of_tdma;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
820
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
821 number_of_tdma = CONVERT_TIME_IN_TDMA (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
822 1000 * bits_per_char * number_of_chars / baudrate);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
823
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
824 if (number_of_tdma == 0)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
825 number_of_tdma = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
826
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
827 number_of_tdma++;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
828
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
829 return (number_of_tdma);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
830 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
831
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
832 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
833 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
834 * update_reading_callback
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
835 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
836 * Purpose : Updates the sizes array and the addresses array and get and builds
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
837 * the state parameter defined in UAF_GetLineState to call the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
838 * readOutFunc function.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
839 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
840 * Arguments: In : uart : Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
841 * call_source: 0: application, 1: HISR (Rx or V24), 3: Rx HISR
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
842 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
843 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
844 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
845 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
846 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
847
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
848 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
849 update_reading_callback (t_uart *uart,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
850 SYS_BOOL call_source)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
851 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
852 SYS_UWORD32 state;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
853 SYS_UWORD8 dtr_level;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
854 SYS_UWORD8 fragments_number;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
855 SYS_UWORD16 bytes_in_rx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
856 volatile SYS_UWORD8 *rx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
857
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
858 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
859 * Update the sizes array and the addresses array.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
860 * A copy of rx_in is used because it may be updated by the interrupt
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
861 * handler if this function is called from the application.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
862 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
863
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
864 rx_in = uart->rx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
865
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
866 if (uart->rx_out < rx_in) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
867
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
868 fragments_number = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
869
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
870 uart->rd_address[0] = uart->rx_out;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
871 uart->rd_size_before_call[0] = (SYS_UWORD16) (rx_in - uart->rx_out);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
872 uart->rd_size_after_call[0] = uart->rd_size_before_call[0];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
873
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
874 uart->rd_size_before_call[1] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
875 uart->rd_size_after_call[1] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
876
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
877 bytes_in_rx_buffer = uart->rd_size_before_call[0];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
878
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
879 } else if (rx_in == uart->rx_out) { /* RX buffer empty. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
880
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
881 fragments_number = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
882
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
883 uart->rd_address[0] = uart->rx_out;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
884 uart->rd_size_before_call[0] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
885 uart->rd_size_after_call[0] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
886
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
887 uart->rd_size_before_call[1] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
888 uart->rd_size_after_call[1] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
889
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
890 bytes_in_rx_buffer = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
891
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
892 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
893
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
894 fragments_number = 2;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
895
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
896 uart->rd_address[0] = uart->rx_out;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
897 uart->rd_size_before_call[0] =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
898 uart->buffer_size + 1 - (SYS_UWORD16) (uart->rx_out -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
899 &(uart->rx_buffer[0]));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
900 uart->rd_size_after_call[0] = uart->rd_size_before_call[0];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
901
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
902 uart->rd_address[1] = &(uart->rx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
903 uart->rd_size_before_call[1] = (SYS_UWORD16) (rx_in -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
904 &(uart->rx_buffer[0]));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
905 uart->rd_size_after_call[1] = uart->rd_size_before_call[1];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
906
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
907 bytes_in_rx_buffer =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
908 uart->rd_size_before_call[0] + uart->rd_size_before_call[1];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
909
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
910 if (!uart->rd_size_before_call[1])
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
911 fragments_number = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
912 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
913
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
914 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
915 * Build the state parameter defined in UAF_GetLineState.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
916 * The field state_2 is used when state_1 is set to 0 to avoid to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
917 * lose events detected in the RX interrupt handler.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
918 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
919
|
80
|
920 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
921 if (call_source == 3) /* Call from Rx HISR */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
922 dtr_level = uart->dtr_level_saved[uart->index_hisr];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
923 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
924 dtr_level = uart->dtr_level;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
925 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
926
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
927 state = uart->state_2;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
928 uart->state_2 = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
929 uart->state = &(uart->state_2);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
930
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
931 state |= uart->state_1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
932 uart->state_1 = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
933 uart->state = &(uart->state_1);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
934
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
935 state |= ((((SYS_UWORD32) uart->rts_level) << RTS) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
936
|
80
|
937 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
938 (((SYS_UWORD32) dtr_level) << DTR) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
939 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
940
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
941 (((SYS_UWORD32) (uart->tx_stopped_by_application |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
942 uart->tx_stopped_by_driver)) << TXSTP) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
943
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
944 (((SYS_UWORD32) (uart->rx_stopped_by_application |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
945 uart->rx_stopped_by_driver)) << RXSTP) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
946
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
947 (((SYS_UWORD32) (uart->buffer_size - bytes_in_rx_buffer)) << RXBLEV));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
948
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
949 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
950 * Fields SA, SB and X are set according to the flow control:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
951 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
952 * None RTS/CTS XON/XOFF
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
953 * SA DTR DTR DTR
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
954 * SB RTS 0 RTS
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
955 * X 0 RTS XON:0 XOFF:1 (transmitter)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
956 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
957 * DTR is supported on C, D & E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
958 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
959
|
80
|
960 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
961 state |= (((SYS_UWORD32) uart->dtr_level) << SA);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
962 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
963
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
964 if (uart->flow_control_mode != fc_rts)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
965 state |= (((SYS_UWORD32) uart->rts_level) << SB);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
966
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
967 if (uart->flow_control_mode == fc_rts)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
968 state |= (((SYS_UWORD32) uart->rts_level) << X);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
969
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
970 else if ((uart->flow_control_mode == fc_xoff) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
971 (uart->tx_stopped_by_application ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
972 uart->tx_stopped_by_driver))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
973 state |= (1 << X);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
974
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
975 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
976 * Call the readOutFunc function with these parameters.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
977 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
978
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
979 uart->rd_call_setup = rm_notDefined;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
980
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
981 (*(uart->readOutFunc)) (call_source & 0x01, /* From HISR or application */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
982 &(uart->rd_call_setup),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
983 fragments_number,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
984 &(uart->rd_address[0]),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
985 &(uart->rd_size_after_call[0]),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
986 state);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
987 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
988
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
989 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
990 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
991 * update_writing_callback
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
992 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
993 * Purpose : Updates the sizes array and the addresses array to call the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
994 * writeInFunc function.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
995 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
996 * Arguments: In : uart : Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
997 * call_source: 0: application, 1: HISR
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
998 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
999 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1000 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1001 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1002 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1003
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1004 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1005 update_writing_callback (t_uart *uart,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1006 SYS_BOOL call_source)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1007 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1008 SYS_UWORD8 fragments_number;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1009 volatile SYS_UWORD8 *tx_out;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1010
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1011 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1012 * Update the array of sizes and the array of addresses.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1013 * A copy of tx_out is used because it may be updated by the interrupt
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1014 * handler if this function is called from the application.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1015 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1016
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1017 tx_out = uart->tx_out;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1018
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1019 if (uart->tx_in < tx_out) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1020
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1021 fragments_number = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1022
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1023 uart->wr_address[0] = uart->tx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1024 uart->wr_size_before_call[0] =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1025 (SYS_UWORD16) (tx_out - uart->tx_in - 1);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1026 uart->wr_size_after_call[0] = uart->wr_size_before_call[0];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1027
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1028 uart->wr_size_before_call[1] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1029 uart->wr_size_after_call[1] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1030
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1031 } else if (tx_out == &(uart->tx_buffer[0])) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1032
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1033 fragments_number = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1034
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1035 uart->wr_address[0] = uart->tx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1036 uart->wr_size_before_call[0] =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1037 uart->buffer_size -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1038 (SYS_UWORD16) (uart->tx_in - &(uart->tx_buffer[0]));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1039 uart->wr_size_after_call[0] = uart->wr_size_before_call[0];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1040
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1041 uart->wr_size_before_call[1] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1042 uart->wr_size_after_call[1] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1043
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1044 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1045
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1046 fragments_number = 2;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1047
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1048 uart->wr_address[0] = uart->tx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1049 uart->wr_size_before_call[0] =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1050 uart->buffer_size + 1 -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1051 (SYS_UWORD16) (uart->tx_in - &(uart->tx_buffer[0]));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1052 uart->wr_size_after_call[0] = uart->wr_size_before_call[0];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1053
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1054 uart->wr_address[1] = &(uart->tx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1055 uart->wr_size_before_call[1] =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1056 (SYS_UWORD16) (tx_out - &(uart->tx_buffer[0]) - 1);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1057 uart->wr_size_after_call[1] = uart->wr_size_before_call[1];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1058
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1059 if (!uart->wr_size_before_call[1])
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1060 fragments_number = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1061 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1062
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1063 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1064 * Call the writeInFunc function with these parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1065 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1066
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1067 uart->wr_call_setup = rm_notDefined;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1068
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1069 (*(uart->writeInFunc)) (call_source,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1070 &(uart->wr_call_setup),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1071 fragments_number,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1072 &(uart->wr_address[0]),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1073 &(uart->wr_size_after_call[0]));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1074 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1075
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1076 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1077 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1078 * stop_break
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1079 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1080 * Purpose : The timer is activated to expire when a time corresponding to the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1081 * sending time of 2 characters at least has elapsed. After a break,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1082 * no character may be sent during this period.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1083 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1084 * Arguments: In : id: parameter not used.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1085 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1086 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1087 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1088 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1089 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1090
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1091 static VOID
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1092 stop_break (UNSIGNED id)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1093 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1094 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1095
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1096 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1097
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1098 uart->break_to_send = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1099 uart->break_in_progress = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1100
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1101 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1102 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1103 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1104 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1105
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1106 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1107 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1108 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1109
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1110 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1111 * Unmask Tx interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1112 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1113
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1114 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1115 uart, IER, READ_UART_REGISTER (uart, IER) | ETBEI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1116 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1117
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1118 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1119 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1120 * hisr_start_break
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1121 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1122 * Purpose : Enables the timer used to control the time without character.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1123 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1124 * Arguments: In : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1125 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1126 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1127 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1128 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1129 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1130
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1131 static VOID
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1132 hisr_start_break (VOID)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1133 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1134 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1135
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1136 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1137
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1138 (void) NU_Control_Timer (&(uart->break_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1139 NU_DISABLE_TIMER);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1140
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1141 (void) NU_Reset_Timer (&(uart->break_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1142 stop_break,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1143 uart->time_without_character,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1144 0, /* The timer expires once. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1145 NU_DISABLE_TIMER);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1146
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1147 (void) NU_Control_Timer (&(uart->break_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1148 NU_ENABLE_TIMER);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1149 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1150
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1151 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1152 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1153 * stop_receiver
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1154 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1155 * Purpose : Activates DTR or RTS or sends XOFF.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1156 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1157 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1158 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1159 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1160 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1161 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1162 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1163
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1164 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1165 stop_receiver (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1166 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1167 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1168 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1169 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1170 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1171
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1172 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1173 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1174 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1175
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1176 switch (uart->flow_control_mode) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1177
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1178 case fc_rts:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1179
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1180 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1181 * CTS (RTS on UART side) is deactivated (high).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1182 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1183
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1184 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1185 uart, MCR, READ_UART_REGISTER (uart, MCR) & ~MRTS);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1186 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1187
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1188 case fc_xoff:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1189
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1190 uart->xon_xoff_to_send = uart->xoff_character;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1191 uart->send_xon_xoff = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1192
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1193 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1194 * Unmask Tx interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1195 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1196
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1197 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1198 uart, IER, READ_UART_REGISTER (uart, IER) | ETBEI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1199 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1200 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1201 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1202
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1203 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1204 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1205 * start_receiver
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1206 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1207 * Purpose : Deactivates DTR or RTS or sends XON.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1208 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1209 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1210 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1211 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1212 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1213 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1214 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1215
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1216 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1217 start_receiver (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1218 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1219 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1220 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1221 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1222 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1223
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1224 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1225 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1226 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1227
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1228 switch (uart->flow_control_mode) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1229
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1230 case fc_rts:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1231
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1232 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1233 * CTS (RTS on UART side) is activated (low).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1234 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1235
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1236 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1237 uart, MCR, READ_UART_REGISTER (uart, MCR) | MRTS);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1238 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1239
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1240 case fc_xoff:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1241
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1242 uart->xon_xoff_to_send = uart->xon_character;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1243 uart->send_xon_xoff = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1244
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1245 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1246 * Unmask Tx interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1247 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1248
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1249 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1250 uart, IER, READ_UART_REGISTER (uart, IER) | ETBEI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1251 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1252 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1253 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1254
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1255 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1256 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1257 * add_esc_seq_char_in_rx_buffer
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1258 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1259 * Purpose : Writes one escape sequence character in the RX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1260 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1261 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1262 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1263 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1264 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1265 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1266 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1267
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1268 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1269 add_esc_seq_char_in_rx_buffer (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1270 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1271 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1272 * IF the RX buffer is not full, write an escape sequence character in the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1273 * RX buffer and check wrap-around.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1274 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1275
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1276 if (!RX_BUFFER_FULL (uart)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1277
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1278 *(uart->rx_in++) = uart->esc_seq_character;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1279
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1280 if (uart->rx_in == &(uart->rx_buffer[0]) + uart->buffer_size + 1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1281 uart->rx_in = &(uart->rx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1282 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1283 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1284
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1285 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1286 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1287 * analyze_guard_period_timer_expiration
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1288 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1289 * Purpose : According to the state of the escape sequence detection, 1 or 2
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1290 * escape sequence characters may be written into the TX buffer or
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1291 * the escape sequence is declared as detected.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1292 * If 1 or 2 escape sequence characters have been detected the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1293 * guard period must not expire.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1294 * If 3 characters have been detected the escape sequence must
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1295 * expire.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1296 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1297 * Arguments: In : id: parameter not used.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1298 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1299 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1300 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1301 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1302 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1303
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1304 static VOID
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1305 analyze_guard_period_timer_expiration (UNSIGNED id)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1306 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1307 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1308 SYS_UWORD16 bytes_in_rx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1309
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1310 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1311
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1312 switch (uart->esc_seq_detection_state) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1313
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1314 case ONE_CHAR_DETECTED:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1315
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1316 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1317 * 1 escape sequence character has been detected. The guard period has
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1318 * ellapsed. This character is written into the TX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1319 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1320
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1321 add_esc_seq_char_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1322 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1323
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1324 case TWO_CHARS_DETECTED:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1325
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1326 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1327 * 2 escape sequence characters have been detected. The guard period has
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1328 * ellapsed. These characters are written into the TX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1329 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1330
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1331 add_esc_seq_char_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1332 add_esc_seq_char_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1333
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1334 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1335
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1336 case THREE_CHARS_DETECTED:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1337
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1338 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1339 * 3 escape sequence characters have been detected and the guard period
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1340 * has ellapsed. The escape sequence is detected.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1341 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1342
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1343 uart->esc_seq_received = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1344 *(uart->state) |= (1 << ESC);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1345
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1346 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1347 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1348
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1349 uart->esc_seq_detection_state = NO_ESCAPE_SEQUENCE;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1350
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1351 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1352 * If the high watermark is reached, RTS is activated or XOFF is sent
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1353 * according to the flow control mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1354 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1355
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1356 bytes_in_rx_buffer = get_bytes_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1357
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1358 if ((uart->flow_control_mode != fc_none) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1359 (bytes_in_rx_buffer >= RX_HIGH_WATERMARK (uart->buffer_size))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1360
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1361 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1362 * Check if receipt must be stopped.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1363 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1364
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1365 if (!uart->rx_stopped_by_driver) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1366
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1367 uart->rx_stopped_by_driver = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1368 if (!uart->rx_stopped_by_application)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1369 stop_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1370 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1371 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1372
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1373 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1374 * If a reading was suspended or if the callback function is installed,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1375 * it is called if one of these conditions is fulfiled:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1376 * - the RX threshold level is reached,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1377 * - a break has been detected,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1378 * - an escape sequence has been detected,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1379 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1380
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1381 if ((!uart->rd_call_from_hisr_in_progress) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1382 (uart->reading_suspended ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1383 (uart->rd_call_setup == rm_reInstall))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1384
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1385 if ((bytes_in_rx_buffer >= uart->rx_threshold_level) ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1386 uart->break_received ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1387 uart->esc_seq_received) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1388
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1389 uart->rd_call_from_hisr_in_progress = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1390 update_reading_callback (uart, 1); /* 1: call from HISR. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1391
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1392 uart->reading_suspended = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1393 uart->break_received = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1394 uart->esc_seq_received = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1395 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1396 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1397 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1398
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1399 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1400 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1401 * stop_guard_period_timer
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1402 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1403 * Purpose : Stops the timer used to detect the guard period expiration.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1404 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1405 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1406 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1407 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1408 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1409 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1410 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1411
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1412 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1413 stop_guard_period_timer (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1414 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1415 (void) NU_Control_Timer (&(uart->guard_period_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1416 NU_DISABLE_TIMER);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1417 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1418
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1419 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1420 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1421 * start_guard_period_timer
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1422 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1423 * Purpose : Starts a timer which expires if the guard period has ellapsed.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1424 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1425 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1426 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1427 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1428 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1429 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1430 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1431
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1432 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1433 start_guard_period_timer (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1434 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1435 (void) NU_Control_Timer (&(uart->guard_period_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1436 NU_DISABLE_TIMER);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1437
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1438 (void) NU_Reset_Timer (&(uart->guard_period_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1439 analyze_guard_period_timer_expiration,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1440 uart->guard_period,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1441 0, /* The timer expires once. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1442 NU_DISABLE_TIMER);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1443
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1444 (void) NU_Control_Timer (&(uart->guard_period_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1445 NU_ENABLE_TIMER);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1446 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1447
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1448 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1449 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1450 * detect_escape_sequence
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1451 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1452 * Purpose : The state machine used to detect an escape sequence is updated
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1453 * according to the array of bytes to analyse. If the state machine
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1454 * goes to the initial state due to a break in the sequence
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1455 * detection, the previous characters are put into the RX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1456 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1457 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1458 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1459 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1460 * Returns : 0: Break in detection or a sequence has been detected.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1461 * 1: A sequence may be detected.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1462 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1463 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1464
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1465 static int
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1466 detect_escape_sequence (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1467 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1468 int detection_result;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1469 SYS_UWORD8 *rx_fifo_byte;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1470 SYS_UWORD16 bytes_in_rx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1471 UNSIGNED elapsed_time;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1472
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1473 detection_result = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1474
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1475 rx_fifo_byte = uart->rx_buffer_used_by_rx_hisr;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1476 if (rx_fifo_byte == &(uart->rx_fifo_byte_1[0]))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1477 bytes_in_rx_buffer = uart->bytes_in_rx_buffer_1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1478 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1479 bytes_in_rx_buffer = uart->bytes_in_rx_buffer_2;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1480
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1481 if (uart->current_time > uart->previous_time)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1482 elapsed_time = uart->current_time - uart->previous_time;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1483 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1484 elapsed_time =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1485 MAX_UNSIGNED_32 - uart->previous_time + uart->current_time;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1486
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1487 switch (uart->esc_seq_detection_state) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1488
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1489 case INITIALIZATION:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1490
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1491 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1492 * It is the first character received. It may be the first character
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1493 * of an escape sequence. The elapsed_time variable is set to the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1494 * guard period value to consider this character as the first character
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1495 * of an escape sequence.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1496 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1497
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1498 if (!uart->esc_seq_modified) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1499
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1500 elapsed_time = uart->guard_period;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1501 uart->esc_seq_detection_state = NO_ESCAPE_SEQUENCE;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1502 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1503
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1504 /* No break! */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1505
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1506 case NO_ESCAPE_SEQUENCE:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1507
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1508 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1509 * To go to the next state (one, two or three characters detected):
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1510 * - a guard period must have elapsed since the last receipt,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1511 * - the characters must belong to the escape sequence.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1512 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1513
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1514 if ((elapsed_time >= uart->guard_period) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1515 (!uart->esc_seq_modified)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1516
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1517 switch (bytes_in_rx_buffer) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1518
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1519 case 1:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1520
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1521 if (*rx_fifo_byte++ == uart->esc_seq_character) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1522
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1523 uart->esc_seq_detection_state = ONE_CHAR_DETECTED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1524 start_guard_period_timer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1525 detection_result = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1526 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1527
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1528 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1529
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1530 case 2:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1531
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1532 if ((*rx_fifo_byte++ == uart->esc_seq_character) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1533 (*rx_fifo_byte++ == uart->esc_seq_character)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1534
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1535 uart->esc_seq_detection_state = TWO_CHARS_DETECTED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1536 start_guard_period_timer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1537 detection_result = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1538 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1539
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1540 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1541
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1542 case 3:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1543
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1544 if ((*rx_fifo_byte++ == uart->esc_seq_character) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1545 (*rx_fifo_byte++ == uart->esc_seq_character) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1546 (*rx_fifo_byte++ == uart->esc_seq_character)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1547
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1548 uart->esc_seq_detection_state = THREE_CHARS_DETECTED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1549 start_guard_period_timer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1550 detection_result = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1551 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1552
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1553 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1554
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1555 default:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1556
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1557 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1558 * No action.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1559 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1560
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1561 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1562 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1563 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1564
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1565 uart->previous_time = uart->current_time;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1566
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1567 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1568
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1569 case ONE_CHAR_DETECTED:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1570
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1571 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1572 * To go to the next state (two or three characters detected):
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1573 * - the difference between the current time and the previous time
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1574 * must be less than the guard period,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1575 * - the characters must belong to the escape sequence.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1576 * Otherwise, an escape sequence character is written in the RX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1577 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1578
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1579 if (!uart->esc_seq_modified) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1580
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1581 switch (bytes_in_rx_buffer) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1582
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1583 case 1:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1584
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1585 if (*rx_fifo_byte++ == uart->esc_seq_character) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1586
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1587 uart->esc_seq_detection_state = TWO_CHARS_DETECTED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1588 detection_result = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1589 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1590
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1591 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1592
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1593 case 2:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1594
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1595 if ((*rx_fifo_byte++ == uart->esc_seq_character) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1596 (*rx_fifo_byte++ == uart->esc_seq_character)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1597
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1598 start_guard_period_timer (uart); /* Reset the timer. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1599
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1600 uart->esc_seq_detection_state = THREE_CHARS_DETECTED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1601 detection_result = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1602 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1603
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1604 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1605
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1606 default:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1607
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1608 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1609 * No action.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1610 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1611
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1612 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1613 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1614 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1615
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1616 if (!detection_result) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1617
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1618 add_esc_seq_char_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1619
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1620 uart->previous_time = uart->current_time;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1621 uart->esc_seq_detection_state = NO_ESCAPE_SEQUENCE;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1622 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1623
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1624 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1625
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1626 case TWO_CHARS_DETECTED:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1627
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1628 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1629 * To go to the next state (three chars detected):
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1630 * - the difference between the current time and the previous time
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1631 * must be less than the guard period,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1632 * - the character must belong to the escape sequence.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1633 * Otherwise, 2 escape sequence characters are written in the RX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1634 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1635
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1636 if (!uart->esc_seq_modified) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1637
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1638 switch (bytes_in_rx_buffer) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1639
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1640 case 1:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1641
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1642 if (*rx_fifo_byte++ == uart->esc_seq_character) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1643
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1644 start_guard_period_timer (uart); /* Reset the timer. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1645
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1646 uart->esc_seq_detection_state = THREE_CHARS_DETECTED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1647 detection_result = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1648 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1649
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1650 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1651
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1652 default:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1653
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1654 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1655 * No action.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1656 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1657
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1658 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1659 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1660 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1661
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1662 if (!detection_result) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1663
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1664 add_esc_seq_char_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1665 add_esc_seq_char_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1666
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1667 uart->previous_time = uart->current_time;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1668 uart->esc_seq_detection_state = NO_ESCAPE_SEQUENCE;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1669 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1670
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1671 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1672
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1673 case THREE_CHARS_DETECTED:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1674
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1675 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1676 * An escape sequence is detected if a guard period has elapsed since
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1677 * the last receipt. Otherwise, 3 escape sequence characters are
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1678 * written in the RX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1679 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1680
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1681 stop_guard_period_timer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1682
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1683 add_esc_seq_char_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1684 add_esc_seq_char_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1685 add_esc_seq_char_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1686
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1687 uart->previous_time = uart->current_time;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1688 uart->esc_seq_detection_state = NO_ESCAPE_SEQUENCE;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1689
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1690 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1691 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1692
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1693 return (detection_result);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1694 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1695
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1696 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1697 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1698 * send_break
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1699 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1700 * Purpose : This function may only called if the TX FIFO is empty.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1701 * Null characters are written in the TX FIFO. The number of bytes to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1702 * write has been defined with UAF_SetLineState. Enables the break
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1703 * condition.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1704 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1705 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1706 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1707 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1708 * Returns : Number of bytes sent.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1709 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1710 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1711
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1712 static SYS_UWORD16
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1713 send_break (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1714 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1715 SYS_UWORD16 bytes_in_tx_fifo;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1716
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1717 bytes_in_tx_fifo = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1718 uart->break_in_progress = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1719
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1720 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1721 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1722 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1723 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1724
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1725 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1726 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1727 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1728
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1729 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1730 uart, LCR, READ_UART_REGISTER (uart, LCR) | BREAK_CONTROL);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1731
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1732 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1733 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1734 * Re-enable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1735 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1736
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1737 /* BELOW LINES WERE COMMENTED TO DISABLE SLEEP MODE IN DRIVER */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1738 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1739 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1740 uart, IER, READ_UART_REGISTER (uart, IER) | IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1741
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1742 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1743 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1744
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1745 while (uart->break_length) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1746
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1747 WRITE_UART_REGISTER (uart, THR, 0x00);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1748 uart->break_length--;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1749 bytes_in_tx_fifo++;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1750 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1751
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1752 return (bytes_in_tx_fifo);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1753 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1754
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1755 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1756 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1757 * build_rx_fifo_array
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1758 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1759 * Purpose : Reads the RX FIFO to build an array with bytes read.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1760 * A byte is written in this array if no error is detected.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1761 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1762 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1763 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1764 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1765 * Returns : The number of bytes in RX FIFO.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1766 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1767 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1768
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1769 static SYS_UWORD16
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1770 build_rx_fifo_array (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1771 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1772 SYS_UWORD8 status;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1773 SYS_UWORD8 *first_byte;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1774 SYS_UWORD8 *current_byte;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1775 SYS_UWORD16 *bytes_in_rx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1776 SYS_UWORD16 bytes_received;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1777 SYS_UWORD8 cbyte;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1778
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1779 volatile int x;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1780
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1781 x = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1782
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1783 bytes_received = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1784
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1785
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1786 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1787 * Switch to the other buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1788 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1789
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1790 first_byte = uart->rx_buffer_used_by_rx_lisr;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1791 if (first_byte == &(uart->rx_fifo_byte_1[0])) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1792
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1793 first_byte = &(uart->rx_fifo_byte_2[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1794 bytes_in_rx_buffer = &(uart->bytes_in_rx_buffer_2);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1795
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1796 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1797
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1798 first_byte = &(uart->rx_fifo_byte_1[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1799 bytes_in_rx_buffer = &(uart->bytes_in_rx_buffer_1);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1800 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1801
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1802 current_byte = first_byte;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1803
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1804 if (*bytes_in_rx_buffer) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1805
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1806
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1807 /* The Rx buffer is not empty and is being used by HISR ! */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1808 /* Hence stop the flow control */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1809 stop_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1810
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1811 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1812 * Reset LCR[7] (DLAB) to have access to the RBR, THR and IER registers.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1813 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1814 WRITE_UART_REGISTER (uart, LCR, READ_UART_REGISTER (uart, LCR) & ~DLAB);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1815
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1816 /* Mask The Rx and interrupt */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1817
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1818 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1819 uart, IER, READ_UART_REGISTER (uart, IER) &
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1820 ~(ERBI | EDSSI));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1821
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1822 uart->rx_stopped_by_lisr = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1823 return (bytes_received);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1824
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1825 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1826
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1827 uart->rx_buffer_used_by_rx_lisr = first_byte;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1828
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1829 status = READ_UART_REGISTER (uart, LSR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1830
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1831 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1832 * Build an array with the bytes contained in the RX FIFO.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1833 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1834
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1835 while (status & DR) { /* While RX FIFO is not empty... */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1836
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1837 *current_byte = READ_UART_REGISTER (uart, RHR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1838
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1839 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1840 * Check if a parity error or a framing error is associated with the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1841 * received data. If there is an error the byte is not copied into the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1842 * bytes array.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1843 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1844
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1845 if (status & BYTE_ERROR) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1846
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1847 if (status & OE)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1848 uart->overrun_error++;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1849
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1850 if (status & PE)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1851 uart->parity_error++;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1852
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1853 if (status & FE)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1854 uart->framing_error++;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1855
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1856 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1857 * Check break detection.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1858 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1859
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1860 if (status & BI) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1861
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1862 uart->break_received = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1863 *(uart->state) |=
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1864 ((1 << BRK) | (MINIMAL_BREAK_LENGTH << BRKLEN));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1865 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1866
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1867 } else /* No error */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1868 current_byte++;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1869
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1870 status = READ_UART_REGISTER (uart, LSR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1871 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1872
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1873 bytes_received = (SYS_UWORD16) (current_byte - first_byte);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1874 *bytes_in_rx_buffer = bytes_received;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1875
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1876 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1877 * Re-switch to the other buffer if no valid character has been received.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1878 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1879
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1880 if (!bytes_received) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1881
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1882 if (uart->rx_buffer_used_by_rx_lisr == &(uart->rx_fifo_byte_1[0]))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1883 uart->rx_buffer_used_by_rx_lisr = &(uart->rx_fifo_byte_2[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1884
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1885 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1886 uart->rx_buffer_used_by_rx_lisr = &(uart->rx_fifo_byte_1[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1887 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1888
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1889 if (bytes_received > uart->max_rx_fifo_level)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1890 uart->max_rx_fifo_level = bytes_received;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1891
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1892 return (bytes_received);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1893 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1894
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1895 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1896 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1897 * empty_rx_fifo
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1898 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1899 * Purpose : Read the RX FIFO.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1900 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1901 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1902 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1903 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1904 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1905 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1906 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1907
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1908 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1909 empty_rx_fifo (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1910 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1911 SYS_UWORD16 bytes_in_rx_fifo;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1912 volatile SYS_UWORD8 dummy_byte;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1913
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1914 bytes_in_rx_fifo = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1915
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1916 while (READ_UART_REGISTER (uart, LSR) & DR) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1917
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1918 dummy_byte = READ_UART_REGISTER (uart, RHR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1919 bytes_in_rx_fifo++;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1920 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1921
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1922 if (bytes_in_rx_fifo > uart->max_rx_fifo_level)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1923 uart->max_rx_fifo_level = bytes_in_rx_fifo;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1924 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1925
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1926 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1927 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1928 * hisr_execute_rx_operations
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1929 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1930 * Purpose : If an escape sequence is detected or if a break in the detection
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1931 * has occured RX FIFO bytes are written in the RX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1932 * If the software flow control is used bytes are analyzed to know
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1933 * if a XON or a XOFF character is received to stop or start the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1934 * transmitter.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1935 * If a flow control is used and if the high watermark of the RX
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1936 * buffer is reached the receiver is stopped.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1937 * If the RX threshold level is reached the callback mechanism is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1938 * activated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1939 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1940 * Arguments: In : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1941 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1942 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1943 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1944 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1945 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1946
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1947 static VOID
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1948 hisr_execute_rx_operations (VOID)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1949 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1950 SYS_UWORD16 bytes_free_in_rx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1951 SYS_UWORD16 wrap_around_counter;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1952 SYS_UWORD16 bytes_in_rx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1953 SYS_UWORD16 bytes_read;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1954 SYS_UWORD16 bytes_to_copy;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1955 SYS_UWORD8 *current_byte;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1956 SYS_UWORD8 xon_xoff_detected;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1957 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1958
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1959 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1960
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1961 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1962 * Since new characters have been received, the sleep timer is reset then
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1963 * restarted preventing the system to enter deep-sleep for a new period of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1964 * time.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1965 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1966
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1967 SER_restart_uart_sleep_timer ();
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1968 uart_sleep_timer_enabled = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1969
|
80
|
1970 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1971 uart->index_hisr = (uart->index_hisr + 1) & 0x01; /* 0 or 1 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1972 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1973
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1974 xon_xoff_detected = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1975
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1976 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1977 * Switch to the other buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1978 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1979
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1980 current_byte = uart->rx_buffer_used_by_rx_hisr;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1981 if (current_byte == &(uart->rx_fifo_byte_1[0])) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1982
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1983 current_byte = &(uart->rx_fifo_byte_2[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1984 bytes_read = uart->bytes_in_rx_buffer_2;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1985
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1986 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1987
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1988 current_byte = &(uart->rx_fifo_byte_1[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1989 bytes_read = uart->bytes_in_rx_buffer_1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1990 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1991
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1992 uart->rx_buffer_used_by_rx_hisr = current_byte;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1993
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1994 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1995 * All bytes are copied into the RX buffer only if an escape sequence has
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1996 * been detected or a break in the detection has occured.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1997 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1998
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1999 if (!detect_escape_sequence (uart)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2000
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2001 if (uart->rx_out > uart->rx_in)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2002 bytes_free_in_rx_buffer = (SYS_UWORD16) (uart->rx_out - uart->rx_in - 1);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2003 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2004 bytes_free_in_rx_buffer =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2005 (SYS_UWORD16) (uart->buffer_size + uart->rx_out - uart->rx_in);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2006
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2007 wrap_around_counter = uart->buffer_size + 1 -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2008 (SYS_UWORD16) (uart->rx_in - &(uart->rx_buffer[0]));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2009
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2010 if (uart->flow_control_mode == fc_xoff) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2011
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2012 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2013 * For SW Flow Control, need to further investigate the processing
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2014 * in order to improve the performance of the driver, and in order
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2015 * to avoid managing the wrap around of the circular buffer each
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2016 * time a character is copied.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2017 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2018
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2019 while (bytes_read && bytes_free_in_rx_buffer) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2020
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2021 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2022 * If the data received is XON or XOFF, the transmitter is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2023 * enabled (XON) or disabled (XOFF).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2024 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2025
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2026 if (*current_byte == uart->xoff_character) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2027
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2028 uart->tx_stopped_by_driver = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2029 xon_xoff_detected = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2030
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2031 } else if (*current_byte == uart->xon_character) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2032
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2033 uart->tx_stopped_by_driver = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2034 xon_xoff_detected = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2035
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2036 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2037 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2038 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2039 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2040
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2041 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2042 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2043 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2044
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2045 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2046 * Unmask Tx interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2047 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2048
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2049 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2050 uart, IER, READ_UART_REGISTER (uart, IER) | ETBEI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2051
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2052 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2053
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2054 *(uart->rx_in++) = *current_byte;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2055
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2056 wrap_around_counter--;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2057 if (!wrap_around_counter) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2058
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2059 uart->rx_in = &(uart->rx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2060 wrap_around_counter = uart->buffer_size + 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2061 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2062
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2063 bytes_free_in_rx_buffer--;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2064 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2065
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2066 current_byte++;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2067 bytes_read--;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2068 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2069 } else { /* No Flow Control or HW Flow Control */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2070
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2071 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2072 * Figure out the most restricting condition.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2073 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2074
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2075 bytes_to_copy =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2076 Min3 (bytes_free_in_rx_buffer, wrap_around_counter, bytes_read);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2077
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2078 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2079 * Copy characters into the circular Rx buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2080 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2081
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2082 memcpy (uart->rx_in, current_byte, bytes_to_copy);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2083
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2084 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2085 * Update first the variables associated to blocking conditions:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2086 * if (bytes_read = 0) OR
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2087 * (bytes_free_in_rx_buffer = 0) => No more characters to copy.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2088 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2089
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2090 bytes_free_in_rx_buffer -= bytes_to_copy;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2091 bytes_read -= bytes_to_copy;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2092
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2093 wrap_around_counter -= bytes_to_copy;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2094 if (!wrap_around_counter)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2095 uart->rx_in = &(uart->rx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2096 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2097 uart->rx_in += bytes_to_copy;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2098
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2099 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2100 * Check if there are still some characters to copy.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2101 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2102
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2103 if (bytes_read && bytes_free_in_rx_buffer) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2104
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2105 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2106 * Update the remaining variables and figure out again the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2107 * most restricting condition. Since (bytes_read = 0) and
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2108 * (bytes_free_in_rx_buffer = 0) are blocking conditions, if
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2109 * we reach that point it means that the wrap around condition
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2110 * has just occurred and it is not needed to manage it again.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2111 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2112
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2113 current_byte += bytes_to_copy;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2114 bytes_to_copy = Min (bytes_read, bytes_free_in_rx_buffer);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2115
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2116 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2117 * Copy characters into the circular Rx buffer and update
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2118 * current pointer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2119 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2120
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2121 memcpy (uart->rx_in, current_byte, bytes_to_copy);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2122
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2123 uart->rx_in += bytes_to_copy;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2124
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2125 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2126 * bytes_free_in_rx_buffer not updated since not used anymore.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2127 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2128 bytes_read -= bytes_to_copy;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2129
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2130 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2131 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2132 bytes_read = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2133 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2134 } /* end if (uart->flow_control_mode == fc_xoff) */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2135
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2136
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2137 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2138 * If the high watermark is reached, RTS is activated or XOFF is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2139 * sent according to the flow control mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2140 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2141
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2142 bytes_in_rx_buffer = get_bytes_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2143
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2144 if ((uart->flow_control_mode != fc_none) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2145 (bytes_in_rx_buffer >= RX_HIGH_WATERMARK (uart->buffer_size))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2146
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2147 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2148 * Check if receipt must be stopped.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2149 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2150
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2151 if (!uart->rx_stopped_by_driver) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2152
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2153 uart->rx_stopped_by_driver = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2154 if (!uart->rx_stopped_by_application)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2155 stop_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2156 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2157 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2158
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2159 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2160 * If a reading was suspended or if the callback function is installed,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2161 * it is called if one of these conditions is fulfiled:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2162 * - the RX threshold level is reached,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2163 * - a break has been detected,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2164 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2165
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2166 if ((!uart->rd_call_from_hisr_in_progress) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2167 (uart->reading_suspended ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2168 (uart->rd_call_setup == rm_reInstall))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2169
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2170 if ((bytes_in_rx_buffer >= uart->rx_threshold_level) ||
|
80
|
2171 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2172 uart->dtr_change_detected[uart->index_hisr] ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2173 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2174 uart->break_received ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2175 xon_xoff_detected) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2176
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2177
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2178 uart->rd_call_from_hisr_in_progress = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2179 update_reading_callback (uart, 3); /* 3: call from Rx HISR. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2180
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2181 uart->reading_suspended = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2182 uart->break_received = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2183 uart->esc_seq_received = 0;
|
80
|
2184 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2185 uart->dtr_change_detected[uart->index_hisr] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2186 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2187 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2188 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2189
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2190 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2191
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2192
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2193
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2194 WRITE_UART_REGISTER (uart, LCR, READ_UART_REGISTER (uart, LCR) & ~DLAB);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2195
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2196 /* Mask The Rx and Modem status interrupt */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2197 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2198 uart, IER, READ_UART_REGISTER (uart, IER) &
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2199 ~(ERBI | EDSSI));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2200
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2201 if ((uart->rx_buffer_used_by_rx_hisr) == &(uart->rx_fifo_byte_1[0])) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2202
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2203 uart->bytes_in_rx_buffer_1 = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2204
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2205 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2206
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2207 uart->bytes_in_rx_buffer_2 = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2208 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2209
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2210
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2211 WRITE_UART_REGISTER (uart, LCR, READ_UART_REGISTER (uart, LCR) & ~DLAB);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2212
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2213 /* Unmask The Rx and Modem status interrupt*/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2214 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2215 uart, IER, READ_UART_REGISTER (uart, IER) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2216 (ERBI | EDSSI));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2217
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2218 if(uart->rx_stopped_by_lisr ) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2219 if (!uart->rx_stopped_by_driver) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2220
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2221
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2222 uart->rx_stopped_by_lisr = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2223
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2224 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2225 * Reset LCR[7] (DLAB) to have access to the RBR, THR and IER registers.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2226 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2227 WRITE_UART_REGISTER (uart, LCR, READ_UART_REGISTER (uart, LCR) & ~DLAB);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2228
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2229
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2230 /* UnMask The Rx interrupt */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2231 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2232 uart, IER, READ_UART_REGISTER (uart, IER) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2233 (ERBI | EDSSI));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2234
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2235 start_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2236
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2237 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2238 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2239
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2240 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2241
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2242 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2243 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2244 * hisr_execute_v24_operations
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2245 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2246 * Purpose : The user's function is called if all conditions to call it are
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2247 * fulfiled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2248 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2249 * Arguments: In : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2250 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2251 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2252 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2253 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2254 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2255
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2256 static VOID
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2257 hisr_execute_v24_operations (VOID)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2258 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2259 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2260
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2261 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2262
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2263 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2264 * If a reading was suspended or if the callback function is installed,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2265 * it is called.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2266 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2267
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2268 if ((!DRIVER_DISABLED (uart)) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2269 (!uart->rd_call_from_hisr_in_progress) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2270 (uart->reading_suspended || (uart->rd_call_setup == rm_reInstall))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2271
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2272 uart->rd_call_from_hisr_in_progress = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2273 update_reading_callback (uart, 1); /* 1: call from HISR. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2274 uart->reading_suspended = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2275 uart->break_received = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2276 uart->esc_seq_received = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2277 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2278
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2279 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2280
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2281 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2282 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2283 * hisr_execute_tx_operations
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2284 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2285 * Purpose : Writes bytes from the TX buffer to the TX FIFO.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2286 * The user's function is called if all conditions to call it are
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2287 * fulfiled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2288 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2289 * Arguments: In : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2290 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2291 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2292 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2293 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2294 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2295
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2296 static VOID
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2297 hisr_execute_tx_operations (VOID)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2298 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2299 SYS_UWORD16 bytes_in_tx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2300 SYS_UWORD16 bytes_in_tx_fifo;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2301 SYS_UWORD16 wrap_around_counter;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2302 SYS_UWORD16 bytes_to_write;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2303 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2304 int counter;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2305
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2306
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2307 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2308
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2309 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2310 * A TX interrupt may have occured during the previous TX HISR. This case
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2311 * may appear when a HISR having a higher priority has been activated when
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2312 * the TX HISR was activated. When the next TX HISR is activated, the TX
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2313 * FIFO may not be empty. Nothing is done until a TX interrupt will occur.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2314 * The RX HISR will be activated again and the TX FIFO will be empty.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2315 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2316
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2317 if (READ_UART_REGISTER (uart, LSR) & THRE) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2318
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2319 bytes_in_tx_fifo = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2320
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2321 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2322 * A request to send a XON/XOFF character may have been done by the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2323 * RX interrupt handler. The byte can be written because we are sure
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2324 * that the TX FIFO is not full.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2325 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2326
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2327 if (uart->send_xon_xoff) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2328
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2329 WRITE_UART_REGISTER (uart, THR, uart->xon_xoff_to_send);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2330 uart->send_xon_xoff = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2331 bytes_in_tx_fifo++;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2332 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2333
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2334 if ((!uart->tx_stopped_by_application) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2335 (!uart->tx_stopped_by_driver)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2336
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2337 bytes_in_tx_buffer = get_bytes_in_tx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2338 wrap_around_counter =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2339 uart->buffer_size + 1 - (SYS_UWORD16) (uart->tx_out -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2340 &(uart->tx_buffer[0]));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2341
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2342 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2343 * Figure out the most restricting condition.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2344 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2345
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2346 #if ((CHIPSET == 3) || (CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2347 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2348 * Loading of only (FIFO_SIZE - 1) characters in the Tx FIFO to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2349 * avoid the generation of a spurious Tx FIFO almost empty
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2350 * interrupt (Ulysse bug report #35).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2351 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2352
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2353 bytes_to_write =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2354 Min3 (bytes_in_tx_buffer, wrap_around_counter,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2355 (FIFO_SIZE - 1 - bytes_in_tx_fifo));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2356 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2357 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2358 * Bug corrected on Calypso rev. A, rev. B, C035, Ulysse C035,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2359 * Calypso Lite & Calypso+.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2360 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2361
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2362 bytes_to_write =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2363 Min3 (bytes_in_tx_buffer, wrap_around_counter,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2364 (FIFO_SIZE - bytes_in_tx_fifo));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2365 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2366
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2367 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2368 * Write characters into the Tx FIFO.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2369 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2370
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2371 for (counter = 0; counter < bytes_to_write; counter++)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2372 WRITE_UART_REGISTER (uart, THR, *(uart->tx_out++));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2373
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2374 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2375 * Update the variables associated to blocking conditions:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2376 * if (bytes_in_tx_buffer = 0) OR
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2377 * (bytes_in_tx_fifo = FIFO_SIZE) => No more characters to copy.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2378 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2379
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2380 bytes_in_tx_buffer -= bytes_to_write;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2381 bytes_in_tx_fifo += bytes_to_write;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2382
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2383 wrap_around_counter -= bytes_to_write;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2384 if (!wrap_around_counter)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2385 uart->tx_out = &(uart->tx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2386
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2387 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2388 * Check if there are still some characters to write.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2389 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2390
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2391 if (bytes_in_tx_buffer &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2392 #if ((CHIPSET == 3) || (CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2393 (bytes_in_tx_fifo < (FIFO_SIZE - 1))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2394 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2395 (bytes_in_tx_fifo < FIFO_SIZE)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2396 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2397
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2398 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2399 * Figure out again the most restricting condition. Since
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2400 * (bytes_in_tx_buffer = 0) and (bytes_in_tx_fifo = FIFO_SIZE)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2401 * are blocking conditions, if we reach that point it means
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2402 * that the wrap around condition has just occurred and it is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2403 * not needed to manage it again.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2404 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2405
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2406 #if ((CHIPSET == 3) || (CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2407 bytes_to_write =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2408 Min (bytes_in_tx_buffer,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2409 (FIFO_SIZE - 1 - bytes_in_tx_fifo));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2410 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2411 bytes_to_write =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2412 Min (bytes_in_tx_buffer,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2413 (FIFO_SIZE - bytes_in_tx_fifo));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2414 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2415
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2416 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2417 * Write characters into the Tx FIFO and update associated
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2418 * variables.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2419 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2420
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2421 for (counter = 0; counter < bytes_to_write; counter++)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2422 WRITE_UART_REGISTER (uart, THR, *(uart->tx_out++));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2423
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2424 bytes_in_tx_buffer += bytes_to_write;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2425 bytes_in_tx_fifo += bytes_to_write;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2426 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2427
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2428 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2429 * If a writing was suspended or if the callback function is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2430 * installed, it is called if the TX threshold level is reached.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2431 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2432
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2433 if ((!DRIVER_DISABLED (uart)) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2434 (!uart->wr_call_from_hisr_in_progress) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2435 (bytes_in_tx_buffer <= uart->tx_threshold_level) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2436 ((uart->wr_call_setup == rm_reInstall) ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2437 uart->writing_suspended)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2438
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2439 uart->writing_suspended = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2440
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2441 uart->wr_call_from_hisr_in_progress = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2442 update_writing_callback (uart, 1); /* 1: call from HISR. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2443 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2444 } /* end if ((!uart->tx_stopped_by_application) && */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2445 /* (!uart->tx_stopped_by_driver)) */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2446
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2447 if (bytes_in_tx_fifo)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2448
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2449 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2450 * Unmask Tx interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2451 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2452
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2453 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2454 uart, IER, READ_UART_REGISTER (uart, IER) | ETBEI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2455
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2456 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2457
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2458 if ((!bytes_in_tx_fifo) && (uart->break_to_send))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2459 bytes_in_tx_fifo = send_break (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2460 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2461
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2462 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2463 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2464 * Re-enable the sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2465 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2466
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2467 /* BELOW LINES WERE COMMENTED TO DISABLE SLEEP MODE IN DRIVER */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2468 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2469 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2470 uart, IER, READ_UART_REGISTER (uart, IER) | IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2471
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2472 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2473 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2474 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2475 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2476
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2477 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2478 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2479 * read_rx_fifo
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2480 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2481 * Purpose : Reads the RX FIFO. If the driver is enabled bytes are written in
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2482 * an array to be analyzed by the RX HISR.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2483 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2484 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2485 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2486 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2487 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2488 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2489 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2490
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2491 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2492 read_rx_fifo (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2493 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2494
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2495 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2496 * If the driver is disabled the RX FIFO is read to acknoledge the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2497 * interrupt else bytes received are written into an array which will be
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2498 * analyzed from the RX HISR.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2499 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2500
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2501 if (DRIVER_DISABLED (uart))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2502 empty_rx_fifo (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2503
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2504 else if (build_rx_fifo_array (uart)){
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2505 (void) NU_Activate_HISR (&(uart->rx_hisr_ctrl_block));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2506
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2507 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2508
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2509
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2510 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2511
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2512 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2513 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2514 * check_v24_input_lines
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2515 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2516 * Purpose : Check the V.24 input lines. According to the states of the input
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2517 * lines and to the flow control mode selected, the transmitter is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2518 * enabled or disabled. The reading callback function is called if
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2519 * it is installed and if all conditions are fulfiled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2520 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2521 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2522 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2523 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2524 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2525 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2526 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2527
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2528 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2529 check_v24_input_lines (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2530 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2531 SYS_BOOL v24_input_line_changed;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2532 volatile SYS_UWORD8 modem_status;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2533
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2534 modem_status = READ_UART_REGISTER (uart, MSR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2535 v24_input_line_changed = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2536
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2537 if (modem_status & DELTA_CTS) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2538
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2539 v24_input_line_changed = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2540
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2541 if (modem_status & MCTS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2542 uart->rts_level = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2543 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2544 uart->rts_level = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2545 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2546
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2547 #if (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2548 else if (modem_status & DELTA_DSR) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2549 v24_input_line_changed = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2550
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2551 if (modem_status & MDSR)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2552 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2553 uart->dtr_level = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2554 if (uart->flow_control_mode != fc_dtr && uart->baudrate == baudrate_value[FD_BAUD_AUTO])
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2555 UAF_SetComPar (UAF_UART_1, FD_BAUD_AUTO, bpc_8, sb_1, pa_none); /* switch back to autobaud */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2556 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2557 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2558 uart->dtr_level = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2559
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2560 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2561 * The reading callback function has to be called. But bytes received before
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2562 * the change of state of DTR must be copied into the RX buffer before to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2563 * call it.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2564 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2565
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2566 if (READ_UART_REGISTER (uart, LSR) & DR) { /* If Rx FIFO is not empty */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2567
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2568 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2569 * The Rx FIFO will be read to fill one of the two buffers and the Rx
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2570 * HISR will be activated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2571 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2572
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2573 uart->index_it = (uart->index_it + 1) & 0x01; /* 0 or 1 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2574 uart->dtr_change_detected[uart->index_it] = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2575 uart->dtr_level_saved[uart->index_it] = uart->dtr_level;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2576 read_rx_fifo (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2577
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2578 } else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2579 v24_input_line_changed = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2580 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2581 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2582
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2583 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2584 * When the hardware flow control is selected, if the RS 232 input signal is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2585 * deactivated (low), the transmitter is stopped.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2586 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2587
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2588 if (uart->flow_control_mode == fc_rts) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2589
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2590 if (uart->rts_level) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2591 uart->tx_stopped_by_driver = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2592 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2593
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2594 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2595
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2596 uart->tx_stopped_by_driver = 0;
|
80
|
2597 #ifdef CONFIG_TARGET_GTAMODEM
|
|
2598 AI_ResetBit(1);
|
|
2599 #endif
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2600
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2601 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2602 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2603 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2604 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2605
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2606 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2607 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2608 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2609
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2610 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2611 * Unmask Tx interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2612 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2613
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2614 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2615 uart, IER, READ_UART_REGISTER (uart, IER) | ETBEI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2616
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2617 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2618 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2619
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2620 if (v24_input_line_changed)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2621 (void) NU_Activate_HISR (&(uart->v24_hisr_ctrl_block));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2622 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2623
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2624 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2625 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2626 * fill_tx_fifo
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2627 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2628 * Purpose : If the TX buffer is not empty, and if there is no break in
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2629 * progress, bytes are written into the TX FIFO until the TX FIFO is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2630 * full or the TX buffer is empty. Else, if there is a break to send
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2631 * an all 0s character is written into the TX FIFO and a break is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2632 * declared in progress to avoid to fill the TX FIFO on the next
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2633 * interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2634 * When the TX FIFO is empty and if a break is in progress, the break
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2635 * length is programmed: all 0s characters are written into the TX
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2636 * FIFO. The number of bytes has been defined previously with the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2637 * UAF_SetLineState function. The break condition is enabled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2638 * When the TX FIFO and the transmitter shift register (TSR) are both
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2639 * empty and if a break is in progress, the break condition is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2640 * disabled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2641 * When bytes are written from the TX buffer to the TX FIFO, the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2642 * writing callback function is called if it is installed and if all
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2643 * conditions are fulfiled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2644 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2645 * Arguments: In : uart: Pointer on the UART structure.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2646 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2647 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2648 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2649 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2650 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2651
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2652 static void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2653 fill_tx_fifo (t_uart *uart)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2654 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2655 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2656 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2657 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2658 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2659
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2660 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2661 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2662 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2663
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2664 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2665 * Mask Tx interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2666 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2667
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2668 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2669 uart, IER, READ_UART_REGISTER (uart, IER) & ~ETBEI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2670
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2671 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2672 * If a break is in progress, bytes of the TX buffer are not written into
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2673 * the TX FIFO.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2674 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2675
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2676 if (!uart->break_in_progress)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2677 (void) NU_Activate_HISR (&(uart->tx_hisr_ctrl_block));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2678
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2679 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2680
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2681 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2682 * The break HISR is activated and the break condition is cleared.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2683 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2684
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2685 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2686 uart, LCR, READ_UART_REGISTER (uart, LCR) & ~BREAK_CONTROL);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2687
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2688 (void) NU_Activate_HISR (&(uart->break_hisr_ctrl_block));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2689 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2690 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2691
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2692 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2693 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2694 * UAF_Init
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2695 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2696 * Purpose : Initializes the UART hardware and installs interrupt handlers.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2697 * The parameters are set to the default values:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2698 * - 19200 baud,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2699 * - 8 bits / character,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2700 * - no parity,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2701 * - 1 stop bit,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2702 * - no flow control.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2703 * All functionalities of the UART driver are disabled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2704 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2705 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2706 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2707 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2708 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2709 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2710 * FD_INTERNAL_ERR : Internal problem.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2711 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2712 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2713
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2714 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2715 UAF_Init (T_fd_UartId uartNo)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2716 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2717 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2718 volatile SYS_UWORD8 status;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2719
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2720 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2721 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2722 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2723 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2724 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2725 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2726 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2727 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2728
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2729 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2730 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2731
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2732 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2733
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2734 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2735 * Create the 3 HISR actived in the RX/TX and V24 interrupt handlers.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2736 * A return is used to simplify the code if an error occurs.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2737 * All stacks are entirely filled with the pattern 0xFE.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2738 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2739
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2740 memset (&(uart->rx_hisr_stack[0]), 0xFE, RX_HISR_STACK_SIZE);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2741
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2742 if (NU_Create_HISR (&(uart->rx_hisr_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2743 "UAF_Rx",
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2744 hisr_execute_rx_operations,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2745 RX_HISR_PRIORITY,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2746 &(uart->rx_hisr_stack[0]),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2747 RX_HISR_STACK_SIZE) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2748
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2749 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2750
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2751 memset (&(uart->tx_hisr_stack[0]), 0xFE, TX_HISR_STACK_SIZE);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2752
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2753 if (NU_Create_HISR (&(uart->tx_hisr_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2754 "UAF_Tx",
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2755 hisr_execute_tx_operations,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2756 TX_HISR_PRIORITY,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2757 &(uart->tx_hisr_stack[0]),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2758 TX_HISR_STACK_SIZE) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2759
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2760 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2761
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2762 memset (&(uart->v24_hisr_stack[0]), 0xFE, V24_HISR_STACK_SIZE);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2763
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2764 if (NU_Create_HISR (&(uart->v24_hisr_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2765 "UAF_V24",
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2766 hisr_execute_v24_operations,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2767 V24_HISR_PRIORITY,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2768 &(uart->v24_hisr_stack[0]),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2769 V24_HISR_STACK_SIZE) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2770
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2771 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2772
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2773 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2774 * Create the HISR used to send a break.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2775 * A return is used to simplify the code if an error occurs.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2776 * The stack is entirely filled with the pattern 0xFE.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2777 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2778
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2779 memset (&(uart->break_hisr_stack[0]), 0xFE, BREAK_HISR_STACK_SIZE);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2780
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2781 if (NU_Create_HISR (&(uart->break_hisr_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2782 "UAF_Brk",
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2783 hisr_start_break,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2784 BREAK_HISR_PRIORITY,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2785 &(uart->break_hisr_stack[0]),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2786 BREAK_HISR_STACK_SIZE) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2787
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2788 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2789
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2790 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2791 * Create a timer used in the break HISR.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2792 * A return is used to simplify the code if an error occurs.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2793 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2794
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2795 if (NU_Create_Timer (&(uart->break_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2796 "Break",
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2797 stop_break,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2798 0, /* Parameter supplied to the routine: not used. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2799 0, /* This parameter is set when the timer is reset. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2800 0, /* The timer expires once. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2801 NU_DISABLE_TIMER) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2802
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2803 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2804
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2805 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2806 * Create a timer used in the detection of the escape sequence.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2807 * A return is used to simplify the code if an error occurs.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2808 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2809
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2810 if (NU_Create_Timer (&(uart->guard_period_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2811 "Esc seq",
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2812 analyze_guard_period_timer_expiration,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2813 0, /* Parameter supplied to the routine: not used. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2814 0, /* This parameter is set when the timer is reset. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2815 0, /* The timer expires once. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2816 NU_DISABLE_TIMER) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2817
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2818 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2819
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2820 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2821 * These data are used to send a break.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2822 * A character has: 8 data bits + 1 start bit + 1 stop bit = 10 bits.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2823 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2824
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2825 uart->baudrate = baudrate_value[FD_BAUD_19200];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2826 uart->autobauding = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2827 uart->bits_per_char = 10;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2828
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2829 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2830 * UART base address.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2831 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2832
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2833 uart->base_address = base_address[uartNo];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2834
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2835 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2836 * Select the current array used to store received bytes.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2837 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2838
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2839 uart->rx_buffer_used_by_rx_lisr = &(uart->rx_fifo_byte_2[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2840 uart->rx_buffer_used_by_rx_hisr = &(uart->rx_fifo_byte_2[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2841
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2842 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2843 * RX and TX buffers.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2844 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2845
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2846 uart->buffer_size = FD_MAX_BUFFER_SIZE;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2847 uart->rx_threshold_level = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2848 uart->tx_threshold_level = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2849 uart->rx_in = &(uart->rx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2850 uart->rx_out = &(uart->rx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2851 uart->tx_in = &(uart->tx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2852 uart->tx_out = &(uart->tx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2853
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2854 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2855 * Escape sequence.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2856 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2857
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2858 uart->esc_seq_modified = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2859 uart->esc_seq_detection_state = INITIALIZATION;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2860 uart->esc_seq_character = DEFAULT_ESC_SEQ_CHARACTER;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2861 uart->guard_period = CONVERT_TIME_IN_TDMA (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2862 DEFAULT_GUARD_PERIOD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2863
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2864 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2865 * Flow control.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2866 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2867
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2868 uart->flow_control_mode = fc_none;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2869 uart->send_xon_xoff = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2870 uart->rx_stopped_by_application = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2871 uart->rx_stopped_by_driver = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2872 uart->rx_stopped_by_lisr = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2873 uart->tx_stopped_by_application = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2874 uart->tx_stopped_by_driver = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2875
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2876 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2877 * Break.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2878 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2879
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2880 uart->break_received = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2881 uart->break_to_send = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2882 uart->break_in_progress = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2883
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2884 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2885 * Callback (UAF_ReadData and UAF_WriteData).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2886 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2887
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2888 uart->esc_seq_received = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2889
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2890 uart->reading_suspended = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2891 uart->writing_suspended = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2892 uart->rd_call_from_hisr_in_progress = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2893 uart->wr_call_from_hisr_in_progress = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2894 uart->rd_call_setup = rm_noInstall;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2895 uart->wr_call_setup = rm_noInstall;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2896
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2897 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2898 * State defined in UAF_GetLineState.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2899 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2900
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2901 uart->state_1 = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2902 uart->state_2 = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2903 uart->state = &(uart->state_1);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2904
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2905 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2906 * Errors counters.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2907 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2908
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2909 uart->framing_error = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2910 uart->parity_error = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2911 uart->overrun_error = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2912 uart->spurious_interrupts = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2913
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2914 uart->max_rx_fifo_level = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2915
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2916 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2917 * Mask all interrupts causes and disable sleep mode and low power mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2918 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2919
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2920 WRITE_UART_REGISTER (uart, IER, 0x00);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2921
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2922 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2923 * Reset UART mode configuration.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2924 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2925
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2926 WRITE_UART_REGISTER (uart, MDR1, RESET_DEFAULT_STATE |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2927 IR_SLEEP_DISABLED |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2928 SIR_TX_WITHOUT_ACREG2 |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2929 FRAME_LENGTH_METHOD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2930
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2931 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2932 * FIFO configuration.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2933 * EFR[4] = 1 to allow to program FCR[5:4] and MCR[7:5].
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2934 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2935
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2936 WRITE_UART_REGISTER (uart, LCR, 0xBF);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2937 SET_BIT (uart, EFR, ENHANCED_FEATURE_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2938
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2939 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2940 * Select the word length, the number of stop bits , the parity and set
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2941 * LCR[7] (DLAB) to allow to program FCR, DLL and DLM.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2942 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2943
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2944 WRITE_UART_REGISTER (uart, LCR, WLS_8 | DLAB);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2945
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2946 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2947 * Program the trigger levels.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2948 * MCR[6] must be set to 1.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2949 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2950
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2951 SET_BIT (uart, MCR, TCR_TLR_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2952 WRITE_UART_REGISTER (uart, TCR, 0x0F);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2953 WRITE_UART_REGISTER (uart, TLR, RX_FIFO_TRIGGER_LEVEL);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2954 RESET_BIT (uart, MCR, TCR_TLR_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2955
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2956 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2957 * Force the generation of THR_IT on TX FIFO empty: SCR[3] = 1.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2958 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2959
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2960 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2961 uart, SCR, READ_UART_REGISTER (uart, SCR) | TX_EMPTY_CTL_IT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2962
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2963 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2964 * Program the FIFO control register. Bit 0 must be set when other FCR bits
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2965 * are written to or they are not programmed.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2966 * FCR is a write-only register. It will not be modified.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2967 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2968
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2969 WRITE_UART_REGISTER (uart, FCR, FIFO_ENABLE |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2970 RX_FIFO_RESET | /* self cleared */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2971 TX_FIFO_RESET); /* self cleared */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2972
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2973 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2974 * Program the baud generator.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2975 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2976
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2977 WRITE_UART_REGISTER (uart, DLL, dll[FD_BAUD_19200]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2978 WRITE_UART_REGISTER (uart, DLM, dlh[FD_BAUD_19200]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2979
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2980 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2981 * Reset LCR[7] (DLAB) to have access to the RBR, THR and IER registers.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2982 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2983
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2984 WRITE_UART_REGISTER (uart, LCR, READ_UART_REGISTER (uart, LCR) & ~DLAB);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2985
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2986 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2987 * Select UART mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2988 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2989
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2990 WRITE_UART_REGISTER (uart, MDR1, UART_MODE |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2991 IR_SLEEP_DISABLED |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2992 SIR_TX_WITHOUT_ACREG2 |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2993 FRAME_LENGTH_METHOD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2994
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2995 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2996 * Read the state of RTS (RTS on RS232, CTS on chipset).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2997 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2998
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2999 status = READ_UART_REGISTER (uart, MSR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3000
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3001 if (status & MCTS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3002 uart->rts_level = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3003 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3004 uart->rts_level = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3005
|
80
|
3006 #if UARTFAX_CLASSIC_DTR_DCD
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3007 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3008 * On C & D-Sample, 2 I/O are used to control DCD and DTR on UART Modem.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3009 * DCD: I/O 2 (output)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3010 * DTR: I/O 3 (input)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3011 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3012
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3013 #define EXTENDED_MCU_REG (0xFFFEF006) /* Extended MCU register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3014 #define ASIC_CONFIG_REG (0xFFFEF008) /* Asic Configuration register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3015
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3016 #define IO_DTR (10) /* I/O 3; bit 10 of Asic Configuration register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3017 #define IO_DCD ( 6) /* I/O 2; bit 6 of Extended MCU register */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3018
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3019 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3020 * Select I/O for DCD and configure it as output.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3021 * DCD should start HIGH (not asserted).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3022 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3023
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3024 *((volatile SYS_UWORD16 *) EXTENDED_MCU_REG) &= ~(1 << IO_DCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3025 AI_ConfigBitAsOutput (ARMIO_DCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3026 AI_SetBit (ARMIO_DCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3027
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3028 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3029 * Select I/O for DTR and configure it as input.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3030 * An interrupt is used to detect a change of state of DTR. Falling edge
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3031 * or rising edge is selected according to the state of DTR.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3032 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3033
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3034 *((volatile SYS_UWORD16 *) ASIC_CONFIG_REG) &= ~(1 << IO_DTR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3035 AI_ConfigBitAsInput (ARMIO_DTR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3036 uart->dtr_level = AI_ReadBit (ARMIO_DTR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3037
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3038 if (uart->dtr_level)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3039 AI_SelectIOForIT (ARMIO_DTR, ARMIO_FALLING_EDGE);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3040 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3041 AI_SelectIOForIT (ARMIO_DTR, ARMIO_RISING_EDGE);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3042
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3043 AI_UnmaskIT (ARMIO_MASKIT_GPIO);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3044
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3045 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3046 * Reset the 2 indexes of the circular buffer of 2 elements.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3047 * The circular buffer does not need to be initialized.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3048 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3049
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3050 uart->index_it = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3051 uart->index_hisr = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3052 #elif (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3053 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3054 * DCD and DTR are directly handled by Calypso+.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3055 * Force DCD pin to HIGH
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3056 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3057
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3058 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) & ~MDCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3059
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3060 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3061 * Read the state of DTR (DTR on RS232, DSR on chipset).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3062 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3063
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3064 status = READ_UART_REGISTER (uart, MSR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3065
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3066 if (status & MDSR)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3067 uart->dtr_level = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3068 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3069 uart->dtr_level = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3070
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3071 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3072 * Reset the 2 indexes of the circular buffer of 2 elements.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3073 * The circular buffer does not need to be initialized.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3074 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3075
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3076 uart->index_it = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3077 uart->index_hisr = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3078 #endif /* BOARD == 8, 9, 40 or 41, CHIPSET == 12 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3079
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3080 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3081 * Unmask RX interrupt and the modem status interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3082 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3083
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3084 WRITE_UART_REGISTER (uart, IER, ERBI | EDSSI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3085
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3086 #if (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3087 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3088 * Unmask DSR interrupt in order to detect a change of state of DTR.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3089 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3090
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3091 ENABLE_DSR_INTERRUPT (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3092 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3093
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3094 return (FD_OK);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3095 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3096
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3097 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3098 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3099 * UAF_Enable
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3100 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3101 * Purpose : The functionalities of the UART driver are disabled or enabled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3102 * In the deactivated state, all information about the communication
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3103 * parameters should be stored and recalled if the driver is again
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3104 * enabled. When the driver is enabled the RX and TX buffers are
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3105 * cleared.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3106 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3107 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3108 * : enable: 1: enable the driver
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3109 * 0: disable the driver
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3110 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3111 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3112 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3113 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3114 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3115 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3116 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3117
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3118 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3119 UAF_Enable (T_fd_UartId uartNo,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3120 SYS_BOOL enable)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3121 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3122 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3123
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3124 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3125 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3126 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3127 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3128 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3129 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3130 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3131 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3132
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3133 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3134 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3135
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3136 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3137 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3138 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3139
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3140 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3141
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3142 if (enable) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3143
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3144 uart->rx_stopped_by_driver = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3145
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3146 ENABLE_DRIVER (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3147 start_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3148
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3149 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3150
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3151 DISABLE_DRIVER (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3152 stop_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3153
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3154 uart->tx_in = &(uart->tx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3155 uart->rx_in = &(uart->rx_buffer[0]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3156 uart->tx_out = uart->tx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3157 uart->rx_out = uart->rx_in;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3158 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3159
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3160 return (FD_OK);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3161 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3162
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3163 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3164 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3165 * UAF_SetComPar
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3166 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3167 * Purpose : Sets up the communication parameters: baud rate, bits per
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3168 * character, number of stop bits, parity.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3169 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3170 * Arguments: In : uartNo : Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3171 * baudrate: Used baud rate.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3172 * bpc : Used bits per character.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3173 * sb : Used stop bits.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3174 * parity : Used parity.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3175 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3176 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3177 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3178 * FD_NOT_SUPPORTED: The specified parameters don't fit to the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3179 * capabilities of the UART or wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3180 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3181 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3182 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3183
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3184 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3185 UAF_SetComPar (T_fd_UartId uartNo,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3186 T_baudrate baudrate,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3187 T_bitsPerCharacter bpc,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3188 T_stopBits sb,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3189 T_parity parity)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3190 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3191 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3192 volatile SYS_UWORD8 mcr_value;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3193 volatile SYS_UWORD8 status;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3194
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3195 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3196 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3197 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3198 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3199 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3200 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3201 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3202 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3203
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3204 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3205 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3206
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3207 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3208 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3209 * pa_space is not supported. Some baudrates are not supported too.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3210 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3211 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3212
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3213 if ((!baudrate_value[baudrate]) ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3214 (parity == pa_space))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3215
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3216 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3217
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3218 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3219
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3220 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3221 * Mask all interrupts causes and disable sleep mode and low power mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3222 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3223
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3224 WRITE_UART_REGISTER (uart, IER, 0x00);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3225
|
80
|
3226 #if UARTFAX_CLASSIC_DTR_DCD
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3227 AI_MaskIT (ARMIO_MASKIT_GPIO);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3228 #elif (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3229 DISABLE_DSR_INTERRUPT (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3230 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3231
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3232 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3233 * Reset UART mode configuration.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3234 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3235
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3236 WRITE_UART_REGISTER (uart, MDR1, RESET_DEFAULT_STATE |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3237 IR_SLEEP_DISABLED |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3238 SIR_TX_WITHOUT_ACREG2 |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3239 FRAME_LENGTH_METHOD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3240
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3241 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3242 * FIFO configuration.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3243 * EFR[4] = 1 to allow to program FCR[5:4] and MCR[7:5].
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3244 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3245
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3246 WRITE_UART_REGISTER (uart, LCR, 0xBF);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3247 SET_BIT (uart, EFR, ENHANCED_FEATURE_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3248
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3249 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3250 * Select the word length, the number of stop bits , the parity and set
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3251 * LCR[7] (DLAB) to allow to program FCR, DLL and DLM.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3252 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3253
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3254 uart->baudrate = baudrate_value[baudrate];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3255 uart->autobauding = (baudrate == FD_BAUD_AUTO); /* if autobauding enable trigger */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3256 uart->bits_per_char = 1; /* Start bit. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3257 mcr_value = DLAB;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3258
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3259 if (bpc == bpc_7) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3260
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3261 mcr_value |= WLS_7;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3262 uart->bits_per_char += 7;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3263
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3264 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3265
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3266 mcr_value |= WLS_8;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3267 uart->bits_per_char += 8;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3268 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3269
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3270 if (sb == sb_2) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3271
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3272 mcr_value |= STB;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3273 uart->bits_per_char += 2;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3274
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3275 } else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3276 uart->bits_per_char += 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3277
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3278 switch (parity) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3279
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3280 case pa_even:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3281
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3282 mcr_value |= (PEN | EPS);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3283 uart->bits_per_char += 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3284
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3285 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3286
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3287 case pa_odd:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3288
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3289 mcr_value |= PEN;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3290 uart->bits_per_char += 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3291
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3292 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3293
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3294 default:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3295
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3296 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3297 * There is nothing to do.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3298 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3299
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3300 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3301 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3302
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3303 WRITE_UART_REGISTER (uart, LCR, mcr_value);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3304
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3305 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3306 * Program the trigger levels.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3307 * MCR[6] must be set to 1.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3308 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3309
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3310 SET_BIT (uart, MCR, TCR_TLR_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3311 WRITE_UART_REGISTER (uart, TCR, 0x0F);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3312 WRITE_UART_REGISTER (uart, TLR, RX_FIFO_TRIGGER_LEVEL);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3313 RESET_BIT (uart, MCR, TCR_TLR_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3314
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3315 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3316 * Force the generation of THR_IT on TX FIFO empty: SCR[3] = 1.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3317 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3318
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3319 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3320 uart, SCR, READ_UART_REGISTER (uart, SCR) | TX_EMPTY_CTL_IT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3321
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3322 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3323 * Program the FIFO control register. Bit 0 must be set when other FCR bits
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3324 * are written to or they are not programmed.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3325 * FCR is a write-only register. It will not be modified.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3326 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3327
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3328 WRITE_UART_REGISTER (uart, FCR, FIFO_ENABLE |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3329 RX_FIFO_RESET | /* self cleared */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3330 TX_FIFO_RESET); /* self cleared */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3331
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3332 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3333 * Program the baud generator.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3334 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3335
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3336 WRITE_UART_REGISTER (uart, DLL, dll[baudrate]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3337 WRITE_UART_REGISTER (uart, DLM, dlh[baudrate]);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3338
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3339 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3340 * Reset LCR[7] (DLAB) to have access to the RBR, THR and IER registers.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3341 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3342
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3343 WRITE_UART_REGISTER (uart, LCR, READ_UART_REGISTER (uart, LCR) & ~DLAB);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3344
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3345 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3346 * Select UART mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3347 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3348
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3349 WRITE_UART_REGISTER (uart, MDR1, ((baudrate==FD_BAUD_AUTO)?
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3350 UART_MODE_AUTOBAUDING:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3351 UART_MODE) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3352 IR_SLEEP_DISABLED |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3353 SIR_TX_WITHOUT_ACREG2 |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3354 FRAME_LENGTH_METHOD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3355
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3356 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3357 * Read the state of RTS (RTS on RS232, CTS on chipset).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3358 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3359
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3360 status = READ_UART_REGISTER (uart, MSR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3361
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3362 if (status & MCTS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3363 uart->rts_level = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3364 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3365 uart->rts_level = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3366
|
80
|
3367 #if UARTFAX_CLASSIC_DTR_DCD
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3368 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3369 * Read the state of DTR and select the edge.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3370 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3371
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3372 uart->dtr_level = AI_ReadBit (ARMIO_DTR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3373
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3374 if (uart->dtr_level)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3375 AI_SelectIOForIT (ARMIO_DTR, ARMIO_FALLING_EDGE);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3376 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3377 AI_SelectIOForIT (ARMIO_DTR, ARMIO_RISING_EDGE);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3378
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3379 AI_UnmaskIT (ARMIO_MASKIT_GPIO);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3380 #elif (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3381 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3382 * Read the state of DTR - No need to reload MSR register since its value
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3383 * is still stored in the "status" local variable.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3384 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3385
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3386 if (status & MDSR)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3387 uart->dtr_level = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3388 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3389 uart->dtr_level = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3390 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3391
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3392 #if ((CHIPSET == 5) || (CHIPSET == 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3393 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3394 * Unmask RX and TX interrupts and the modem status interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3395 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3396
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3397 WRITE_UART_REGISTER (uart, IER, ERBI | ETBEI | EDSSI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3398 #elif (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3399 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3400 * Unmask RX and TX interrupts and the modem status interrupt...
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3401 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3402
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3403 WRITE_UART_REGISTER (uart, IER, ERBI | ETBEI | EDSSI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3404
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3405 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3406 * ... Then, unmask DSR interrupt...
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3407 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3408
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3409 ENABLE_DSR_INTERRUPT (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3410
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3411 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3412 * ... And finally allow sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3413 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3414
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3415 /* BELOW LINES WERE COMMENTED TO DISABLE SLEEP MODE IN DRIVER */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3416 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3417 WRITE_UART_REGISTER (uart, IER, READ_UART_REGISTER (uart, IER) | IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3418 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3419 #else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3420 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3421 * Unmask RX and TX interrupts and the modem status interrupt
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3422 * and allow sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3423 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3424 /* BELOW LINES WERE COMMENTED TO DISABLE SLEEP MODE IN DRIVER */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3425
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3426 /* WRITE_UART_REGISTER (uart, IER, ERBI | ETBEI | EDSSI | IER_SLEEP);*/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3427
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3428 WRITE_UART_REGISTER (uart, IER, ERBI | ETBEI | EDSSI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3429 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3430
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3431
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3432 return (FD_OK);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3433 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3434
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3435 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3436 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3437 * UAF_SetBuffer
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3438 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3439 * Purpose : Sets up the size of the circular buffers to be used in the UART
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3440 * driver. This function may be called only if the UART is disabled
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3441 * with UAF_Enable.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3442 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3443 * Arguments: In : uartNo : Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3444 * bufSize : Specifies the size of the circular buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3445 * rxThreshold: Amount of received bytes that leads to a call
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3446 * to suspended read-out function which is passed
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3447 * to the function UAF_ReadData.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3448 * txThreshold: Amount of bytes in the TX buffer to call the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3449 * suspended write-in function which is passed to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3450 * the function UAF_WriteData
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3451 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3452 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3453 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3454 * FD_NOT_SUPPORTED: bufSize exceeds the maximal possible
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3455 * capabilities of the driver or the threshold
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3456 * values don't correspond to the bufSize or
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3457 * wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3458 * FD_INTERNAL_ERR : Internal problem with the hardware or the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3459 * function has been called while the UART is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3460 * enabled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3461 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3462 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3463
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3464 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3465 UAF_SetBuffer (T_fd_UartId uartNo,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3466 SYS_UWORD16 bufSize,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3467 SYS_UWORD16 rxThreshold,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3468 SYS_UWORD16 txThreshold)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3469 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3470 T_FDRET result;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3471 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3472
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3473 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3474 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3475 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3476 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3477 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3478 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3479 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3480 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3481
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3482 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3483 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3484
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3485 if ((bufSize > FD_MAX_BUFFER_SIZE) ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3486 (rxThreshold > FD_MAX_BUFFER_SIZE) ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3487 (txThreshold > FD_MAX_BUFFER_SIZE))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3488
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3489 result = FD_NOT_SUPPORTED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3490
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3491 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3492
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3493 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3494
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3495 if (!DRIVER_DISABLED (uart))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3496 result = FD_INTERNAL_ERR;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3497
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3498 else if (RX_HIGH_WATERMARK (bufSize) < RX_LOW_WATERMARK (bufSize))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3499 result = FD_NOT_SUPPORTED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3500
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3501 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3502
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3503 uart->buffer_size = bufSize;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3504 uart->rx_threshold_level = rxThreshold;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3505 uart->tx_threshold_level = txThreshold;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3506
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3507 result = FD_OK;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3508 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3509 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3510
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3511 return (result);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3512 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3513
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3514 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3515 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3516 * UAF_SetFlowCtrl
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3517 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3518 * Purpose : Changes the flow control mode of the UART driver.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3519 * If a flow control is activated, DTR is activated or XOFF is sent
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3520 * if the RX buffer is not able to store the received characters else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3521 * DTR is deactivated or XON is sent.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3522 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3523 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3524 * fcMode: flow control mode (none, DTR/DSR, RTS/CTS, XON/XOFF).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3525 * XON : ASCII code of the XON character.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3526 * XOFF : ASCII code of the XOFF character.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3527 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3528 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3529 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3530 * FD_NOT_SUPPORTED: The flow control mode is not supported or wrong
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3531 * UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3532 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3533 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3534 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3535
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3536 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3537 UAF_SetFlowCtrl (T_fd_UartId uartNo,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3538 T_flowCtrlMode fcMode,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3539 SYS_UWORD8 XON,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3540 SYS_UWORD8 XOFF)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3541 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3542 T_FDRET result;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3543 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3544
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3545 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3546 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3547 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3548 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3549 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3550 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3551 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3552 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3553
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3554 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3555 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3556
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3557 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3558 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3559 * The DTR/DSR protocol is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3560 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3561
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3562 if (fcMode == fc_dtr)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3563 result = FD_NOT_SUPPORTED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3564
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3565 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3566
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3567 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3568
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3569 uart->tx_stopped_by_driver = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3570
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3571
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3572 uart->xon_character = XON;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3573 uart->xoff_character = XOFF;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3574 uart->flow_control_mode = fcMode;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3575
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3576 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3577 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3578 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3579 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3580
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3581 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3582 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3583 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3584
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3585 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3586 uart, MCR, READ_UART_REGISTER (uart, MCR) | MRTS);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3587
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3588 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3589 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3590 * Re-enable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3591 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3592 /* BELOW LINES WERE COMMENTED TO DISABLE SLEEP MODE IN DRIVER */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3593 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3594 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3595 uart, IER, READ_UART_REGISTER (uart, IER) | IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3596 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3597 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3598
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3599 if (fcMode == fc_rts) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3600 #if 1 // Dmitriy: enable hardware assisted CTS
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3601 volatile SYS_UWORD8 oldValue;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3602
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3603 oldValue = READ_UART_REGISTER (uart, LCR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3604
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3605 // LCR value to allow acces to EFR
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3606
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3607 WRITE_UART_REGISTER (uart, LCR, 0xBF);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3608
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3609 // enable hardware assisted CTS
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3610
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3611 SET_BIT (uart, EFR, AUTO_CTS_BIT);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3612
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3613 WRITE_UART_REGISTER (uart, LCR, oldValue);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3614 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3615 if (uart->rts_level)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3616 uart->tx_stopped_by_driver = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3617 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3618
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3619 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3620 * If the high watermark is reached, RTS is activated or XOFF is sent
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3621 * according to the flow control mode. Else, RTS is deactivated or XON
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3622 * is sent.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3623 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3624
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3625 if (fcMode != fc_none) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3626
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3627 if (get_bytes_in_rx_buffer (uart) >= RX_HIGH_WATERMARK (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3628 uart->buffer_size)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3629
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3630 uart->rx_stopped_by_driver = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3631 stop_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3632
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3633 } else if (!DRIVER_DISABLED (uart)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3634
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3635 uart->rx_stopped_by_driver = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3636 start_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3637 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3638
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3639 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3640
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3641 uart->rx_stopped_by_driver = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3642 uart->tx_stopped_by_driver = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3643 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3644
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3645 result = FD_OK;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3646 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3647
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3648 return (result);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3649 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3650
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3651 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3652 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3653 * UAF_SetEscape
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3654 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3655 * Purpose : To return to the command mode at the ACI while a data connection
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3656 * is established, an escape sequence has to be detected.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3657 * To distinguish between user data and the escape sequence a
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3658 * defined guard period is necessary before and after this sequence.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3659 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3660 * Arguments: In: uartNo : Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3661 * escChar : ASCII character which could appear three times
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3662 * as an escape sequence.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3663 * guardPeriod: Denotes the minimal duration of the rest before
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3664 * the first and after the last character of the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3665 * escape sequence, and the maximal receiving
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3666 * duration of the whole escape string. This value
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3667 * is expressed in ms.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3668 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3669 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3670 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3671 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3672 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3673 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3674 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3675
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3676 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3677 UAF_SetEscape (T_fd_UartId uartNo,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3678 SYS_UWORD8 escChar,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3679 SYS_UWORD16 guardPeriod)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3680 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3681 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3682
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3683 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3684 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3685 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3686 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3687 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3688 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3689 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3690 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3691
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3692 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3693 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3694
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3695 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3696 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3697 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3698
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3699 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3700
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3701 uart->esc_seq_modified = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3702 uart->esc_seq_character = escChar;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3703 uart->guard_period = CONVERT_TIME_IN_TDMA ((UNSIGNED) guardPeriod);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3704 uart->esc_seq_modified = 0; /* Set to 0 by the RX interrupt handler. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3705
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3706 return (FD_OK);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3707 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3708
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3709 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3710 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3711 * UAF_InpAvail
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3712 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3713 * Purpose : Returns the number of characters available in the RX buffer of the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3714 * driver. If the driver is disabled the function returns 0.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3715 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3716 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3717 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3718 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3719 * Returns : >= 0 : The returned value is the amount of data in the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3720 * RX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3721 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3722 * FD_NOT_READY : The function is called while the callback of the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3723 * readOutFunc function is activated and still not
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3724 * terminated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3725 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3726 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3727 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3728
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3729 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3730 UAF_InpAvail (T_fd_UartId uartNo)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3731 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3732 T_FDRET result;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3733 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3734 SYS_UWORD16 bytes_read;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3735 SYS_UWORD16 bytes_in_rx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3736
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3737 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3738 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3739 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3740 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3741 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3742 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3743 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3744 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3745
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3746 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3747 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3748
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3749 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3750 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3751 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3752
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3753 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3754
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3755 if (uart->rd_call_setup == rm_notDefined)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3756 result = FD_NOT_READY;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3757
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3758 else if (DRIVER_DISABLED (uart))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3759 result = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3760
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3761 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3762
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3763 bytes_in_rx_buffer = get_bytes_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3764
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3765 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3766 * Update reading pointer of the RX buffer if a callback from LISR
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3767 * has been done.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3768 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3769
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3770 if (uart->rd_call_from_hisr_in_progress) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3771
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3772 bytes_read = uart->rd_size_before_call[0] -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3773 uart->rd_size_after_call[0] +
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3774 uart->rd_size_before_call[1] -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3775 uart->rd_size_after_call[1];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3776
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3777 uart->rx_out += bytes_read;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3778
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3779 if (uart->rx_out >= &(uart->rx_buffer[0]) + uart->buffer_size + 1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3780 uart->rx_out = uart->rx_out - uart->buffer_size - 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3781
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3782 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3783 * Check if the low watermark is reached to enable the receiver.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3784 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3785
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3786 bytes_in_rx_buffer = get_bytes_in_rx_buffer (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3787
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3788 if ((uart->flow_control_mode != fc_none) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3789 (bytes_in_rx_buffer <= RX_LOW_WATERMARK (uart->buffer_size))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3790
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3791 if ((!uart->rx_stopped_by_application) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3792 uart->rx_stopped_by_driver)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3793 start_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3794
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3795 uart->rx_stopped_by_driver = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3796 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3797
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3798 uart->rd_call_from_hisr_in_progress = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3799 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3800
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3801 result = (T_FDRET) bytes_in_rx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3802 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3803
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3804 return (result);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3805 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3806
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3807 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3808 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3809 * UAF_OutpAvail
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3810 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3811 * Purpose : Returns the number of free characters in TX buffer of the driver.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3812 * If the driver is disabled the function returns 0.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3813 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3814 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3815 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3816 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3817 * Returns : >= 0 : The returned value is the amount of data in the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3818 * TX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3819 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3820 * FD_NOT_READY : The function is called while the callback of the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3821 * writeInFunc function is activated and still not
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3822 * terminated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3823 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3824 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3825 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3826
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3827 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3828 UAF_OutpAvail (T_fd_UartId uartNo)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3829 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3830 T_FDRET result;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3831 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3832 SYS_UWORD16 bytes_written;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3833
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3834 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3835 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3836 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3837 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3838 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3839 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3840 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3841 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3842
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3843 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3844 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3845
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3846 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3847 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3848 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3849
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3850 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3851
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3852 if (uart->wr_call_setup == rm_notDefined)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3853 result = FD_NOT_READY;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3854
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3855 else if (DRIVER_DISABLED (uart))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3856 result = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3857
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3858 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3859
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3860 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3861 * Update reading pointer of the TX buffer if a callback from LISR
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3862 * has been done.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3863 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3864
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3865 if (uart->wr_call_from_hisr_in_progress) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3866
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3867 bytes_written = uart->wr_size_before_call[0] -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3868 uart->wr_size_after_call[0] +
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3869 uart->wr_size_before_call[1] -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3870 uart->wr_size_after_call[1];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3871
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3872 uart->tx_in += bytes_written;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3873
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3874 if (uart->tx_in >= &(uart->tx_buffer[0]) + uart->buffer_size + 1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3875 uart->tx_in = uart->tx_in - uart->buffer_size - 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3876
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3877 uart->wr_call_from_hisr_in_progress = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3878
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3879 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3880 * if the TX FIFO is empty, unmask TX empty interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3881 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3882
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3883 if (!uart->tx_stopped_by_driver &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3884 (READ_UART_REGISTER (uart, LSR) & THRE))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3885 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3886 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3887 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3888 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3889 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3890
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3891 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3892 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3893 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3894
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3895 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3896 * Unmask Tx interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3897 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3898
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3899 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3900 uart, IER, READ_UART_REGISTER (uart, IER) | ETBEI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3901 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3902 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3903
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3904 result = (T_FDRET) (uart->buffer_size - get_bytes_in_tx_buffer (uart));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3905 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3906
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3907 return (result);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3908 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3909
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3910 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3911 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3912 * UAF_EnterSleep
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3913 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3914 * Purpose : Checks if UART is ready to enter Deep Sleep. If ready, enables
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3915 * wake-up interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3916 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3917 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3918 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3919 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3920 * Returns : 0 : Deep Sleep is not possible.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3921 * >= 1 : Deep Sleep is possible.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3922 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3923 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3924 * Warning: Parameters are not verified.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3925 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3926 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3927
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3928 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3929 UAF_EnterSleep (T_fd_UartId uartNo)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3930 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3931 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3932 SYS_BOOL deep_sleep;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3933 volatile SYS_UWORD8 status;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3934
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3935 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3936 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3937 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3938 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3939 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3940 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3941 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3942 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3943
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3944 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3945 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3946
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3947 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3948 deep_sleep = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3949
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3950 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3951 * Check if RX & TX FIFOs are both empty
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3952 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3953
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3954 status = READ_UART_REGISTER (uart, LSR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3955
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3956 if (!(status & DR) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3957 (status & TEMT)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3958
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3959 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3960 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3961 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3962 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3963
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3964 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3965 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3966 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3967
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3968 #if (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3969 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3970 * Mask DSR interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3971 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3972
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3973 DISABLE_DSR_INTERRUPT (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3974 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3975
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3976 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3977 * Mask RX, TX and the modem status interrupts.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3978 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3979
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3980 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3981 uart, IER, READ_UART_REGISTER (uart, IER) &
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3982 ~(ERBI | ETBEI | EDSSI));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3983
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3984 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3985 * Enable the wake-up interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3986 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3987
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3988 ENABLE_WAKEUP_INTERRUPT (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3989
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3990 deep_sleep = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3991 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3992
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3993 return (deep_sleep);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3994 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3995
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3996 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3997 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3998 * UAF_WakeUp
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
3999 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4000 * Purpose : Wakes up UART after Deep Sleep.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4001 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4002 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4003 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4004 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4005 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4006 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4007 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4008 * Warning: Parameters are not verified.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4009 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4010 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4011
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4012 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4013 UAF_WakeUp (T_fd_UartId uartNo)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4014 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4015 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4016
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4017 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4018 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4019 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4020 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4021 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4022 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4023 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4024 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4025
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4026 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4027 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4028
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4029 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4030
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4031 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4032 * Disable the wake-up interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4033 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4034
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4035 DISABLE_WAKEUP_INTERRUPT (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4036
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4037 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4038 * Unmask RX and modem status interrupts.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4039 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4040
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4041 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4042 uart, IER, READ_UART_REGISTER (uart, IER) | (ERBI | EDSSI));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4043
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4044 #if (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4045 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4046 * Unmask DSR interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4047 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4048
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4049 ENABLE_DSR_INTERRUPT (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4050 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4051
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4052 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4053 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4054 * Allow sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4055 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4056 /* BELOW LINES WERE COMMENTED TO DISABLE SLEEP MODE IN DRIVER */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4057 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4058 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4059 uart, IER, READ_UART_REGISTER (uart, IER) | IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4060 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4061 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4062
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4063 return (FD_OK);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4064 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4065
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4066 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4067 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4068 * UAF_ReadData
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4069 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4070 * Purpose : To read the received characters out of the RX buffer the address
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4071 * of a function is passed. If characters are available, the driver
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4072 * calls this function and pass the address and the amount of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4073 * readable characters. Because the RX buffer is circular, the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4074 * callback function may be called with more than one address of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4075 * buffer fragment.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4076 * The readOutFunc function modifies the contents of the size array
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4077 * to return the driver the number of processed characters. Each
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4078 * array entry is decremented by the number of bytes read in the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4079 * fragment.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4080 * If the UAF_ReadData is called while the RX buffer is empty, it
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4081 * depends on the suspend parameter to suspend the call-back or to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4082 * leave without any operation. In the case of suspension, the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4083 * return value of UAF_ReadData is UAF_SUSPENDED. A delayed call-back
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4084 * will be performed if:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4085 * - the RX buffer reachs the adjusted threshold (rxThreshold of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4086 * UAF_SetBuffer),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4087 * - the state of a V.24 input line has changed,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4088 * - a break is detected,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4089 * - an escape sequence is detected.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4090 * If no suspension is necessary the function returns the number of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4091 * processed bytes.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4092 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4093 * Arguments: In : uartNo : Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4094 * suspend : mode of suspension in case of RX buffer empty.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4095 * readOutFunc: Callback function.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4096 * cldFromIrq: The driver sets this parameter to 1
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4097 * if the callback function is called
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4098 * from an interrupt service routine.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4099 * reInstall : The call-back function sets this
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4100 * parameter to rm_reInstall if the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4101 * driver must call again the callback
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4102 * function when the RX threshold level
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4103 * is reached. Else it will be set to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4104 * rm_noInstall. Before to call the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4105 * readOutFunc function this parameter
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4106 * is set to rm_notDefined.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4107 * nsource : Informed the callback function about
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4108 * the number of fragments which are
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4109 * ready to copy from the circular RX
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4110 * buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4111 * source : Array which contains the addresses
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4112 * of the fragments.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4113 * size : Array which contains the sizes of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4114 * each fragments.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4115 * state : The state parameter is the status
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4116 * of the V.24 lines and the break /
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4117 * escape detection. The state
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4118 * parameter is described in the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4119 * specification of UAF_GetLineState.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4120 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4121 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4122 * Returns : >= 0 : Succesful operation. Amount of processed bytes.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4123 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4124 * FD_SUSPENDED : The callback is suspended until the buffer or
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4125 * state condition changed.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4126 * FD_NOT_READY : The function is called while the callback is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4127 * activated and still not terminated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4128 * FD_INTERNAL_ERR : Internal problems with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4129 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4130 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4131
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4132 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4133 UAF_ReadData (T_fd_UartId uartNo,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4134 T_suspendMode suspend,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4135 void (readOutFunc (SYS_BOOL cldFromIrq,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4136 T_reInstMode *reInstall,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4137 SYS_UWORD8 nsource,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4138 SYS_UWORD8 *source[],
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4139 SYS_UWORD16 size[],
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4140 SYS_UWORD32 state)))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4141 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4142 T_FDRET result;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4143 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4144 SYS_UWORD16 bytes_read;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4145 SYS_UWORD16 bytes_in_rx_buffer;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4146
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4147 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4148 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4149 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4150 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4151 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4152 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4153 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4154 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4155
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4156 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4157 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4158
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4159 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4160 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4161 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4162
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4163 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4164
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4165 if (uart->rd_call_setup == rm_notDefined)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4166 result = FD_NOT_READY;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4167
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4168 else if (get_bytes_in_rx_buffer (uart) || uart->esc_seq_received) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4169
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4170 uart->readOutFunc = readOutFunc;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4171 update_reading_callback (uart, 0); /* 0: call from application. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4172
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4173 bytes_read = uart->rd_size_before_call[0] -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4174 uart->rd_size_after_call[0] +
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4175 uart->rd_size_before_call[1] -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4176 uart->rd_size_after_call[1];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4177
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4178 uart->rx_out += bytes_read;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4179
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4180 if (uart->rx_out >= &(uart->rx_buffer[0]) + uart->buffer_size + 1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4181 uart->rx_out = uart->rx_out - uart->buffer_size - 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4182
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4183 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4184 * Check if the low watermark is reached to enable the receiver.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4185 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4186
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4187 if ((uart->flow_control_mode != fc_none) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4188 (get_bytes_in_rx_buffer (uart) <= RX_LOW_WATERMARK (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4189 uart->buffer_size))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4190
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4191 if ((!uart->rx_stopped_by_application) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4192 uart->rx_stopped_by_driver && (!uart->rx_stopped_by_lisr))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4193 start_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4194
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4195 uart->rx_stopped_by_driver = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4196 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4197
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4198 uart->esc_seq_received = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4199 result = (T_FDRET) bytes_read;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4200
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4201 } else if (suspend == sm_suspend) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4202
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4203 uart->readOutFunc = readOutFunc;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4204 uart->reading_suspended = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4205 result = FD_SUSPENDED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4206
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4207 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4208
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4209 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4210 * The previous callback function is deinstalled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4211 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4212
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4213 uart->rd_call_setup = rm_noInstall;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4214 uart->reading_suspended = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4215 result = 0; /* 0 byte read. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4216 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4217
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4218 return (result);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4219 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4220
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4221 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4222 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4223 * UAF_WriteData
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4224 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4225 * Purpose : To write characters into the TX buffer the address of a function
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4226 * is passed. If free space is available in the buffer, the driver
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4227 * calls this function and passes the destination address and the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4228 * amount of space. Because the TX buffer is circular, the callback
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4229 * function may be called with more than one address of buffer
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4230 * fragment.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4231 * The writeInFunc function modifies the contents of the size array
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4232 * to return the driver the number of processed bytes. Each array
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4233 * entry is decremented by the number of bytes written in this
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4234 * fragment.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4235 * If the UAF_WriteData function is called while the TX buffer is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4236 * full, it depends on the suspend parameter to suspend the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4237 * call-back or to leave this function without any operation. In the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4238 * case of suspension the returned value of the UAF_WriteData is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4239 * UAF_SUSPENDED. A delayed call-back will be performed if the TX
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4240 * buffer reaches the adjusted threshold (txThreshold of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4241 * UAF_SetBuffer). If no suspension is necessary the function returns
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4242 * the number of processed bytes.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4243 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4244 * Arguments: In : uartNo : Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4245 * suspend : mode of suspension in case of TX buffer empty.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4246 * writeInFunc: Callback function.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4247 * cldFromIrq: The driver sets this parameter to 1
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4248 * if the call-back function is called
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4249 * from an interrupt service routine.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4250 * reInstall : The callback function sets this
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4251 * parameter to rm_reInstall if the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4252 * driver must call again the callback
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4253 * function when the TX threshold level
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4254 * is reached. Else it will be set to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4255 * rm_noInstall. Before to call the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4256 * writeInFunc function this parameter
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4257 * is set to rm_notDefined.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4258 * ndest : Informed the callback function about
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4259 * the number of fragments which are
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4260 * available in the TX buffer.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4261 * dest : Array which contains the addresses
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4262 * of the fragments.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4263 * size : Array which contains the sizes of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4264 * each fragments.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4265 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4266 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4267 * Returns : >= 0 : Succesful operation. Amount of processed bytes.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4268 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4269 * FD_SUSPENDED : The callback is suspended until the buffer
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4270 * condition changed.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4271 * FD_NOT_READY : The function is called while the callback is
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4272 * activated and still not terminated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4273 * FD_INTERNAL_ERR : Internal problems with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4274 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4275 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4276
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4277 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4278 UAF_WriteData (T_fd_UartId uartNo,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4279 T_suspendMode suspend,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4280 void (writeInFunc (SYS_BOOL cldFromIrq,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4281 T_reInstMode *reInstall,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4282 SYS_UWORD8 ndest,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4283 SYS_UWORD8 *dest[],
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4284 SYS_UWORD16 size[])))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4285 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4286 T_FDRET result;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4287 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4288 SYS_UWORD16 bytes_written;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4289
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4290 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4291 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4292 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4293 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4294 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4295 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4296 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4297 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4298
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4299 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4300 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4301
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4302 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4303 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4304 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4305
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4306 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4307
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4308 if (uart->wr_call_setup == rm_notDefined)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4309 result = FD_NOT_READY;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4310
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4311 else if ((!DRIVER_DISABLED (uart)) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4312 (get_bytes_in_tx_buffer (uart) < uart->buffer_size)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4313
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4314 uart->writeInFunc = writeInFunc;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4315 update_writing_callback (uart, 0); /* 0: call from application. */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4316
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4317 bytes_written = uart->wr_size_before_call[0] -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4318 uart->wr_size_after_call[0] +
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4319 uart->wr_size_before_call[1] -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4320 uart->wr_size_after_call[1];
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4321
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4322 uart->tx_in += bytes_written;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4323
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4324 if (uart->tx_in >= &(uart->tx_buffer[0]) + uart->buffer_size + 1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4325 uart->tx_in = uart->tx_in - uart->buffer_size - 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4326
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4327 /* If we have been stopped due to high RTS, we have to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4328 * wake up application processor by IRQ via IO1 -HW */
|
80
|
4329 #ifdef CONFIG_TARGET_GTAMODEM
|
|
4330 if (uart->tx_stopped_by_driver)
|
|
4331 AI_SetBit(1);
|
|
4332 #endif
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4333
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4334 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4335 * If:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4336 * - there is no break to send,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4337 * - the flow control is not activated,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4338 * unmask the TX empty interrupt to be able to send characters.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4339 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4340 if (!uart->break_to_send &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4341 !uart->tx_stopped_by_driver)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4342 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4343 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4344 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4345 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4346 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4347
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4348 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4349 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4350 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4351
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4352 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4353 * Unmask Tx interrupt.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4354 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4355
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4356 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4357 uart, IER, READ_UART_REGISTER (uart, IER) | ETBEI);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4358 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4359
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4360 result = (T_FDRET) bytes_written;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4361
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4362 } else if (suspend == sm_suspend) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4363
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4364 uart->writeInFunc = writeInFunc;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4365 uart->writing_suspended = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4366 result = FD_SUSPENDED;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4367
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4368 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4369
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4370 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4371 * The previous callback function is deinstalled.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4372 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4373
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4374 uart->wr_call_setup = rm_noInstall;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4375 uart->writing_suspended = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4376 result = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4377 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4378
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4379 return (result);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4380 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4381
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4382 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4383 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4384 * UAF_StopRec
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4385 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4386 * Purpose : If a flow control mode is set, this function tells the terminal
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4387 * equipment that no more data can be received.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4388 * XON/XOFF: XOFF is sent.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4389 * DTR/DSR : DTR is desactivated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4390 * RTS/CTS : RTS is deactivated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4391 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4392 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4393 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4394 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4395 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4396 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4397 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4398 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4399 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4400
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4401 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4402 UAF_StopRec (T_fd_UartId uartNo)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4403 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4404 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4405
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4406 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4407 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4408 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4409 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4410 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4411 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4412 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4413 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4414
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4415 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4416 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4417
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4418 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4419 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4420 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4421
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4422 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4423
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4424 if (uart->flow_control_mode != fc_none)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4425 stop_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4426
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4427 uart->rx_stopped_by_application = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4428
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4429 return (FD_OK);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4430 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4431
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4432 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4433 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4434 * UAF_StartRec
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4435 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4436 * Purpose : If a flow control mode is set, this function tells the terminal
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4437 * equipment that the receiver is again able to receive more data.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4438 * If the buffer has already reached the high water mark the driver
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4439 * sends the signal only if the buffer drains to a low water mark.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4440 * XON/XOFF: XON is sent.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4441 * DTR/DSR : DTR is activated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4442 * RTS/CTS : RTS is activated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4443 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4444 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4445 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4446 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4447 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4448 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4449 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4450 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4451 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4452
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4453 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4454 UAF_StartRec (T_fd_UartId uartNo)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4455 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4456 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4457
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4458 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4459 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4460 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4461 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4462 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4463 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4464 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4465 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4466
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4467 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4468 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4469
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4470 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4471 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4472 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4473
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4474 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4475
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4476 if ((uart->flow_control_mode != fc_none) && (!uart->rx_stopped_by_driver))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4477 start_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4478
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4479 uart->rx_stopped_by_application = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4480
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4481 return (FD_OK);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4482 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4483
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4484 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4485 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4486 * UAF_GetLineState
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4487 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4488 * Purpose : Returns the state of the V.24 lines, the flow control state and
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4489 * the result of the break/escape detection process as a bit field.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4490 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4491 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4492 * Out: state : State of the V.24 lines, the flow control state and
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4493 * the result of the break/escape sequence detection
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4494 * process as a bit field.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4495 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4496 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4497 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4498 * FD_NOT_READY : The function is called while the callback of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4499 * the readOutFunc function is activated and still
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4500 * not terminated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4501 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4502 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4503 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4504
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4505 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4506 UAF_GetLineState (T_fd_UartId uartNo,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4507 SYS_UWORD32 *state)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4508 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4509 T_FDRET result;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4510 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4511
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4512 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4513 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4514 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4515 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4516 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4517 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4518 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4519 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4520
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4521 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4522 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4523
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4524 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4525 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4526 * Signals not supported are reported as 0.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4527 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4528
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4529 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4530
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4531 if (uart->rd_call_setup == rm_notDefined)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4532 result = FD_NOT_READY;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4533
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4534 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4535
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4536 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4537 * The field state_2 is used when state_1 is set to 0 to avoid to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4538 * lose events detected in the RX interrupt handler.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4539 * Fields BRK and BRKLEN are set when a break is detected.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4540 * The field ESC is set when an escape sequence is detected.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4541 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4542
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4543 *state = uart->state_2;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4544 uart->state_2 = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4545 uart->state = &(uart->state_2);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4546
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4547 *state |= uart->state_1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4548 uart->state_1 = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4549 uart->state = &(uart->state_1);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4550
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4551 *state |= ((((SYS_UWORD32) uart->rts_level) << RTS) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4552
|
80
|
4553 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4554 (((SYS_UWORD32) uart->dtr_level) << DTR) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4555 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4556
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4557 (((SYS_UWORD32) (uart->tx_stopped_by_application |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4558 uart->tx_stopped_by_driver)) << TXSTP) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4559
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4560 (((SYS_UWORD32) (uart->rx_stopped_by_application |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4561 uart->rx_stopped_by_driver)) << RXSTP) |
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4562
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4563 (((SYS_UWORD32) (uart->buffer_size -
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4564 get_bytes_in_rx_buffer (uart))) << RXBLEV));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4565
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4566 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4567 * Fields SA, SB and X are set according to the flow control:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4568 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4569 * None RTS/CTS XON/XOFF
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4570 * SA DTR DTR DTR
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4571 * SB RTS 0 RTS
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4572 * X 0 RTS XON:0 XOFF:1 (transmitter)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4573 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4574 * DTR is supported on C, D & E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4575 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4576
|
80
|
4577 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4578 *state |= (((SYS_UWORD32) uart->dtr_level) << SA);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4579 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4580
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4581 if (uart->flow_control_mode != fc_rts)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4582 *state |= (((SYS_UWORD32) uart->rts_level) << SB);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4583
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4584 if (uart->flow_control_mode == fc_rts)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4585 *state |= (((SYS_UWORD32) uart->rts_level) << X);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4586
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4587 else if ((uart->flow_control_mode == fc_xoff) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4588 (uart->tx_stopped_by_application ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4589 uart->tx_stopped_by_driver))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4590 *state |= (1 << X);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4591
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4592 result = FD_OK;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4593 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4594
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4595 return (result);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4596 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4597
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4598 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4599 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4600 * UAF_SetLineState
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4601 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4602 * Purpose : Sets the states of the V.24 status lines according to the bit
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4603 * field of the parameter state.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4604 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4605 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4606 * state : Bit field. Only the signals which are marked with
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4607 * the 'set' access can be used to change the state of
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4608 * the signal.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4609 * mask : Bit field with the same structure as state. Each bit
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4610 * in state corresponds to a bit in mask. Settabled
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4611 * bits marked by a 1 are manipulated by the driver.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4612 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4613 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4614 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4615 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4616 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4617 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4618 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4619
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4620 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4621 UAF_SetLineState (T_fd_UartId uartNo,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4622 SYS_UWORD32 state,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4623 SYS_UWORD32 mask)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4624 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4625 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4626 UNSIGNED break_length;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4627
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4628 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4629 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4630 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4631 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4632 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4633 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4634 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4635 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4636
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4637 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4638 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4639
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4640 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4641
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4642 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4643 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4644 * DCD is supported on C, D & E-Sample. The SA field is not supported because
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4645 * DSR is not supported on all platforms.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4646 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4647
|
80
|
4648 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4649 if (mask & (1 << SA))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4650 #else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4651 if ((mask & (1 << SA)) || (mask & (1 << DCD)))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4652 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4653 return (FD_NOT_SUPPORTED); /* Return used to simplify the code */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4654
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4655 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4656 * Check if a break has to be sent.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4657 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4658
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4659 uart->break_length = (UNSIGNED) ((state >> BRKLEN) & 0xFF);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4660
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4661 if (state & (1 << BRK) && (mask & (1 << BRK))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4662
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4663 if (uart->break_length > FIFO_SIZE)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4664 return (FD_NOT_SUPPORTED); /* Return used to simplify the code */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4665
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4666 else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4667
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4668 uart->time_without_character =
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4669 compute_break_time (uart->baudrate, uart->bits_per_char, 3);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4670
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4671 uart->break_to_send = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4672
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4673 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4674 * If the TX FIFO is empty the break is send from this function
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4675 * else the interrupt handler will send the break.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4676 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4677
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4678 if (READ_UART_REGISTER (uart, LSR) & TEMT)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4679 send_break(uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4680 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4681 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4682
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4683 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4684 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4685 * Disable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4686 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4687
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4688 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4689 uart, IER, READ_UART_REGISTER (uart, IER) & ~IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4690 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4691
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4692 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4693 * The CTS field is ignored if the X bit in the mask is set. In this case
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4694 * the X bit controls CTS.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4695 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4696
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4697 if (mask & (1 << CTS)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4698
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4699 if (uart->flow_control_mode != fc_rts) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4700
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4701 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4702 * As the RTS/CTS flow control is not selected, the X bit does not
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4703 * control CTS. CTS needs only to be activated or deactivated
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4704 * according to the value of the CTS field.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4705 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4706
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4707 if (state & (1 << CTS))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4708 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4709 uart, MCR, READ_UART_REGISTER (uart, MCR) | MRTS);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4710
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4711 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4712 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4713 uart, MCR, READ_UART_REGISTER (uart, MCR) & ~MRTS);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4714
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4715 } else if (!(mask & (1 << X))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4716
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4717 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4718 * The RTS/CTS flow control is selected but the X bit in the mask
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4719 * is null. Then the CTS bit controls CTS and the receiver must be
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4720 * stopped or started according to the state of the CTS bit.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4721 * The receiver is started only if it was not stopped by the driver
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4722 * and if it was stopped by the application.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4723 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4724
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4725 if (state & (1 << CTS)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4726
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4727 if (!uart->rx_stopped_by_application) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4728
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4729 if (!uart->rx_stopped_by_driver)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4730 stop_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4731
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4732 uart->rx_stopped_by_application = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4733 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4734
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4735 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4736
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4737 if ((!uart->rx_stopped_by_driver) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4738 uart->rx_stopped_by_application)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4739 start_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4740
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4741 uart->rx_stopped_by_application = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4742 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4743 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4744 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4745
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4746 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4747 * The DCD field is ignored if the SB bit of the mask is set.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4748 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4749
|
80
|
4750 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4751
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4752 if (!(mask & (1 << SB)) && (mask & (1 << DCD))) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4753
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4754 if (state & (1 << DCD)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4755 /* Turn on DCD */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4756 #if (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4757 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) | MDCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4758 #else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4759 AI_ResetBit (ARMIO_DCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4760 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4761 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4762 /* Turn off DCD */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4763 #if (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4764 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) & ~MDCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4765 #else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4766 AI_SetBit (ARMIO_DCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4767 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4768 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4769 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4770
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4771 #endif /* BOARD 8 or 9 or 40 or 41 or CHIPSET 12 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4772
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4773 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4774 * Signals are set according to fields SA, SB and X states and flow
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4775 * control:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4776 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4777 * None RTS/CTS XON/XOFF
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4778 * SA 0 (ns) 0 (ns) 0 (ns)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4779 * SB DCD DCD DCD
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4780 * X ignore CTS XON:0 XOFF:1 (receiver)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4781 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4782 * ns: signal not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4783 * DCD is supported on C, D & E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4784 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4785
|
80
|
4786 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4787
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4788 if (mask & (1 << SB)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4789
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4790 if (state & (1 << SB)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4791 /* Turn on DCD */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4792 #if (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4793 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) | MDCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4794 #else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4795 AI_ResetBit (ARMIO_DCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4796 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4797 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4798 /* Turn off DCD */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4799 #if (CHIPSET == 12)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4800 WRITE_UART_REGISTER (uart, MCR, READ_UART_REGISTER(uart, MCR) & ~MDCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4801 #else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4802 AI_SetBit (ARMIO_DCD);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4803 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4804 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4805 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4806
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4807 #endif /* BOARD 8 or 9 or 40 or 41 or CHIPSET 12 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4808
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4809 if ((mask & (1 << X)) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4810 (uart->flow_control_mode != fc_none)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4811
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4812 if (state & (1 << X)) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4813
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4814 if (!uart->rx_stopped_by_application) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4815
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4816 if (!uart->rx_stopped_by_driver)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4817 stop_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4818
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4819 uart->rx_stopped_by_application = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4820 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4821
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4822 } else {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4823
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4824 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4825 * The receiver is started only if it is not stopped by the driver
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4826 * and if it is stopped by the application.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4827 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4828
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4829 if ((!uart->rx_stopped_by_driver) &&
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4830 uart->rx_stopped_by_application)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4831 start_receiver (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4832
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4833 uart->rx_stopped_by_application = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4834 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4835 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4836
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4837 #if ((CHIPSET != 5) && (CHIPSET != 6))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4838 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4839 * Re-enable sleep mode.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4840 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4841 /* BELOW LINES WERE COMMENTED TO DISABLE SLEEP MODE IN DRIVER */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4842 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4843 WRITE_UART_REGISTER (
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4844 uart, IER, READ_UART_REGISTER (uart, IER) | IER_SLEEP);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4845 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4846 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4847
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4848 return (FD_OK);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4849 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4850
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4851 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4852 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4853 * UAF_InterruptHandler
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4854 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4855 * Purpose : Interrupt handler.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4856 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4857 * Arguments: In : uart_id : origin of interrupt
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4858 * interrupt_status: source of interrupt
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4859 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4860 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4861 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4862 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4863 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4864
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4865 void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4866 UAF_InterruptHandler (T_fd_UartId uart_id,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4867 SYS_UWORD8 interrupt_status)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4868 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4869
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4870 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4871
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4872 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4873 * uart_id is not used.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4874 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4875
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4876 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4877
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4878 uart->current_time = NU_Retrieve_Clock ();
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4879
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4880 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4881 * Causes of interrupt:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4882 * - trigger level reached,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4883 * - character time-out indication,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4884 * - transmitter holding register empty,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4885 * - modem status.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4886 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4887
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4888 switch (interrupt_status) {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4889
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4890 case RX_DATA:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4891
|
80
|
4892 #if (UARTFAX_CLASSIC_DTR_DCD || (CHIPSET == 12))
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4893 uart->index_it = (uart->index_it + 1) & 0x01; /* 0 or 1 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4894 uart->dtr_change_detected[uart->index_it] = 0;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4895 uart->dtr_level_saved[uart->index_it] = uart->dtr_level;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4896 #endif
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4897 read_rx_fifo (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4898
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4899 // Disable Autobaud and lock baudrate upon first received character
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4900 if (uart->autobauding != 0)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4901 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4902 /* MSMSMSMS */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4903 SYS_UWORD8 uasr;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4904 T_baudrate baudrate;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4905 T_bitsPerCharacter bpc;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4906 T_parity parity;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4907
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4908 WRITE_UART_REGISTER (uart, LCR, READ_UART_REGISTER (uart, LCR) | DLAB);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4909
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4910
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4911 uasr = READ_UART_REGISTER (uart, UASR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4912
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4913 switch (uasr & 0x1F)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4914 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4915 case 0x01: baudrate = FD_BAUD_115200; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4916 case 0x02: baudrate = FD_BAUD_57600; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4917 case 0x03: baudrate = FD_BAUD_38400; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4918 case 0x04: baudrate = FD_BAUD_28800; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4919 case 0x05: baudrate = FD_BAUD_19200; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4920 case 0x06: baudrate = FD_BAUD_14400; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4921 case 0x07: baudrate = FD_BAUD_9600; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4922 case 0x08: baudrate = FD_BAUD_4800; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4923 case 0x09: baudrate = FD_BAUD_2400; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4924 case 0x0A: baudrate = FD_BAUD_1200; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4925 default: /* no baudrate detected, abort for now */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4926 return;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4927 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4928
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4929 switch (uasr>>5 & 0x01)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4930 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4931 case 0x00: bpc = bpc_7; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4932 case 0x01: bpc = bpc_8; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4933 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4934
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4935 switch (uasr>>6 & 0x03)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4936 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4937 case 0x00: parity = pa_none; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4938 case 0x01: parity = pa_space; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4939 case 0x02: parity = pa_even; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4940 case 0x03: parity = pa_odd; break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4941 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4942
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4943 UAF_SetComPar (UAF_UART_1,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4944 baudrate,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4945 bpc,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4946 sb_1,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4947 parity);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4948
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4949 uart->baudrate = baudrate_value[FD_BAUD_AUTO]; /* remember autobauding */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4950 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4951
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4952 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4953
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4954 case TX_EMPTY:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4955
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4956 fill_tx_fifo (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4957 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4958
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4959 case MODEM_STATUS:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4960
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4961 check_v24_input_lines (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4962 break;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4963 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4964 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4965
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4966 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4967 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4968 * UAF_CheckXEmpty
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4969 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4970 * Purpose : Checks the empty condition of the Transmitter.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4971 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4972 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4973 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4974 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4975 * Returns : FD_OK : Empty condition OK.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4976 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4977 * FD_NOT_READY : Empty condition not OK.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4978 * FD_INTERNAL_ERR : Internal problem with the hardware.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4979 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4980 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4981
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4982 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4983 UAF_CheckXEmpty (T_fd_UartId uartNo)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4984 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4985 T_FDRET result;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4986 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4987 SYS_UWORD8 status;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4988
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4989 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4990 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4991 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4992 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4993 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4994 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4995 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4996 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4997
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4998 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
4999 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5000
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5001 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5002 * There is no case where FD_INTERNAL_ERR may be returned.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5003 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5004
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5005 result = FD_OK;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5006
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5007 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5008 status = READ_UART_REGISTER (uart, LSR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5009
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5010 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5011 * Checks if:
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5012 * - the TX SW Buffer is empty,
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5013 * - the TX HW FIFO is empty (THRE),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5014 * - the Transmitter Shift Register is empty (TEMT).
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5015 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5016
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5017 if (!(TX_BUFFER_EMPTY (uart)) ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5018 !(status & THRE) ||
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5019 !(status & TEMT))
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5020
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5021 result = FD_NOT_READY;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5022
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5023 return (result);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5024 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5025
|
80
|
5026 #if UARTFAX_CLASSIC_DTR_DCD
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5027 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5028 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5029 * UAF_DTRInterruptHandler
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5030 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5031 * Purpose : This function is only used on C & D-Sample. On this platform, the
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5032 * DTR signal is controlled with an I/O. A change of state of this
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5033 * signal is detected with an interrupt. This function is called when
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5034 * this interrupt occurs.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5035 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5036 * Arguments: In : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5037 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5038 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5039 * Returns : none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5040 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5041 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5042
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5043 void
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5044 UAF_DTRInterruptHandler (void)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5045 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5046 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5047
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5048 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5049
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5050 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5051 * Read the state of DTR and change the edge to detect the next change
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5052 * of DTR.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5053 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5054
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5055 uart->dtr_level = AI_ReadBit (ARMIO_DTR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5056
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5057 if (uart->dtr_level)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5058 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5059 AI_SelectIOForIT (ARMIO_DTR, ARMIO_FALLING_EDGE);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5060 if (uart->flow_control_mode != fc_dtr && uart->baudrate == baudrate_value[FD_BAUD_AUTO])
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5061 UAF_SetComPar (UAF_UART_1, FD_BAUD_AUTO, bpc_8, sb_1, pa_none);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5062 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5063 else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5064 AI_SelectIOForIT (ARMIO_DTR, ARMIO_RISING_EDGE);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5065
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5066 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5067 * The reading callback function has to be called. But bytes received before
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5068 * the change of state of DTR must be copied into the RX buffer before to
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5069 * call it.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5070 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5071
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5072 if (READ_UART_REGISTER (uart, LSR) & DR) { /* If Rx FIFO is not empty */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5073
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5074 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5075 * The Rx FIFO will be read to fill one of the two buffers and the Rx
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5076 * HISR will be activated.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5077 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5078
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5079 uart->index_it = (uart->index_it + 1) & 0x01; /* 0 or 1 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5080 uart->dtr_change_detected[uart->index_it] = 1;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5081 uart->dtr_level_saved[uart->index_it] = uart->dtr_level;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5082 read_rx_fifo (uart);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5083
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5084 } else
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5085 (void) NU_Activate_HISR (&(uart->v24_hisr_ctrl_block));
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5086
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5087 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5088 #endif /* BOARD 8 or 9 or 40 or 41 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5089
|
308
3f7095c785b7
uartfax.c change needed for SERIAL_DYNAMIC_SWITCH=1 to compile
Mychaela Falconia <falcon@freecalypso.org>
diff
changeset
|
5090 #ifdef SERIAL_DYNAMIC_SWITCH
|
0
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5091 /*******************************************************************************
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5092 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5093 * UAF_Exit
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5094 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5095 * Purpose :
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5096 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5097 * Arguments: In : uartNo: Used UART.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5098 * Out: none
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5099 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5100 * Returns : FD_OK : Successful operation.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5101 * FD_NOT_SUPPORTED: Wrong UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5102 * FD_INTERNAL_ERR : Internal problem.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5103 *
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5104 ******************************************************************************/
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5105
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5106 T_FDRET
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5107 UAF_Exit (T_fd_UartId uartNo)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5108 {
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5109 t_uart *uart;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5110
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5111 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5112 * Check UART number.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5113 * A return is used to simplify the code.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5114 * UART IrDA (UAF_UART_0) can't be used for F&D on Ulysse because hardware
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5115 * flow control is not supported.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5116 * DCD and DTR are not supported on UART Irda on C & D-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5117 * DCD and DTR are not supported on UART Irda & Modem2 on E-Sample.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5118 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5119
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5120 if (uartNo != UAF_UART_1)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5121 return (FD_NOT_SUPPORTED);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5122
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5123 uart = &uart_parameters;
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5124
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5125 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5126 * Delete the 3 HISR actived in the RX/TX and V24 interrupt handlers.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5127 * A return is used to simplify the code if an error occurs.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5128 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5129
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5130 if (NU_Delete_HISR (&(uart->rx_hisr_ctrl_block)) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5131 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5132
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5133 if (NU_Delete_HISR (&(uart->tx_hisr_ctrl_block)) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5134 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5135
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5136 if (NU_Delete_HISR (&(uart->v24_hisr_ctrl_block)) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5137 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5138
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5139 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5140 * Delete the HISR used to send a break.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5141 * A return is used to simplify the code if an error occurs.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5142 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5143
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5144 if (NU_Delete_HISR (&(uart->break_hisr_ctrl_block)) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5145 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5146
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5147 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5148 * Disable and then delete the timer used in the break HISR
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5149 * A return is used to simplify the code if an error occurs.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5150 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5151
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5152 (void) NU_Control_Timer (&(uart->break_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5153 NU_DISABLE_TIMER);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5154
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5155 if (NU_Delete_Timer (&(uart->break_timer_ctrl_block)) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5156 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5157
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5158 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5159 * Disable and then delete the timer used in the detection of the escape
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5160 * sequence. A return is used to simplify the code if an error occurs.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5161 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5162
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5163 (void) NU_Control_Timer (&(uart->guard_period_timer_ctrl_block),
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5164 NU_DISABLE_TIMER);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5165
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5166 if (NU_Delete_Timer (&(uart->guard_period_timer_ctrl_block)) != NU_SUCCESS)
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5167 return (FD_INTERNAL_ERR);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5168
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5169 /*
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5170 * At that point, all HISRs and Timers have been successfully deleted.
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5171 */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5172
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5173 return (FD_OK);
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5174 }
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5175 #endif /* (defined BTEMOBILE && (CHIPSET != 12)) */
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5176
|
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
5177
|