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annotate src/cs/drivers/drv_core/timer/timer.h @ 285:504c9dcbffb2

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GTA0x target: GPIOs 3, 10, 11 and 12 are unconnected, so drive them as outputs
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 08 Aug 2017 01:28:52 +0000
parents 945cf7f506b2
children
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1 /*******************************************************************************
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2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
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3
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4 Property of Texas Instruments -- For Unrestricted Internal Use Only
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5 Unauthorized reproduction and/or distribution is strictly prohibited. This
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6 product is protected under copyright law and trade secret law as an
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7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
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8 rights reserved.
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11 Filename : timer.h
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13 Description : timer.c header
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14
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15 Project : drivers
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16
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17 Author : pmonteil@tif.ti.com Patrice Monteil.
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19 Version number : 1.3
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20
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21 Date and time : 07/23/98 16:25:53
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22 Previous delta : 07/23/98 16:25:52
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24 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release1.5/mod/emu/EMU_MCMP/eva3_drivers/source/SCCS/s.timer.h
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26 Sccs Id (SID) : '@(#) timer.h 1.3 07/23/98 16:25:53 '
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29 *****************************************************************************/
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30
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31 #include "l1sw.cfg"
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33 #if (OP_L1_STANDALONE == 0)
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34 #include "main/sys_types.h"
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35 #else
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36 #include "sys_types.h"
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37 #endif
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39 #define TIMER_CNTL_REG MEM_TIMER_ADDR /* watchdog Control Timer register */
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40
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41 #define TIMER_ST 0x0080
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42 #define TIMER_AR 0x0100
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43 #define TIMER_PTV 0x0e00
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44 #define TIMER_CNTL_MASK 0x0f80
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45 #define TIMER_MODE_MASK 0x80ff
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48 #define TIMER_LOAD_REG (MEM_TIMER_ADDR + 0x02) /* Timer load register */
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49 #define TIMER_READ_REG (MEM_TIMER_ADDR + 0x02) /* Timer read register */
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52 #define TIMER_MODE_REG (MEM_TIMER_ADDR + 0x04) /* Timer mode register */
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53 #define TIMER_WDOG 0x8000 /* watch dog */
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54
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55 #define START_STOP 1 /*to start or stop a timer */
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56 #define AR 0x0002
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57 #define PTV 0x001c
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58 #define TIMER_CLK_EN 0x0020
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61 #define TIMER1_CNTL (MEM_TIMER1 + 0x00)
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62 #define TIMER1_LOAD_TIM (MEM_TIMER1 + 0x02)
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63 #define TIMER1_READ_TIM (MEM_TIMER1 + 0x04)
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64 #define TIMER2_CNTL (MEM_TIMER2 + 0x00)
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65 #define TIMER2_LOAD_TIM (MEM_TIMER2 + 0x02)
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66 #define TIMER2_READ_TIM (MEM_TIMER2 + 0x04)
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69 /*--------------------------------------------------------------
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70 * TIMER_START_STOP ()
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71 *--------------------------------------------------------------
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72 * Parameters : start or stop command
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73 * Return : none
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74 * Functionality : Start or Stop the timer
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75 *--------------------------------------------------------------*/
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76 #define TIMER_START_STOP(startStop) ((startStop) ? ((* (volatile SYS_UWORD16 *) TIMER_CNTL_REG) |= TIMER_ST) : \
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77 ((* (volatile SYS_UWORD16 *) TIMER_CNTL_REG) &= ~TIMER_ST))
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80 /* Prototype of the functions */
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81
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82 void TM_ResetTimer (SYS_UWORD16 timerNum, SYS_UWORD16 countValue,
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83 SYS_UWORD16 autoReload, SYS_UWORD16 clockScale);
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84 void TM_StopTimer (int timerNum);
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85 void TM_StartTimer (int timerNum);
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86 SYS_UWORD16 TM_ReadTimer (int timerNum);
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87
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88 void TM_DisableWatchdog(void);
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89 void TM_EnableWatchdog(void);
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90 void TM_ResetWatchdog(SYS_UWORD16 cnt);
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91 void TM_EnableTimer (int timerNum);
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92 void TM_DisableTimer (int timerNum);
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94 SYS_UWORD16 TIMER_Read (unsigned short);
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95 void TIMER_WriteValue (SYS_UWORD16);
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96 unsigned short TIMER_ReadValue (void);
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97