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annotate src/cs/system/template/gsm_ds_pirelli_flash.template @ 695:530f71d65c20

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uartfax.c: pull from Tourmaline (GTM900 RI output) In addition to the primary intent of bringing in GTM900 RI output support, pulling uartfax.c wholesale from Tourmaline also changes the initial_time argument in the two NU_Create_Timer() calls from 0 to 1. This change is required for the new version of Nucleus used in Tourmaline and Selenite (and apparently also used by TI in LoCosto), and it is harmless (no effect) for the original TCS211 version of Nucleus used in Magnetite. The new philosophical model being adopted is that Tourmaline is our new development head firmware, whereas Magnetite will now be maintained similarly to how Linux maintainers treat stable kernels: changes will be backported from Tourmaline if they are deemed appropriate for stable modem firmware.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 24 Oct 2020 17:33:10 +0000
parents 1524d182a2b2
children
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86
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1 /*
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2 * Integrated Protocol Stack Linker command file (all components)
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3 *
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4 * Target : ARM
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5 *
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6 * Copyright (c) Texas Instruments 2002, Condat 2002
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7 *
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8 * This version of the linker script template has been concocted
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9 * by Spacefalcon the Outlaw based on previous hacks.
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10 */
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11
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12 -c /* Autoinitialize variables at runtime */
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13
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14 /*********************************/
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15 /* SPECIFY THE SYSTEM MEMORY MAP */
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16 /*********************************/
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17
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18 MEMORY
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19 {
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20 /* CS0: Flash 8 Mbytes ****************************************************/
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21 /* Interrupt Vectors Table */
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22 I_MEM (RXI) : org = 0x00000000 len = 0x00000100
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23
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24 /* Boot Sector */
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25 B_MEM (RXI) : org = 0x00000100 len = 0x00001f00
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26
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27 /* Magic Word for Calypso Boot ROM */
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28 MWC_MEM (RXI) : org = 0x00002000 len = 0x00000004 fill = 0x0000001
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29
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30 /* Program Memory */
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31 P_MEM1 (RXI) : org = 0x00004000 len = 0x00000700
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32 P_MEM2 (RXI) : org = 0x00004700 len = 0x00000004
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33 P_MEM3 (RXI) : org = 0x00004704 len = 0x00400000
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34
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35 /* FFS Area */
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36 FFS_MEM (RX) : org = 0x02000000 len = 0x00800000
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37 /**************************************************************************/
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38
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39 /* CS1: External SRAM 1 Mbytes ********************************************/
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40 /* Data Memory */
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41
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42 /*
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43 * Huge XRAM on the Pirelli: present it as two banks of 4 MiB each
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44 */
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45
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46 D_MEM1 (RW) : org = 0x01000000 len = 0x00400000
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47 D_MEM2 (RW) : org = 0x01400000 len = 0x00400000
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48 /**************************************************************************/
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49
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50 /* CS6: Calypso Internal SRAM 512 kbytes **********************************/
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51 /* Code & Variables Memory */
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52 S_MEM (RXW) : org = 0x00800100 len = 0x0007ff00
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53 /**************************************************************************/
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54 }
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55
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56 /***********************************************/
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57 /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
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58 /***********************************************/
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59
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60 /*
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61 * Since the bootloader directly calls the INT_Initialize() routine located
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62 * in int.s, this int.s code must always be mapped at the same address
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63 * (usually in the second flash sector). Its length is about 0x500 bytes.
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64 * Then comes the code that need to be loaded into the internal RAM.
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65 */
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66
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67 SECTIONS
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68 {
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69 .intvecs : {} > I_MEM /* Interrupt Vectors Table */
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70 .monitor : > B_MEM /* Monitor Constants & Code */
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71 {
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72 $(CONST_BOOT_LIB)
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73 }
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74
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75 .inttext : {} > P_MEM1 /* int.s Code */
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76
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77 .bss_dar : > D_MEM1 /* DAR SWE Variables */
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78 {
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79 $(BSS_DAR_LIB)
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80 }
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81
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82 /*
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83 * The .bss section should not be split to ensure it is initialized to 0
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84 * each time the SW is reset. So the whole .bss is mapped either in D_MEM1
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85 * or in D_MEM2.
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86 *
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87 * Falcon's note for K5A3281: see the comments above where the memory
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88 * regions are defined.
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89 */
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90
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91 .bss : > D_MEM1 | D_MEM2 /* Global & Static Variables */
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92 {
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93 $(BSS_BOOT_LIB)
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94 }
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95
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96 /*
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97 * All .bss sections, which must be mapped in internal RAM must be
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98 * grouped in order to initialized the corresponding memory to 0.
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99 * This initialization is done in int.s file before calling the Nucleus
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100 * routine.
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101 */
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102
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103 GROUP
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104 {
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105 S_D_Mem /* Label of start address of .bss section in Int. RAM */
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106 .DintMem
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107 {
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108
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109 /*
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110 * .bss sections of the application
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111 */
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112
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113 $(BSS_LIBS)
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114
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115 }
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116
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117 API_HISR_stack : {}
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118
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119 E_D_Mem /* Label of end address of .bss section in Int. RAM */
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120 } > S_MEM
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121
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122 /*
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123 * .text and .const sections which must be mapped in internal RAM.
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124 */
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125
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126 .ldfl : {} > P_MEM2 /* Used to know the start load address */
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127 GROUP load = P_MEM3, run = S_MEM
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128 {
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129 S_P_Mem /* Label of start address of .text & .const sections in Int. RAM */
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130 .PIntMem
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131 {
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132 /*
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133 * .text and .const sections of the application.
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134 *
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135 * The .veneer sections correspond exactly to .text:v&n sections
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136 * implementing the veneer functions. The .text:v$n -> .veneer
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137 * translation is performed by PTOOL software when PTOOL_OPTIONS
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138 * environement variable is set to veneer_section.
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139 */
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140
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141 $(CONST_LIBS)
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142
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143 }
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144 E_P_Mem /* Label of end address of .text and .const sections in Int. RAM */
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145 }
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146
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147 /*
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148 * The rest of the code is mapped in flash, however the trampolines
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149 * load address should be consistent with .text.
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150 */
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151 COMMENT2START
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152 `trampolines load = P_MEM3, run = S_MEM
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153 COMMENT2END
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154
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155 .text : {} > P_MEM3 /* Code */
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156
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157 /*
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158 * The rest of the constants is mapped in flash.
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159 * The .cinit section should not be split.
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160 */
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161
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162 .cinit : {} > P_MEM3 /* Initialization Tables */
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163 .const : {} > P_MEM3 /* Constant Data */
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164 KadaAPI : {} > P_MEM3 /* ROMized CLDC */
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165
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166 .javastack: {} >> D_MEM1 | D_MEM2 /* Java stack */
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167
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168 .stackandheap : > D_MEM1 /* System Stacks, etc... */
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169 {
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170 /* Leave 20 32bit words for register pushes. */
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171 . = align(8);
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172 . += 20 * 4;
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173
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174 /* Stack for abort and/or undefined modes. */
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175 exception_stack = .;
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176
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177 /* Leave 38 32bit words for state saving on exceptions. */
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178 _xdump_buffer = .;
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179 . += 38 * 4;
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180 . = align(8);
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181
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182 /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */
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183 stack_segment = .;
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184 . += 0xB00;
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185 }
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186
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187 .data : {} > D_MEM1 /* Initialized Data */
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188 .sysmem : {} > D_MEM1 /* Dynamic Memory Allocation Area */
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189
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190 }