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annotate src/g23m-gprs/cci/cci.h @ 619:5a0ddb29c58e

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targets/dsp34test.{conf,h} created for DSP 34 experiments
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 06 Oct 2019 22:25:10 +0000
parents 219afcfc6250
children
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1 /*
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2 +-----------------------------------------------------------------------------
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3 | Project :
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4 | Modul :
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5 +-----------------------------------------------------------------------------
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6 | Copyright 2002 Texas Instruments Berlin, AG
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7 | All rights reserved.
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8 |
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9 | This file is confidential and a trade secret of Texas
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10 | Instruments Berlin, AG
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11 | The receipt of or possession of this file does not convey
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12 | any rights to reproduce or disclose its contents or to
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13 | manufacture, use, or sell anything it may describe, in
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14 | whole, or in part, without the specific written consent of
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15 | Texas Instruments Berlin, AG.
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16 +-----------------------------------------------------------------------------
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17 | Purpose : Definitions for entity CCI.
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18 +-----------------------------------------------------------------------------
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19 */
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20
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21
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22 #ifndef CCI_H
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23 #define CCI_H
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24
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25 #ifndef TI_PS_OP_CIPH_DRIVER
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26
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27 #if !defined(_GEA_SIMULATION_) && !defined(LL_2to1)
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28 #include "config/board.cfg"
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29 #endif /* !_GEA_SIMULATION_ && !LL_2to1 */
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30
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31 /*
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32 * GEA-HW related constants
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33 */
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34 #if (BOARD == 0 || BOARD == 50 || BOARD == 51 || BOARD == 52 || BOARD == 53) /* Dolo1-equipped boards, e.g. F-Sample/Dolo1 */
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35 #define START_ADRESS 0xFFFE6800 /* address independent from bit mapping */
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36 #else
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37
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38 #if (BOARD == 61) /* G-Sample */
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39 #define START_ADRESS 0xFFFB6800 /* address independent from bit mapping */
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40 #else /* D-Sample, also in I-Sample */
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41 #define START_ADRESS 0xFFFFC000 /* address independent from bit mapping */
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42 #endif
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43
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44 #endif
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45
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46 /*
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47 * Macros
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48 */
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49
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50 /* CNTL_REG R/W flags */
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51 #define RESET_UL 0x0001 /* check bit to get UL reset in progress */
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52 #define RESET_DL 0x0002 /* check bit to get DL reset in progress */
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53
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54 #define NRESET_UL ~(RESET_UL) /* mask to init HW reset in UL direction */
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55 #define NRESET_DL ~(RESET_DL) /* mask to init HW reset in DL direction */
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56
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57 #define START 0x0004 /* set bit to start HW module */
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58
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59 #define CL_ENABLE 0x0008 /* set bit to enable internal clock */
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60 #define CL_DISABLE ~(CL_ENABLE) /* mask to disable internal clock */
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61
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62 #define UL_DL_DOWN 0x0010 /* set bit to select downlink direction */
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63 #define UL_DL_UP ~(UL_DL_DOWN) /* mask to set uplink direktion */
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64
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65 #define IT_ENABLE 0x0020 /* set bit to enable HW interrupt */
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66 #define IT_DISABLE ~(IT_ENABLE) /* mask to disable HW interrupt */
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67
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68 /* CONF_UL_REG1 and CONF_DL_REG1 R/W flags */
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69 #define INPUT_SHIFT 0x0001 /* set bit to set ignore byte one flag */
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70 #define NO_INPUT_SHIFT ~(INPUT_SHIFT) /* mask to clear ignore byte one flag */
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71
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72 #define ENCRYPT 0x0008 /* set bit to enable encryption */
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73 #define NO_ENCRYPT ~(ENCRYPT) /* mask to disable encryption */
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74
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75 #define PROTECTED 0x0010 /* set bit to enable protection mode */
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76 #define NON_PROTECTED ~(PROTECTED) /* mask to disable protection mode */
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77
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78 #define FCS_COMPUTED 0x0020 /* set bit to enable FCS computation */
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79 #define FCS_NOT_COMPUTED ~(FCS_COMPUTED) /* mask to disable FCS computation */
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80
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81 #define D_DL 0x0040 /* set bit to enable HW in DL direction */
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82 #define D_UL ~(D_DL) /* mask to enable HW in UL direction */
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83
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84 #define GEA_SECOND 0x0080 /* set bit to enable Second GEA algorithm */
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85 #define GEA_FIRST ~(GEA_SECOND) /* mask to enable First GEA algorithm */
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86
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87 /* STATUS_REQ read only flags (R/W if _GEA_SIMULATION_ is set) */
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88 #define CHECK_WORKING 0x0001 /* check bit to get TRUE if HW is working */
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89 #define NOT_WORKING ~(CHECK_WORKING) /* mask to simulate HW is not working */
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90
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91 #define FCS_FALSE_BIT 0x0002 /* check bit to get TRUE if FSC is bad */
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92
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93 #endif /* TI_PS_OP_CIPH_DRIVER */
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94
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95 /*==== TYPES ======================================================*/
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96
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97
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98 /*
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99 * CCI is embedded in LLC thus use llc_data instead of cci_data.
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100 * the CCI services must then be defined in llc_data, of course.
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101 */
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102 #define cci_data llc_data
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103
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104
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105
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106 /*==== EXPORT =====================================================*/
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107
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108
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109 #endif /* CCI_H */