annotate makefile-frags/ram-link-steps @ 673:62a5285e014a

Lorekeeping: allow tpudrv-leonardo.lib on Leonardo/Tango Back in 2015 the Mother's idea was to produce a FreeCalypso development board that would be a clone of TI Leonardo, including the original quadband RFFE; one major additional stipulation was that this board needed to be able to run original unmodified TCS211-20070608 firmware with all blobs intact, with only minimal binary patches to main.lib and tpudrv.lib. The necessary patched libs were produced at that time in the tcs211-patches repository. That plan was changed and we produced FCDEV3B instead, with Openmoko's triband RFFE instead of Leonardo quadband, but when FC Magnetite started in 2016, a TPUDRV_blob= provision was still made, allowing the possibility of patching OM's tpudrv.lib for a restored Leonardo RFFE. Now in 2020 we have FC Tango which is essentially a verbatim clone of Leonardo core, including the original quadband RFFE. We have also deblobbed our firmware so much that we have absolutely no real need for a blob version of tpudrv.lib - but I thought it would be neat to put the ancient TPUDRV_blob= mechanism (classic config) to its originally intended use, just for the heck of it.
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 29 May 2020 03:55:36 +0000
parents 9432dd63626b
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
93
6475bde1b170 Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents: 90
diff changeset
1 ram: ramimage.srec
6475bde1b170 Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents: 90
diff changeset
2
90
7bd197063b9e building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 link_ram.cmd: ${RAM_LINK_SCRIPT_SRC} Makefile lcfgen
7bd197063b9e building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 perl ../scripts/ti/make_cmd.pl lcfgen $@ 0 ${RAM_LINK_SCRIPT_SRC} \
7bd197063b9e building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 ${SPECIAL_LINK_LIBS}
7bd197063b9e building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6
250
9432dd63626b firmware ident and build date mechanism implemented at the build level
Mychaela Falconia <falcon@freecalypso.org>
parents: 93
diff changeset
7 ramimage.out: ${LIBS} build_date.obj str2ind.obj link_ram.cmd
90
7bd197063b9e building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 ../toolwrap/vlnk470 -farcall -x -o $@ -m ramimage.map $^
7bd197063b9e building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9
7bd197063b9e building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 ramimage.m0: ramimage.out
7bd197063b9e building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11 ../toolwrap/hex470 -m -memwidth 16 -romwidth 16 $<
7bd197063b9e building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12
93
6475bde1b170 Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents: 90
diff changeset
13 ramimage.srec: ramimage.m0
6475bde1b170 Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents: 90
diff changeset
14 ../helpers/srec4ram $< $@
6475bde1b170 Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents: 90
diff changeset
15