FreeCalypso > hg > fc-magnetite
annotate cdg-hybrid/cdginc/p_psi.h @ 306:67d1fd7c824c
serialswitch.c: allow enabling SERIAL_DYNAMIC_SWITCH outside of BTEMOBILE
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 02 Nov 2017 05:42:39 +0000 |
parents | e7a67accfad9 |
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rev | line source |
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1 /* |
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2 +--------------------------------------------------------------------------+ |
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3 | PROJECT : PROTOCOL STACK | |
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4 | FILE : p_psi.h | |
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5 | SOURCE : "sap\psi.pdf" | |
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6 | LastModified : "2004-02-09" | |
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7 | IdAndVersion : "..01.001" | |
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8 | SrcFileTime : "Thu Nov 29 09:51:16 2007" | |
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9 | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 | |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | |
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11 +--------------------------------------------------------------------------+ |
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12 */ |
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13 |
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14 /* PRAGMAS |
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15 * PREFIX : NONE |
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX) |
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO |
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18 * ENABLE_GROUP: NO |
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19 * CAPITALIZE_TYPENAME: NO |
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20 */ |
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21 |
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22 |
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23 #ifndef P_PSI_H |
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24 #define P_PSI_H |
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25 |
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26 |
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27 #define CDG_ENTER__P_PSI_H |
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28 |
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29 #define CDG_ENTER__FILENAME _P_PSI_H |
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30 #define CDG_ENTER__P_PSI_H__FILE_TYPE CDGINC |
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31 #define CDG_ENTER__P_PSI_H__LAST_MODIFIED _2004_02_09 |
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32 #define CDG_ENTER__P_PSI_H__ID_AND_VERSION __01_001 |
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33 |
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34 #define CDG_ENTER__P_PSI_H__SRC_FILE_TIME _Thu_Nov_29_09_51_16_2007 |
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35 |
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36 #include "CDG_ENTER.h" |
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37 |
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38 #undef CDG_ENTER__P_PSI_H |
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39 |
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40 #undef CDG_ENTER__FILENAME |
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41 |
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42 |
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43 #include "p_psi.val" |
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44 |
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45 #include "p_dio.h" |
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46 |
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47 #ifndef __T_DIO_CAP_UN__ |
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48 #define __T_DIO_CAP_UN__ |
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49 /* |
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50 * Structured Element |
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51 * CCDGEN:WriteStruct_Count==2338 |
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52 */ |
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53 typedef union |
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54 { |
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55 T_DIO_CAP_SER DIO_CAP_SER; /*< 0: 36> serial device capabiliity structures (type defined in "p_dio.h") */ |
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56 T_DIO_CAP_PKT DIO_CAP_PKT; /*< 0: 16> Structured Element (type defined in "p_dio.h") */ |
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57 T_DIO_CAP_SER_MUX DIO_CAP_SER_MUX; /*< 0: 40> Structured Element (type defined in "p_dio.h") */ |
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58 } T_DIO_CAP_UN; |
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59 #endif |
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60 |
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61 #ifndef __T_DIO_DCB_UN__ |
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62 #define __T_DIO_DCB_UN__ |
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63 /* |
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64 * Structured Element |
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65 * CCDGEN:WriteStruct_Count==2339 |
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66 */ |
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67 typedef union |
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68 { |
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69 T_DIO_DCB_SER DIO_DCB_SER; /*< 0: 28> Structured Element (type defined in "p_dio.h") */ |
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70 T_DIO_DCB_PKT DIO_DCB_PKT; /*< 0: 8> Structured Element (type defined in "p_dio.h") */ |
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71 T_DIO_DCB_SER_MUX DIO_DCB_SER_MUX; /*< 0: 44> Structured Element (type defined in "p_dio.h") */ |
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72 } T_DIO_DCB_UN; |
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73 #endif |
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74 |
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75 #ifndef __T_peer__ |
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76 #define __T_peer__ |
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77 /* |
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78 * communication entity name |
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79 * CCDGEN:WriteStruct_Count==2340 |
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80 */ |
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81 typedef struct |
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82 { |
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83 U8 name[PSI_PEER_ENTITY_NAME_LENGTH]; /*< 0: 6> entity name */ |
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84 U8 _align0; /*< 6: 1> alignment */ |
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85 U8 _align1; /*< 7: 1> alignment */ |
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86 } T_peer; |
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87 #endif |
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88 |
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89 |
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90 /* |
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91 * End of substructure section, begin of primitive definition section |
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92 */ |
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93 |
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94 #ifndef __T_PSI_CONN_IND__ |
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95 #define __T_PSI_CONN_IND__ |
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96 /* |
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97 * |
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98 * CCDGEN:WriteStruct_Count==2341 |
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99 */ |
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100 typedef struct |
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101 { |
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102 U32 devId; /*< 0: 4> device identifier */ |
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103 T_DIO_CAP *ptr_DIO_CAP; /*< 4: 4> pointer to device capabiliity structures (type defined in "p_dio.h") */ |
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104 U8 psi_data_mode; /*< 8: 1> TE will use the device to transmit AT commands or data or both */ |
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105 U8 _align0; /*< 9: 1> alignment */ |
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106 U8 _align1; /*< 10: 1> alignment */ |
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107 U8 _align2; /*< 11: 1> alignment */ |
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108 } T_PSI_CONN_IND; |
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109 #endif |
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110 |
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111 #ifndef __T_PSI_CONN_IND_TEST__ |
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112 #define __T_PSI_CONN_IND_TEST__ |
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113 /* |
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114 * |
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115 * CCDGEN:WriteStruct_Count==2342 |
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116 */ |
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117 typedef struct |
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118 { |
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119 U32 devId; /*< 0: 4> device identifier */ |
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120 T_ctrl_DIO_CAP_UN ctrl_DIO_CAP_UN; /*< 4: 4> (enum=32bit) controller for union */ |
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121 T_DIO_CAP_UN DIO_CAP_UN; /*< 8: 40> Structured Element */ |
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122 U8 psi_data_mode; /*< 48: 1> TE will use the device to transmit AT commands or data or both */ |
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123 U8 _align0; /*< 49: 1> alignment */ |
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124 U8 _align1; /*< 50: 1> alignment */ |
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125 U8 _align2; /*< 51: 1> alignment */ |
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126 } T_PSI_CONN_IND_TEST; |
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127 #endif |
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128 |
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129 #ifndef __T_PSI_CONN_RES__ |
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130 #define __T_PSI_CONN_RES__ |
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131 /* |
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132 * |
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133 * CCDGEN:WriteStruct_Count==2343 |
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134 */ |
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135 typedef struct |
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136 { |
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137 U32 devId; /*< 0: 4> device identifier */ |
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138 } T_PSI_CONN_RES; |
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139 #endif |
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140 |
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141 #ifndef __T_PSI_CONN_REJ__ |
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142 #define __T_PSI_CONN_REJ__ |
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143 /* |
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144 * |
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145 * CCDGEN:WriteStruct_Count==2344 |
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146 */ |
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147 typedef struct |
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148 { |
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149 U32 devId; /*< 0: 4> device identifier */ |
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150 } T_PSI_CONN_REJ; |
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151 #endif |
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152 |
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153 #ifndef __T_PSI_DISCONN_IND__ |
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154 #define __T_PSI_DISCONN_IND__ |
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155 /* |
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156 * |
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157 * CCDGEN:WriteStruct_Count==2345 |
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158 */ |
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159 typedef struct |
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160 { |
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161 U32 devId; /*< 0: 4> device identifier */ |
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162 U16 cause; /*< 4: 2> cause value */ |
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163 U8 _align0; /*< 6: 1> alignment */ |
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164 U8 _align1; /*< 7: 1> alignment */ |
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165 } T_PSI_DISCONN_IND; |
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166 #endif |
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167 |
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168 #ifndef __T_PSI_CLOSE_REQ__ |
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169 #define __T_PSI_CLOSE_REQ__ |
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170 /* |
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171 * |
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172 * CCDGEN:WriteStruct_Count==2346 |
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173 */ |
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174 typedef struct |
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175 { |
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176 U32 devId; /*< 0: 4> device identifier */ |
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177 } T_PSI_CLOSE_REQ; |
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178 #endif |
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179 |
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180 #ifndef __T_PSI_CLOSE_CNF__ |
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181 #define __T_PSI_CLOSE_CNF__ |
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182 /* |
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183 * |
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184 * CCDGEN:WriteStruct_Count==2347 |
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185 */ |
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186 typedef struct |
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187 { |
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188 U32 devId; /*< 0: 4> device identifier */ |
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189 } T_PSI_CLOSE_CNF; |
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190 #endif |
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191 |
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192 #ifndef __T_PSI_DTI_OPEN_REQ__ |
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193 #define __T_PSI_DTI_OPEN_REQ__ |
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194 /* |
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195 * |
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196 * CCDGEN:WriteStruct_Count==2348 |
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197 */ |
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198 typedef struct |
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199 { |
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200 U32 devId; /*< 0: 4> device identifier */ |
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201 T_peer peer; /*< 4: 8> communication entity name */ |
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202 U32 link_id; /*< 12: 4> link identifier */ |
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203 U8 dti_direction; /*< 16: 1> link identifier */ |
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204 U8 _align0; /*< 17: 1> alignment */ |
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205 U8 _align1; /*< 18: 1> alignment */ |
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206 U8 _align2; /*< 19: 1> alignment */ |
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207 } T_PSI_DTI_OPEN_REQ; |
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208 #endif |
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209 |
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210 #ifndef __T_PSI_DTI_CLOSE_REQ__ |
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211 #define __T_PSI_DTI_CLOSE_REQ__ |
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212 /* |
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213 * |
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214 * CCDGEN:WriteStruct_Count==2349 |
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215 */ |
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216 typedef struct |
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217 { |
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218 U32 devId; /*< 0: 4> device identifier */ |
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219 U32 link_id; /*< 4: 4> link identifier */ |
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220 } T_PSI_DTI_CLOSE_REQ; |
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221 #endif |
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222 |
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223 #ifndef __T_PSI_DTI_OPEN_CNF__ |
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224 #define __T_PSI_DTI_OPEN_CNF__ |
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225 /* |
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226 * |
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227 * CCDGEN:WriteStruct_Count==2350 |
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228 */ |
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229 typedef struct |
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230 { |
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231 U32 devId; /*< 0: 4> device identifier */ |
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232 U16 cause; /*< 4: 2> cause value */ |
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233 U8 _align0; /*< 6: 1> alignment */ |
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234 U8 _align1; /*< 7: 1> alignment */ |
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235 U32 link_id; /*< 8: 4> link identifier */ |
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236 } T_PSI_DTI_OPEN_CNF; |
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237 #endif |
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238 |
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239 #ifndef __T_PSI_DTI_CLOSE_CNF__ |
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240 #define __T_PSI_DTI_CLOSE_CNF__ |
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241 /* |
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242 * |
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243 * CCDGEN:WriteStruct_Count==2351 |
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244 */ |
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245 typedef struct |
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246 { |
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247 U32 devId; /*< 0: 4> device identifier */ |
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248 U32 link_id; /*< 4: 4> link identifier */ |
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249 } T_PSI_DTI_CLOSE_CNF; |
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250 #endif |
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251 |
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252 #ifndef __T_PSI_DTI_CLOSE_IND__ |
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253 #define __T_PSI_DTI_CLOSE_IND__ |
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254 /* |
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255 * |
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256 * CCDGEN:WriteStruct_Count==2352 |
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257 */ |
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258 typedef struct |
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259 { |
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260 U32 devId; /*< 0: 4> device identifier */ |
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261 U32 link_id; /*< 4: 4> link identifier */ |
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262 } T_PSI_DTI_CLOSE_IND; |
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263 #endif |
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264 |
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265 #ifndef __T_PSI_SETCONF_CNF__ |
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266 #define __T_PSI_SETCONF_CNF__ |
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267 /* |
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268 * |
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269 * CCDGEN:WriteStruct_Count==2353 |
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270 */ |
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271 typedef struct |
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272 { |
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273 U32 devId; /*< 0: 4> device identifier */ |
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274 U16 cause; /*< 4: 2> cause value */ |
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275 U8 _align0; /*< 6: 1> alignment */ |
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276 U8 _align1; /*< 7: 1> alignment */ |
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277 } T_PSI_SETCONF_CNF; |
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278 #endif |
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279 |
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280 #ifndef __T_PSI_SETCONF_REQ__ |
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281 #define __T_PSI_SETCONF_REQ__ |
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282 /* |
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283 * |
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284 * CCDGEN:WriteStruct_Count==2354 |
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285 */ |
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286 typedef struct |
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287 { |
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288 U32 devId; /*< 0: 4> device identifier */ |
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289 T_DIO_DCB *ptr_DIO_DCB; /*< 4: 4> pointer to all elements of driver configuration parameter (type defined in "p_dio.h") */ |
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290 } T_PSI_SETCONF_REQ; |
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291 #endif |
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292 |
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293 #ifndef __T_PSI_SETCONF_REQ_TEST__ |
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294 #define __T_PSI_SETCONF_REQ_TEST__ |
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295 /* |
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296 * |
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297 * CCDGEN:WriteStruct_Count==2355 |
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298 */ |
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299 typedef struct |
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300 { |
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301 U32 devId; /*< 0: 4> device identifier */ |
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302 T_ctrl_DIO_DCB_UN ctrl_DIO_DCB_UN; /*< 4: 4> (enum=32bit) controller for union */ |
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303 T_DIO_DCB_UN DIO_DCB_UN; /*< 8: 44> Structured Element */ |
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304 } T_PSI_SETCONF_REQ_TEST; |
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305 #endif |
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306 |
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307 #ifndef __T_PSI_LINE_STATE_REQ__ |
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308 #define __T_PSI_LINE_STATE_REQ__ |
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309 /* |
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310 * |
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311 * CCDGEN:WriteStruct_Count==2356 |
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312 */ |
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313 typedef struct |
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314 { |
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315 U32 devId; /*< 0: 4> device identifier */ |
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316 U16 line_state; /*< 4: 2> line state information */ |
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317 U8 _align0; /*< 6: 1> alignment */ |
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318 U8 _align1; /*< 7: 1> alignment */ |
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319 } T_PSI_LINE_STATE_REQ; |
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320 #endif |
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321 |
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322 #ifndef __T_PSI_LINE_STATE_CNF__ |
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323 #define __T_PSI_LINE_STATE_CNF__ |
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324 /* |
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325 * |
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326 * CCDGEN:WriteStruct_Count==2357 |
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327 */ |
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328 typedef struct |
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329 { |
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330 U32 devId; /*< 0: 4> device identifier */ |
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331 } T_PSI_LINE_STATE_CNF; |
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332 #endif |
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333 |
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334 #ifndef __T_PSI_LINE_STATE_IND__ |
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335 #define __T_PSI_LINE_STATE_IND__ |
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336 /* |
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337 * |
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338 * CCDGEN:WriteStruct_Count==2358 |
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339 */ |
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340 typedef struct |
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341 { |
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342 U32 devId; /*< 0: 4> device identifier */ |
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343 U16 line_state; /*< 4: 2> line state information */ |
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344 U8 _align0; /*< 6: 1> alignment */ |
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345 U8 _align1; /*< 7: 1> alignment */ |
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346 } T_PSI_LINE_STATE_IND; |
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347 #endif |
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348 |
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349 #ifndef __T_PSI_SIG_CLEAR_IND__ |
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350 #define __T_PSI_SIG_CLEAR_IND__ |
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351 /* |
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352 * |
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353 * CCDGEN:WriteStruct_Count==2359 |
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354 */ |
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355 typedef struct |
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356 { |
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357 U8 dummy; /*< 0: 1> no parameters */ |
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358 } T_PSI_SIG_CLEAR_IND; |
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359 #endif |
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360 |
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361 #ifndef __T_PSI_SIG_FLUSH_IND__ |
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362 #define __T_PSI_SIG_FLUSH_IND__ |
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363 /* |
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364 * |
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365 * CCDGEN:WriteStruct_Count==2360 |
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366 */ |
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367 typedef struct |
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368 { |
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369 U8 dummy; /*< 0: 1> no parameters */ |
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370 } T_PSI_SIG_FLUSH_IND; |
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371 #endif |
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372 |
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373 #ifndef __T_PSI_SIG_READ_IND__ |
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374 #define __T_PSI_SIG_READ_IND__ |
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375 /* |
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376 * |
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377 * CCDGEN:WriteStruct_Count==2361 |
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378 */ |
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379 typedef struct |
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380 { |
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381 U8 dummy; /*< 0: 1> no parameters */ |
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382 } T_PSI_SIG_READ_IND; |
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383 #endif |
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384 |
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385 #ifndef __T_PSI_SIG_WRITE_IND__ |
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386 #define __T_PSI_SIG_WRITE_IND__ |
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387 /* |
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388 * |
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389 * CCDGEN:WriteStruct_Count==2362 |
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390 */ |
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391 typedef struct |
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392 { |
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393 U8 dummy; /*< 0: 1> no parameters */ |
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394 } T_PSI_SIG_WRITE_IND; |
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395 #endif |
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396 |
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397 #ifndef __T_PSI_SIG_CONNECT_IND__ |
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398 #define __T_PSI_SIG_CONNECT_IND__ |
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399 /* |
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400 * |
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401 * CCDGEN:WriteStruct_Count==2363 |
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402 */ |
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403 typedef struct |
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404 { |
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405 U8 dummy; /*< 0: 1> no parameters */ |
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406 } T_PSI_SIG_CONNECT_IND; |
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407 #endif |
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408 |
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409 #ifndef __T_PSI_SIG_DISCONNECT_IND__ |
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410 #define __T_PSI_SIG_DISCONNECT_IND__ |
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411 /* |
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412 * |
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413 * CCDGEN:WriteStruct_Count==2364 |
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414 */ |
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415 typedef struct |
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416 { |
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417 U8 dummy; /*< 0: 1> no parameters */ |
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418 } T_PSI_SIG_DISCONNECT_IND; |
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419 #endif |
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420 |
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421 #ifndef __T_PSI_DIOSIM_INIT_REQ__ |
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422 #define __T_PSI_DIOSIM_INIT_REQ__ |
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423 /* |
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424 * |
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425 * CCDGEN:WriteStruct_Count==2365 |
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426 */ |
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427 typedef struct |
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428 { |
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429 U16 drv_handle; /*< 0: 2> driver handle */ |
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430 U8 _align0; /*< 2: 1> alignment */ |
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431 U8 _align1; /*< 3: 1> alignment */ |
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432 } T_PSI_DIOSIM_INIT_REQ; |
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433 #endif |
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434 |
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435 #ifndef __T_PSI_DIOSIM_INIT_CNF__ |
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436 #define __T_PSI_DIOSIM_INIT_CNF__ |
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437 /* |
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438 * |
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439 * CCDGEN:WriteStruct_Count==2366 |
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440 */ |
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441 typedef struct |
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442 { |
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443 U16 retValue; /*< 0: 2> return value */ |
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444 U8 _align0; /*< 2: 1> alignment */ |
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445 U8 _align1; /*< 3: 1> alignment */ |
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446 } T_PSI_DIOSIM_INIT_CNF; |
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447 #endif |
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448 |
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449 #ifndef __T_PSI_DIOSIM_GET_CAP_REQ__ |
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450 #define __T_PSI_DIOSIM_GET_CAP_REQ__ |
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451 /* |
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452 * |
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453 * CCDGEN:WriteStruct_Count==2367 |
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454 */ |
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455 typedef struct |
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456 { |
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457 U32 devId; /*< 0: 4> device identifier */ |
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458 } T_PSI_DIOSIM_GET_CAP_REQ; |
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459 #endif |
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460 |
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461 #ifndef __T_PSI_DIOSIM_GET_CAP_SER_CNF__ |
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462 #define __T_PSI_DIOSIM_GET_CAP_SER_CNF__ |
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463 /* |
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464 * |
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465 * CCDGEN:WriteStruct_Count==2368 |
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466 */ |
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467 typedef struct |
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468 { |
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469 U16 retValue; /*< 0: 2> return value */ |
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470 U8 _align0; /*< 2: 1> alignment */ |
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471 U8 _align1; /*< 3: 1> alignment */ |
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472 T_DIO_CAP_SER DIO_CAP_SER; /*< 4: 36> serial device capabiliity structures (type defined in "p_dio.h") */ |
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473 } T_PSI_DIOSIM_GET_CAP_SER_CNF; |
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474 #endif |
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475 |
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476 #ifndef __T_PSI_DIOSIM_GET_CAP_PKT_CNF__ |
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477 #define __T_PSI_DIOSIM_GET_CAP_PKT_CNF__ |
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478 /* |
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479 * |
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480 * CCDGEN:WriteStruct_Count==2369 |
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481 */ |
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482 typedef struct |
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483 { |
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484 U16 retValue; /*< 0: 2> return value */ |
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485 U8 _align0; /*< 2: 1> alignment */ |
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486 U8 _align1; /*< 3: 1> alignment */ |
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487 T_DIO_CAP_PKT DIO_CAP_PKT; /*< 4: 16> Structured Element (type defined in "p_dio.h") */ |
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488 } T_PSI_DIOSIM_GET_CAP_PKT_CNF; |
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489 #endif |
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490 |
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491 #ifndef __T_PSI_DIOSIM_SET_CONF_SER_REQ__ |
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492 #define __T_PSI_DIOSIM_SET_CONF_SER_REQ__ |
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493 /* |
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494 * |
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495 * CCDGEN:WriteStruct_Count==2370 |
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496 */ |
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497 typedef struct |
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498 { |
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499 U32 devId; /*< 0: 4> device identifier */ |
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500 T_DIO_DCB_SER DIO_DCB_SER; /*< 4: 28> Structured Element (type defined in "p_dio.h") */ |
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501 } T_PSI_DIOSIM_SET_CONF_SER_REQ; |
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502 #endif |
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503 |
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504 #ifndef __T_PSI_DIOSIM_SET_CONF_PKT_REQ__ |
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505 #define __T_PSI_DIOSIM_SET_CONF_PKT_REQ__ |
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506 /* |
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507 * |
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508 * CCDGEN:WriteStruct_Count==2371 |
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509 */ |
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510 typedef struct |
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511 { |
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512 U32 devId; /*< 0: 4> device identifier */ |
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513 T_DIO_DCB_PKT DIO_DCB_PKT; /*< 4: 8> Structured Element (type defined in "p_dio.h") */ |
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514 } T_PSI_DIOSIM_SET_CONF_PKT_REQ; |
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515 #endif |
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516 |
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517 #ifndef __T_PSI_DIOSIM_SET_CONF_CNF__ |
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518 #define __T_PSI_DIOSIM_SET_CONF_CNF__ |
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519 /* |
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520 * |
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521 * CCDGEN:WriteStruct_Count==2372 |
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522 */ |
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523 typedef struct |
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524 { |
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525 U16 retValue; /*< 0: 2> return value */ |
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526 U8 _align0; /*< 2: 1> alignment */ |
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527 U8 _align1; /*< 3: 1> alignment */ |
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528 } T_PSI_DIOSIM_SET_CONF_CNF; |
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529 #endif |
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530 |
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531 #ifndef __T_PSI_DIOSIM_GET_CONF_SER_REQ__ |
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532 #define __T_PSI_DIOSIM_GET_CONF_SER_REQ__ |
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533 /* |
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534 * |
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535 * CCDGEN:WriteStruct_Count==2373 |
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536 */ |
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537 typedef struct |
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538 { |
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539 U32 devId; /*< 0: 4> device identifier */ |
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540 T_DIO_DCB_SER DIO_DCB_SER; /*< 4: 28> Structured Element (type defined in "p_dio.h") */ |
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541 } T_PSI_DIOSIM_GET_CONF_SER_REQ; |
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542 #endif |
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543 |
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544 #ifndef __T_PSI_DIOSIM_GET_CONF_CNF__ |
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545 #define __T_PSI_DIOSIM_GET_CONF_CNF__ |
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546 /* |
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547 * |
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548 * CCDGEN:WriteStruct_Count==2374 |
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549 */ |
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550 typedef struct |
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551 { |
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552 U16 retValue; /*< 0: 2> return value */ |
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553 U8 _align0; /*< 2: 1> alignment */ |
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554 U8 _align1; /*< 3: 1> alignment */ |
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555 } T_PSI_DIOSIM_GET_CONF_CNF; |
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556 #endif |
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557 |
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558 #ifndef __T_PSI_DIOSIM_CLOSE_DEV_REQ__ |
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559 #define __T_PSI_DIOSIM_CLOSE_DEV_REQ__ |
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560 /* |
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561 * |
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562 * CCDGEN:WriteStruct_Count==2375 |
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563 */ |
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564 typedef struct |
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565 { |
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|
566 U32 devId; /*< 0: 4> device identifier */ |
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567 } T_PSI_DIOSIM_CLOSE_DEV_REQ; |
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568 #endif |
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569 |
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570 #ifndef __T_PSI_DIOSIM_CLOSE_DEV_CNF__ |
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571 #define __T_PSI_DIOSIM_CLOSE_DEV_CNF__ |
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572 /* |
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573 * |
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574 * CCDGEN:WriteStruct_Count==2376 |
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575 */ |
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576 typedef struct |
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577 { |
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578 U16 retValue; /*< 0: 2> return value */ |
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579 U8 _align0; /*< 2: 1> alignment */ |
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580 U8 _align1; /*< 3: 1> alignment */ |
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581 } T_PSI_DIOSIM_CLOSE_DEV_CNF; |
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582 #endif |
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|
583 |
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584 #ifndef __T_PSI_DIOSIM_FLUSH_REQ__ |
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585 #define __T_PSI_DIOSIM_FLUSH_REQ__ |
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586 /* |
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|
587 * |
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588 * CCDGEN:WriteStruct_Count==2377 |
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589 */ |
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590 typedef struct |
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591 { |
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592 U32 devId; /*< 0: 4> device identifier */ |
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593 } T_PSI_DIOSIM_FLUSH_REQ; |
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594 #endif |
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595 |
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596 #ifndef __T_PSI_DIOSIM_FLUSH_CNF__ |
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597 #define __T_PSI_DIOSIM_FLUSH_CNF__ |
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598 /* |
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599 * |
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|
600 * CCDGEN:WriteStruct_Count==2378 |
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|
601 */ |
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|
602 typedef struct |
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|
603 { |
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|
604 U16 retValue; /*< 0: 2> return value */ |
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605 U8 _align0; /*< 2: 1> alignment */ |
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606 U8 _align1; /*< 3: 1> alignment */ |
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607 } T_PSI_DIOSIM_FLUSH_CNF; |
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608 #endif |
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|
609 |
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610 #ifndef __T_PSI_DIOSIM_CLEAR_REQ__ |
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diff
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|
611 #define __T_PSI_DIOSIM_CLEAR_REQ__ |
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612 /* |
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613 * |
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614 * CCDGEN:WriteStruct_Count==2379 |
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615 */ |
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616 typedef struct |
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617 { |
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618 U32 devId; /*< 0: 4> device identifier */ |
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619 } T_PSI_DIOSIM_CLEAR_REQ; |
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620 #endif |
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621 |
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622 #ifndef __T_PSI_DIOSIM_CLEAR_CNF__ |
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623 #define __T_PSI_DIOSIM_CLEAR_CNF__ |
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624 /* |
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625 * |
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626 * CCDGEN:WriteStruct_Count==2380 |
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627 */ |
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628 typedef struct |
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629 { |
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630 U16 retValue; /*< 0: 2> return value */ |
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631 U8 _align0; /*< 2: 1> alignment */ |
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632 U8 _align1; /*< 3: 1> alignment */ |
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633 } T_PSI_DIOSIM_CLEAR_CNF; |
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634 #endif |
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635 |
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636 #ifndef __T_PSI_DIOSIM_GET_TXB_REQ__ |
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637 #define __T_PSI_DIOSIM_GET_TXB_REQ__ |
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638 /* |
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639 * |
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640 * CCDGEN:WriteStruct_Count==2381 |
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641 */ |
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642 typedef struct |
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643 { |
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644 U32 devId; /*< 0: 4> device identifier */ |
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645 } T_PSI_DIOSIM_GET_TXB_REQ; |
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646 #endif |
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647 |
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648 #ifndef __T_PSI_DIOSIM_GET_TXB_CNF__ |
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649 #define __T_PSI_DIOSIM_GET_TXB_CNF__ |
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650 /* |
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651 * |
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652 * CCDGEN:WriteStruct_Count==2382 |
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653 */ |
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654 typedef struct |
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655 { |
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656 U16 retValue; /*< 0: 2> return value */ |
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657 U8 _align0; /*< 2: 1> alignment */ |
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658 U8 _align1; /*< 3: 1> alignment */ |
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659 } T_PSI_DIOSIM_GET_TXB_CNF; |
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660 #endif |
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661 |
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662 #ifndef __T_PSI_DIOSIM_SET_RXB_REQ__ |
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663 #define __T_PSI_DIOSIM_SET_RXB_REQ__ |
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664 /* |
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665 * |
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666 * CCDGEN:WriteStruct_Count==2383 |
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667 */ |
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668 typedef struct |
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669 { |
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670 U32 devId; /*< 0: 4> device identifier */ |
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671 } T_PSI_DIOSIM_SET_RXB_REQ; |
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672 #endif |
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673 |
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674 #ifndef __T_PSI_DIOSIM_SET_RXB_CNF__ |
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675 #define __T_PSI_DIOSIM_SET_RXB_CNF__ |
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676 /* |
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677 * |
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678 * CCDGEN:WriteStruct_Count==2384 |
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679 */ |
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680 typedef struct |
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681 { |
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682 U16 retValue; /*< 0: 2> return value */ |
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683 U8 _align0; /*< 2: 1> alignment */ |
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684 U8 _align1; /*< 3: 1> alignment */ |
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685 } T_PSI_DIOSIM_SET_RXB_CNF; |
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686 #endif |
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687 |
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688 #ifndef __T_PSI_DIOSIM_READ_REQ__ |
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689 #define __T_PSI_DIOSIM_READ_REQ__ |
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690 /* |
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|
691 * |
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|
692 * CCDGEN:WriteStruct_Count==2385 |
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693 */ |
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Mychaela Falconia <falcon@freecalypso.org>
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694 typedef struct |
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Mychaela Falconia <falcon@freecalypso.org>
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|
695 { |
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696 U32 devId; /*< 0: 4> device identifier */ |
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|
697 } T_PSI_DIOSIM_READ_REQ; |
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|
698 #endif |
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parents:
diff
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|
699 |
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diff
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|
700 #ifndef __T_PSI_DIOSIM_READ_SER_CNF__ |
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|
701 #define __T_PSI_DIOSIM_READ_SER_CNF__ |
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|
702 /* |
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Mychaela Falconia <falcon@freecalypso.org>
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|
703 * |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
704 * CCDGEN:WriteStruct_Count==2386 |
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parents:
diff
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|
705 */ |
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parents:
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|
706 typedef struct |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
707 { |
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parents:
diff
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|
708 U16 retValue; /*< 0: 2> return value */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
709 U16 control_type; /*< 2: 2> data types */ |
e7a67accfad9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
710 U16 length; /*< 4: 2> len of dio_ctrl */ |
e7a67accfad9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
711 U8 _align0; /*< 6: 1> alignment */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
712 U8 _align1; /*< 7: 1> alignment */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
713 U32 state; /*< 8: 4> line states */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
714 } T_PSI_DIOSIM_READ_SER_CNF; |
e7a67accfad9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
715 #endif |
e7a67accfad9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
716 |
e7a67accfad9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
717 #ifndef __T_PSI_DIOSIM_READ_PKT_CNF__ |
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parents:
diff
changeset
|
718 #define __T_PSI_DIOSIM_READ_PKT_CNF__ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
719 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
720 * |
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cdg-hybrid cdginc headers created
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
721 * CCDGEN:WriteStruct_Count==2387 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
722 */ |
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cdg-hybrid cdginc headers created
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
723 typedef struct |
e7a67accfad9
cdg-hybrid cdginc headers created
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
724 { |
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cdg-hybrid cdginc headers created
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
725 U16 retValue; /*< 0: 2> return value */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
726 U8 _align0; /*< 2: 1> alignment */ |
e7a67accfad9
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parents:
diff
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|
727 U8 _align1; /*< 3: 1> alignment */ |
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parents:
diff
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|
728 } T_PSI_DIOSIM_READ_PKT_CNF; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
729 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
730 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
731 #ifndef __T_PSI_DIOSIM_WRITE_SER_REQ__ |
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parents:
diff
changeset
|
732 #define __T_PSI_DIOSIM_WRITE_SER_REQ__ |
e7a67accfad9
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parents:
diff
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|
733 /* |
e7a67accfad9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
734 * |
e7a67accfad9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
735 * CCDGEN:WriteStruct_Count==2388 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
736 */ |
e7a67accfad9
cdg-hybrid cdginc headers created
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
737 typedef struct |
e7a67accfad9
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
738 { |
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739 U32 devId; /*< 0: 4> device identifier */ |
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740 T_DIO_CTRL_LINES DIO_CTRL_LINES; /*< 4: 8> Structured Element (type defined in "p_dio.h") */ |
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741 } T_PSI_DIOSIM_WRITE_SER_REQ; |
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742 #endif |
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743 |
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744 #ifndef __T_PSI_DIOSIM_WRITE_PKT_REQ__ |
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745 #define __T_PSI_DIOSIM_WRITE_PKT_REQ__ |
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746 /* |
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747 * |
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748 * CCDGEN:WriteStruct_Count==2389 |
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749 */ |
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750 typedef struct |
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751 { |
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752 U32 devId; /*< 0: 4> device identifier */ |
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753 } T_PSI_DIOSIM_WRITE_PKT_REQ; |
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754 #endif |
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755 |
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756 #ifndef __T_PSI_DIOSIM_WRITE_CNF__ |
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757 #define __T_PSI_DIOSIM_WRITE_CNF__ |
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758 /* |
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759 * |
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760 * CCDGEN:WriteStruct_Count==2390 |
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761 */ |
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762 typedef struct |
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763 { |
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764 U16 retValue; /*< 0: 2> return value */ |
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765 U8 _align0; /*< 2: 1> alignment */ |
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766 U8 _align1; /*< 3: 1> alignment */ |
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767 } T_PSI_DIOSIM_WRITE_CNF; |
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768 #endif |
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769 |
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770 #ifndef __T_PSI_DIOSIM_EXIT_REQ__ |
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771 #define __T_PSI_DIOSIM_EXIT_REQ__ |
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772 /* |
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773 * |
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774 * CCDGEN:WriteStruct_Count==2391 |
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|
775 */ |
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776 typedef struct |
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777 { |
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778 U8 dummy; /*< 0: 1> no parameters */ |
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779 } T_PSI_DIOSIM_EXIT_REQ; |
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780 #endif |
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781 |
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782 #ifndef __T_PSI_DIOSIM_SIGN_IND__ |
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783 #define __T_PSI_DIOSIM_SIGN_IND__ |
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784 /* |
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785 * |
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786 * CCDGEN:WriteStruct_Count==2392 |
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787 */ |
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788 typedef struct |
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789 { |
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790 U32 devId; /*< 0: 4> device identifier */ |
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791 U16 signal_type; /*< 4: 2> signal information */ |
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792 U8 _align0; /*< 6: 1> alignment */ |
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793 U8 _align1; /*< 7: 1> alignment */ |
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794 } T_PSI_DIOSIM_SIGN_IND; |
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795 #endif |
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796 |
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|
797 |
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798 #include "CDG_LEAVE.h" |
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799 |
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800 |
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801 #endif |