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annotate doc/Calypso-version-override @ 643:6af4147329b3

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gtm900mgc2 build target renamed to just gtm900mgc based on the discovery of MGC1GSMT which is fw-compatible with the more common and more familiar MGC2GSMT.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 15 Feb 2020 17:57:21 +0000
parents 9f19cc5e46e8
children
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0d66718e5f33 Calypso chip version mechanism documented
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1 TI's TCS211 program supported 3 different Calypso silicon versions on their
0d66718e5f33 Calypso chip version mechanism documented
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2 D-Sample and Leonardo boards: C05B (CHIPSET 8, DSP 33), early C035 (CHIPSET 10,
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3 DSP 34) and final C035 (CHIPSET 10, DSP 36). In FreeCalypso we generally work
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9f19cc5e46e8 FCDEV3B-751774 experiment documented
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4 only with the last chipset (final C035), but we also support the two earlier
9f19cc5e46e8 FCDEV3B-751774 experiment documented
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5 ones to a good extent. C05B has been partially exercised on the Mother's
9f19cc5e46e8 FCDEV3B-751774 experiment documented
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6 D-Sample board (non-functional Clara RF, no genuine tpudrv10.c source and too
9f19cc5e46e8 FCDEV3B-751774 experiment documented
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7 many unknowns, but at least some of the DSP-based audio services work), whereas
9f19cc5e46e8 FCDEV3B-751774 experiment documented
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8 Calypso C035 with DSP 34 has been tested and found to work on a specially
9f19cc5e46e8 FCDEV3B-751774 experiment documented
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9 modified FCDEV3B board - see the FCDEV3B-751774 article.
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10
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11 All 3 Calypso chip versions in question are footprint-compatible, i.e., they
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12 can all be populated onto the same PCB. Changing between C05 and C035 requires
0d66718e5f33 Calypso chip version mechanism documented
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13 changing the VLRTC strapping on the Iota companion chip, thus not all boards
0d66718e5f33 Calypso chip version mechanism documented
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14 can support Calypso C05 (the newer ones are C035 only), but one can always
0d66718e5f33 Calypso chip version mechanism documented
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15 populate either early C035 (DSP 34) or final C035 (DSP 36) on the same PCB.
0d66718e5f33 Calypso chip version mechanism documented
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16 TI's own D-Sample and Leonardo development boards have most certainly been made
0d66718e5f33 Calypso chip version mechanism documented
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17 with all 3 Calypso silicon versions: D-Sample appears to support both C05 and
0d66718e5f33 Calypso chip version mechanism documented
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18 C035 on the same PCB; the schematics we have for Leonardo show fixed VLRTC
0d66718e5f33 Calypso chip version mechanism documented
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19 strapping for C035, but there also existed an earlier Leonardo version with
0d66718e5f33 Calypso chip version mechanism documented
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20 Calypso C05B. Our own FCDEV3B also has fixed C035-only VLRTC strapping, our
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21 regular boards have final C035 chips on them, but we have put a D751774AGHH
9f19cc5e46e8 FCDEV3B-751774 experiment documented
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22 chip on one experimental board for DSP 34 testing.
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23
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24 In the case of target boards that can have different Calypso chip versions
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25 populated on them, we want to be able to target all of them without creating a
0d66718e5f33 Calypso chip version mechanism documented
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26 configuration explosion. The implemented solution is that you can pass a target
0d66718e5f33 Calypso chip version mechanism documented
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27 argument to the ./configure.sh script of the following form:
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28
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29 dsample-c05b
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30 dsample-dsp34
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31 dsample-dsp36
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32 leonardo-c05b
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33 leonardo-dsp34
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34 leonardo-dsp36
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35 fcdev3b-dsp34
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36
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37 Our configure.sh script recognizes the hyphen as indicating this construct;
0d66718e5f33 Calypso chip version mechanism documented
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38 the word before the hyphen must be the conventional target name, and the word
0d66718e5f33 Calypso chip version mechanism documented
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39 after the hyphen needs to be one of c05b, dsp34 or dsp36, corresponding to the
0d66718e5f33 Calypso chip version mechanism documented
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40 three supported Calypso silicon versions.