FreeCalypso > hg > fc-magnetite
annotate makefile-frags/ram-link-steps @ 598:717ed17d82c6
aci3 vocoder control revamped, AT@VSEL now works as it should
The vocoder control code (hl_audio_drv.c) that came with the TCS3 version
of ACI was totally broken in the Calypso config (VOCODER_FUNC_INTERFACE)
and worked in the standard analog voice environment only by luck.
This code has now been rewritten to work correctly with our Calypso
platform and TCS211 L1, and our new AT@VSEL mechanism (automatic enabling
and disabling of MCSI voice path as the modem enters and exits the voice
call state) now also works as designed.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Wed, 27 Mar 2019 23:44:35 +0000 |
parents | 9432dd63626b |
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93
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
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1 ram: ramimage.srec |
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
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2 |
90
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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3 link_ram.cmd: ${RAM_LINK_SCRIPT_SRC} Makefile lcfgen |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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4 perl ../scripts/ti/make_cmd.pl lcfgen $@ 0 ${RAM_LINK_SCRIPT_SRC} \ |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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5 ${SPECIAL_LINK_LIBS} |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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6 |
250
9432dd63626b
firmware ident and build date mechanism implemented at the build level
Mychaela Falconia <falcon@freecalypso.org>
parents:
93
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7 ramimage.out: ${LIBS} build_date.obj str2ind.obj link_ram.cmd |
90
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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8 ../toolwrap/vlnk470 -farcall -x -o $@ -m ramimage.map $^ |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
9 |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
10 ramimage.m0: ramimage.out |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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11 ../toolwrap/hex470 -m -memwidth 16 -romwidth 16 $< |
7bd197063b9e
building RAM fw images for the Pirelli: initial concept
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
12 |
93
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
|
13 ramimage.srec: ramimage.m0 |
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
|
14 ../helpers/srec4ram $< $@ |
6475bde1b170
Building RAM fw images for the Pirelli: finishing touches
Mychaela Falconia <falcon@freecalypso.org>
parents:
90
diff
changeset
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15 |