FreeCalypso > hg > fc-magnetite

annotate src/cs/drivers/drv_core/inth/iq.h @ 598:717ed17d82c6

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aci3 vocoder control revamped, AT@VSEL now works as it should The vocoder control code (hl_audio_drv.c) that came with the TCS3 version of ACI was totally broken in the Calypso config (VOCODER_FUNC_INTERFACE) and worked in the standard analog voice environment only by luck. This code has now been rewritten to work correctly with our Calypso platform and TCS211 L1, and our new AT@VSEL mechanism (automatic enabling and disabling of MCSI voice path as the modem enters and exits the voice call state) now also works as designed.
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 27 Mar 2019 23:44:35 +0000
parents 945cf7f506b2
children
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1 /******************************************************************************
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2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
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3
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4 Property of Texas Instruments -- For Unrestricted Internal Use Only
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5 Unauthorized reproduction and/or distribution is strictly prohibited. This
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6 product is protected under copyright law and trade secret law as an
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7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
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8 rights reserved.
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9
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10
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11 Filename : iq.h
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12
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13 Description : Interrupt header
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14
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15 Project : drivers
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16
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17 Author : pmonteil@tif.ti.com Patrice Monteil.
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18
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19 Version number : 1.24
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20
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21 Date : 05/23/03
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22
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23 Previous delta : 12/19/00 14:22:53
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25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/RELEASE_GPRS/drivers1/common/SCCS/s.iq.h
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27 Sccs Id (SID) : '@(#) iq.h 1.13 01/30/01 10:22:22 '
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29
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30 *****************************************************************************/
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31
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32 #include "l1sw.cfg"
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33 #include "board.cfg"
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34 #include "chipset.cfg"
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35 #include "swconfig.cfg"
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36
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37 #if (OP_L1_STANDALONE == 0)
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38 #include "debug.cfg"
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39 #endif
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40
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41 #if (OP_L1_STANDALONE == 0)
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42 #include "main/sys_types.h"
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43 #else
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44 #include "sys_types.h"
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45 #endif
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46
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47 // Hardware driver library build number
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48 #define IQ_BUILD 1
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49
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50 #if (CHIPSET != 12)
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51 #define WS_MASK 0x001F
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52
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53 #if (CHIPSET == 4)
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54 #define IQ_NUM_INT 20
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55 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 9))
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56 #define IQ_NUM_INT 25
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57 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)
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58 #define IQ_NUM_INT 21
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59 #else
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60 #define IQ_NUM_INT 16
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61 #endif
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62
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63
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64 #define IRQ 0
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65 #define FIQ 1
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66
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67 /*
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68 * Interrupt bit numbers
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69 */
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70 #define IQ_WATCHDOG 0
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71
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72 #define IQ_TIM1 1
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73 #define IQ_TIM2 2
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74 #if (OP_L1_STANDALONE == 0)
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75 #define IQ_TSP 3
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76 #endif
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77 #define IQ_FRAME 4
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78 #define IQ_PAGE 5
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79 #define IQ_SIM 6
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80 #define IQ_UART_IT 7
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81 #define IQ_ARMIO 8
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82 #define IQ_RTC_TIMER 9
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83 #define IQ_RTC_ALARM 10
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84 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
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85 #define IQ_TGSM 19
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86 #else
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87 #define IQ_TGSM 10
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88 #endif
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89 #define IQ_ULPD_GAUGING 11
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90 #define IQ_EXT 12
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91 #if (L1_DYN_DSP_DWNLD == 1)
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92 #if ((CHIPSET == 10) || (CHIPSET == 11))
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93 #define IQ_API 15
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94 #endif // (CHIPSET == 10) || (CHIPSET == 11)
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95 #endif // L1_DYN_DSP_DWNLD == 1
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96
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97
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98 #if (OP_L1_STANDALONE == 0)
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99 #define IQ_SIM_CD 16
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100 #endif
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101
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102 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
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103 #define IQ_UART_IRDA_IT 18
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104 #endif
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105
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106 #if (OP_L1_STANDALONE == 0)
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107 #define IQ_ICR 20
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108 #endif
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109
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110 #if ((CHIPSET == 5) || (CHIPSET == 6))
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111 #define IQ_GEA_IT 24
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112 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)
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113 #define IQ_GEA_IT 20
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114 #endif
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115 #endif /* chipset != 12 */
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116
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117 /**** JTAG ID ****/
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118 #define SATURN 0xB217
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119 #define HERCRAM 0xB268
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120 #define F731782 0xB2B5 // HERCROM OLD
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121 #define F731782B 0xB2B5 // HERCROM 1M REV B
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122 #define F731782A 0xB335 // HERCROM 1M REV A
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123 #define F731950 0xB334 // HERCROM 2M
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124 #if (CHIPSET == 4)
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125 #define F731787 0xB2AC // HERCRAM20G
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126 #endif
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127 #if ((CHIPSET == 5) || (CHIPSET == 6))
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128 #define F741709 0xB393 // HERCROM20G1
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129 #endif
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130 #if (CHIPSET == 9)
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131 #define F751681 0xB217 // HERCROM200C035
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132 #endif
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133 #if (CHIPSET == 12)
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134 #define F751997 0xB512 // HERCROM500G2C035
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135 #endif
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136
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137
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138 unsigned IQ_GetBuild(void);
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139 #if (CHIPSET != 12)
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140 void IQ_SetupInterrupts(void);
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141 void IQ_Dummy(void);
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142 #endif
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143 void IQ_TimerHandler(void); /* Watchdog timer */
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144 void IQ_TimerHandler1(void); /* timer 1 */
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145 void IQ_TimerHandler2(void); /* timer 2 */
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146 void IQ_FrameHandler(void); /* It Handler for TPU Frame IT NUCLEUS TICKS */
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147 #if (CHIPSET != 12)
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148 #if (OP_L1_STANDALONE == 0)
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149 void IQ_IcrHandler32(void); // 32-bit ICR interrupt handler
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150 #endif
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151 void IQ_SetupInterruptEdge(unsigned short irq_num);
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152 void IQ_SetupInterruptLevel(unsigned short irq_num);
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153 void IQ_InitWaitState(unsigned short rom, unsigned short ram, unsigned short spy, unsigned short lcd, unsigned short jtag);
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154 void IQ_Unmask(unsigned irqNum);
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155 void IQ_Mask(unsigned irqNum);
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156 void IQ_MaskAll(void);
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157 #endif
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158 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41))
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159 void IQ_KeypadGPIOHandler (void);
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160 #elif ((BOARD == 34) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45))
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161 void IQ_KeypadHandler(void);
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162 #endif
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163 SYS_UWORD16 IQ_GetJtagId(void);
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164 SYS_UWORD16 IQ_GetDeviceVersion(void);
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165 SYS_BOOL IQ_RamBasedLead(void);
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166 SYS_UWORD16 IQ_GetRevision(void);
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167 void IQ_Gauging_Handler(void);
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168 void IQ_External(void);
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169 void IQ_Rtc_Handler(void);
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170 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
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171 void IQ_RtcA_Handler(void);
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172 void IQ_GsmTim_Handler(void);
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173 #if (L1_DYN_DSP_DWNLD == 1)
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174 void IQ_ApiHandler(void);
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175 #endif // L1_DYN_DSP_DWNLD
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176 #else
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177 void IQ_RtcA_GsmTim_Handler(void);
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178 #endif
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179 #if ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
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180 // void IQ_GEA_Handler(void);
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181 #endif
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182
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183 #if (OP_L1_STANDALONE == 0)
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184 #if (TI_PROFILER == 1)
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185 void IQ_InitLevel( SYS_UWORD16 inputInt,
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186 SYS_UWORD16 FIQ_nIRQ,
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187 SYS_UWORD16 priority,
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188 SYS_UWORD16 edge );
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189 #endif
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190 #endif