FreeCalypso > hg > fc-magnetite

annotate targets/fcdev3b.conf @ 553:7a62e5dfbe7b

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components/frame_na7_db_{fl,ir}-partial: this version rebuilds the parts for which we got perfectly matching sources, but uses the original TCS211 blobs for OSL
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 18 Nov 2018 23:46:16 +0000
parents a963c5c35f8d
children 69ffd7f2346d
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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103
76d139c7a25e targets/fcdev3b.conf: we'll have the same memory IC as the Pirelli,
Mychaela Falconia <falcon@freecalypso.org>
parents: 101
diff changeset
1 LINK_SCRIPT_SRC=src/cs/system/template/gsm_ds_pirelli_flash.template
76d139c7a25e targets/fcdev3b.conf: we'll have the same memory IC as the Pirelli,
Mychaela Falconia <falcon@freecalypso.org>
parents: 101
diff changeset
2 RAM_LINK_SCRIPT_SRC=src/cs/system/template/gsm_ds_pirelli_ram.template
56
e17c1e28389f targets/*.conf: selection of main.lib blob variants
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 MAIN_blob=blobs/patches/main-fchw.lib
101
5c13f9325e2d preparations for rebuilding main.lib from partial source
Mychaela Falconia <falcon@freecalypso.org>
parents: 66
diff changeset
4 INIT_blob=blobs/patches/main-fchw/init.obj
66
0377665aef9d tpudrv.lib blob selection in targets/*.conf
Mychaela Falconia <falcon@freecalypso.org>
parents: 58
diff changeset
5 TPUDRV_blob=blobs/libs/tpudrv.lib
258
13bcc2ed7e44 configure.sh & targets/*.conf: emit FLASH_BASE_ADDR & FLASH_SECTOR_SIZE
Mychaela Falconia <falcon@freecalypso.org>
parents: 103
diff changeset
6 FLASH_BASE_ADDR=0
13bcc2ed7e44 configure.sh & targets/*.conf: emit FLASH_BASE_ADDR & FLASH_SECTOR_SIZE
Mychaela Falconia <falcon@freecalypso.org>
parents: 103
diff changeset
7 FLASH_SECTOR_SIZE=0x40000
301
a963c5c35f8d targets/fcdev3b.conf: set DISABLE_SLEEP=1 until we find and fix the hw bug
Mychaela Falconia <falcon@freecalypso.org>
parents: 258
diff changeset
8 DISABLE_SLEEP=1