annotate src/cs/layer1/p_include/l1p_msgt.h @ 286:840113655bbf

GTA0x target: mux DSR_MODEM/LPG signal to LPG in init.c to avoid floating
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 08 Aug 2017 02:50:13 +0000
parents 945cf7f506b2
children
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1P_MSGT.H
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4 *
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5 * Filename l1p_msgt.h
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9
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10 /* channels types */
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11 #define L2_PCHANNEL_PCCCH 1
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12 #define L2_PCHANNEL_PBCCH 2
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13 #define L2_PCHANNEL_PPCH 3
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14 #define L2_PCHANNEL_PEPCH 4
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15 #define L2_PCHANNEL_PACCH 5
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16
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17
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18 typedef struct
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19 {
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20 UWORD8 txpwr;
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21 UWORD16 rand;
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22 UWORD16 channel_request_data;
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23 UWORD8 bs_prach_blks;
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24 UWORD8 access_burst_type;
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25 }
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26 T_MPHP_RA_REQ;
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27
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28 typedef struct
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29 {
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30 UWORD32 fn;
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31 UWORD16 channel_request_data;
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32 }
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33 T_MPHP_RA_CON;
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34
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35 typedef struct
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36 {
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37 UWORD8 pol_resp_type;
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38 UWORD8 channel_request_data[24];
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39 UWORD32 fn;
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40 UWORD8 timing_advance;
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41 UWORD8 txpwr;
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42 }
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43 T_MPHP_POLLING_RESPONSE_REQ;
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44
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45 typedef struct
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46 {
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47 UWORD32 fn;
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48 }
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49 T_MPHP_POLLING_IND;
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50
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52 typedef struct
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53 {
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54 UWORD8 ta;
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55 UWORD8 ta_index;
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56 UWORD8 ta_tn;
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57 }
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58 T_PACKET_TA;
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59
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61 typedef struct
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62 {
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63 BOOL present;
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64 UWORD32 absolute_fn;
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65 }
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66 T_TBF_STI;
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67
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68
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69 typedef struct
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70 {
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71 T_CHN_SEL chan_sel;
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72 T_MOBILE_ALLOCATION freq_list;
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73 }
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74 T_PACKET_FREQ_PARAM;
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75
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76
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77 typedef struct
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78 {
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79 UWORD8 ctrl_timeslot;
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80 UWORD8 bitmap_length;
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81 UWORD8 bitmap[127];
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82 }
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83 T_FIXED_ALLOC;
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84
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85
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86 typedef struct
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87 {
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88 UWORD8 usf_table[8];
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89 BOOL usf_granularity;
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90 }
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91 T_DYNAMIC_ALLOC;
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92
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93
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94 typedef struct
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95 {
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96 UWORD8 tfi;
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97 UWORD8 timeslot_alloc;
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98 }
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99 T_DL_RESSOURCE_ALLOC;
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100
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101
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102 typedef struct
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103 {
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104 UWORD8 tfi;
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105 UWORD8 timeslot_alloc;
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106 T_DYNAMIC_ALLOC dynamic_alloc;
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107 T_FIXED_ALLOC fixed_alloc;
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108 }
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109 T_UL_RESSOURCE_ALLOC;
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110
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111 typedef struct
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112 {
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113 UWORD8 p0;
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114 BOOL bts_pwr_ctl_mode;
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115 BOOL pr_mode;
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116 }
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117 T_DL_POWER_CTL;
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118
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119 typedef struct
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120 {
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121 UWORD8 assignment_id;
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122 UWORD8 assignment_command;
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123 UWORD8 multislot_class;
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124 BOOL interf_meas_enable;
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125 BOOL pc_meas_chan;
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126 BOOL access_burst_type;
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127 T_PACKET_TA packet_ta;
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128 T_DL_POWER_CTL dl_pwr_ctl;
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129 UWORD8 tsc;
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130 T_PACKET_FREQ_PARAM freq_param;
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131 T_TBF_STI tbf_sti;
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132 UWORD8 mac_mode;
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diff changeset
133 T_DL_RESSOURCE_ALLOC dl_ressource_alloc;
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134 T_UL_RESSOURCE_ALLOC ul_ressource_alloc;
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diff changeset
135 }
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diff changeset
136 T_MPHP_ASSIGNMENT_REQ;
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diff changeset
137
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parents:
diff changeset
138
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diff changeset
139 typedef struct
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diff changeset
140 {
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diff changeset
141 BOOL repeat_allocation;
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parents:
diff changeset
142 UWORD8 ts_override;
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diff changeset
143 T_TBF_STI tbf_sti;
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diff changeset
144 }
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diff changeset
145 T_MPHP_REPEAT_UL_FIXED_ALLOC_REQ;
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146
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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147
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148 typedef struct
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149 {
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150 UWORD8 assignment_id;
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diff changeset
151 UWORD8 purpose;
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152 BOOL pc_meas_chan;
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153 BOOL access_burst_type;
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diff changeset
154 T_PACKET_TA packet_ta;
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155 T_DL_POWER_CTL dl_pwr_ctl;
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156 UWORD8 tsc;
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diff changeset
157 T_PACKET_FREQ_PARAM freq_param;
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158 T_TBF_STI tbf_sti;
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159 UWORD8 timeslot_number;
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160 UWORD8 data_array[23];
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161 }
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162 T_MPHP_SINGLE_BLOCK_REQ;
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163
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164 typedef struct
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parents:
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165 {
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166 UWORD8 assignment_id;
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parents:
diff changeset
167 UWORD8 purpose;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 UWORD8 status;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
169 BOOL dl_error_flag;
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diff changeset
170 UWORD8 data_array[23];
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171 }
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diff changeset
172 T_MPHP_SINGLE_BLOCK_CON;
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173
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174 typedef struct
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 {
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diff changeset
176 UWORD8 assignment_id;
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177 UWORD8 timeslot_available;
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178 }
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diff changeset
179 T_MPHP_PDCH_RELEASE_REQ;
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180
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
181
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
182 typedef struct
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 {
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diff changeset
184 UWORD8 assignment_id;
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diff changeset
185 T_PACKET_TA packet_ta;
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186 }
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187 T_MPHP_TIMING_ADVANCE_REQ;
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188
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
189
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190 typedef struct
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 {
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
192 UWORD8 tbf_type;
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diff changeset
193 }
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diff changeset
194 T_MPHP_TBF_RELEASE_REQ;
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195
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196 /****************************************************************/
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diff changeset
197 /* Structure definition for L3 <-> L1 messages */
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198 /****************************************************************/
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199
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200 // Packet Channel Description: arfcn/Hopping description + TN + TSC
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201 typedef struct
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parents:
diff changeset
202 {
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diff changeset
203 T_CHN_SEL chan_sel;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
204 UWORD8 timeslot_no;
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diff changeset
205 UWORD8 tsc;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
207 T_PACKET_CHANNEL_DESC;
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diff changeset
208
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
209 typedef struct
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 {
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
211 UWORD16 imsimod;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
212 UWORD16 kcn;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
213 UWORD16 split_pg_cycle;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
214 UWORD8 bs_pag_blks_res;
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diff changeset
215 UWORD8 bs_pbcch_blks;
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diff changeset
216 UWORD8 pb;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 UWORD8 page_mode;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
218 T_PACKET_CHANNEL_DESC packet_chn_desc;
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diff changeset
219 T_MOBILE_ALLOCATION frequency_list;
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diff changeset
220 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
221 T_MPHP_START_PCCCH_REQ;
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diff changeset
222
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
223 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
225 UWORD16 radio_freq;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
226 UWORD8 l2_channel;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
227 BOOL error_flag;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
228 T_RADIO_FRAME l2_frame;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
229 UWORD8 relative_position;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
230 WORD8 pccch_lev;
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diff changeset
231 UWORD32 fn;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
232 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
233 T_MPHP_DATA_IND;
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diff changeset
234
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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diff changeset
235 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
237 UWORD8 nbr_psi;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
238 UWORD8 bs_pbcch_blks;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
239 UWORD8 pb;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
240 UWORD8 psi1_repeat_period;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 UWORD8 relative_position_array[20];
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff changeset
242 T_PACKET_CHANNEL_DESC packet_chn_desc;
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diff changeset
243 T_MOBILE_ALLOCATION frequency_list;
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
244 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
245 T_MPHP_SCELL_PBCCH_REQ;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
247 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
249 UWORD8 nb_carrier;
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Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
250 UWORD16 radio_freq_no[33];
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 UWORD8 list_id;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
253 T_MPHP_CR_MEAS_REQ;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
257 WORD8 rxlev;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
259 T_NCELL_MEAS;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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260
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diff changeset
261 typedef struct
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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262 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263 UWORD8 nmeas;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 T_NCELL_MEAS ncell_meas[33];
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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parents:
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265 UWORD8 list_id;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266 UWORD16 reporting_period;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 }
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diff changeset
268 T_MPHP_CR_MEAS_IND;
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parents:
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269
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diff changeset
270 typedef struct
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 WORD16 acc_level [33];
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273 UWORD8 acc_nbmeas[33];
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274 UWORD8 list_id;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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275 }
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diff changeset
276 T_MPHP_TCR_MEAS_IND;
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parents:
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277
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278 typedef struct
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280 T_PACKET_FREQ_PARAM packet_intm_freq_param;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281 UWORD8 carrier_id;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282 UWORD8 tn;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283 UWORD8 multislot_class;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284 }
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285 T_MPHP_INT_MEAS_REQ;
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parents:
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286
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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287 typedef struct
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
288 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
289 WORD8 rxlev[2];
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291 T_INT_MEAS;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 typedef struct
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
295 T_INT_MEAS int_meas[8];
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296 UWORD8 id;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
297 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
298 T_MPHP_INT_MEAS_IND;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
299
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
300 typedef struct
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
301 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
302 WORD8 rxlev[8];
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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303 UWORD32 fn;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
304 UWORD8 position;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
305 UWORD8 meas_bitmap;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
306 } T_L1P_ITMEAS_IND;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
307
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
308 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
309 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
310 UWORD8 bs_pbcch_blks;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
311 UWORD8 pb;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
312 UWORD8 psi1_repeat_period;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
313 UWORD8 relative_position;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
314 T_PACKET_CHANNEL_DESC packet_chn_desc;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
315 T_MOBILE_ALLOCATION frequency_list;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
316 UWORD16 bcch_carrier;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
317 UWORD32 fn_offset;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
318 UWORD32 time_alignment;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
319 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
320 T_MPHP_NCELL_PBCCH_REQ;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
321
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
322 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
323 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
324 UWORD8 pb;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
325 BOOL access_burst_type;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
326 }
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
327 T_MPHP_UPDATE_PSI_PARAM_REQ;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
328
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
329 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
330 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
331 BOOL released_all;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
332 UWORD8 tbf_type;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
333 WORD8 tn_difference;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
334 } T_L1P_TBF_RELEASED;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
335
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
336 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
337 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
338 UWORD8 tbf_type;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
339 } T_MPHP_TBF_RELEASE_CON;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
340
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
341 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
342 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
343 UWORD8 assignment_id;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
344 } T_MPHP_PDCH_RELEASE_CON;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
345
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
346 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
347 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
348 UWORD8 assignment_id;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
349 WORD8 tn_difference;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
350 BOOL Transfer_update; // Detect transition IDLE => Packet Transfer
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
351 } T_L1P_TRANSFER_DONE;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
352
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
353 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
354 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
355 UWORD8 assignment_id;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
356 WORD8 tn_difference;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
357 } T_L1P_PDCH_RELEASE_CON;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
358
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
359 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
360 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
361 WORD8 tn_difference;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
362 } T_L1P_REPEAT_ALLOC_DONE;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 typedef struct
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
365 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
366 WORD8 tn_difference;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
367 } T_L1P_ALLOC_EXHAUST_DONE;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
368
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
369 typedef T_MPHP_DATA_IND T_MPHP_NCELL_PBCCH_IND;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
370 typedef T_MPHP_CR_MEAS_IND T_L1P_CR_MEAS_DONE;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
371 typedef T_MPHP_TCR_MEAS_IND T_L1P_TCR_MEAS_DONE;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
372 typedef T_MPHP_CR_MEAS_REQ T_MPHP_TCR_MEAS_REQ;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
373 typedef T_MPHP_PDCH_RELEASE_CON T_MPHP_TIMING_ADVANCE_CON;
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
374 typedef T_MPHP_PDCH_RELEASE_CON T_MPHP_ASSIGNMENT_CON;