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annotate cdg211/cdginc/p_cgrlc.val @ 662:8cd8fd15a095

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SIM speed enhancement re-enabled and made configurable TI's original code supported SIM speed enhancement, but Openmoko had it disabled, and OM's disabling of speed enhancement somehow caused certain SIM cards to start working which didn't work before (OM's bug #666). Because our FC community is much smaller in year 2020 than OM's community was in their day, we are not able to find one of those #666-affected SIMs, thus the real issue they had encountered remains elusive. Thus our solution is to re-enable SIM speed enhancement and simply wait for if and when someone runs into a #666-affected SIM once again. We provide a SIM_allow_speed_enhancement global variable that allows SIM speed enhancement to be enabled or disabled per session, and an /etc/SIM_spenh file in FFS that allows it to enabled or disabled on a non-volatile basis. SIM speed enhancement is now enabled by default.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 24 May 2020 05:02:28 +0000
parents 56abf6cf8a0b
children
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1 /*
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2 +--------------------------------------------------------------------------+
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3 | PROJECT : PROTOCOL STACK |
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4 | FILE : p_cgrlc.val |
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5 | SOURCE : "__out__\g23m_dfile\prim\cgrlc.pdf" |
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6 | LastModified : "2004-05-17" |
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7 | IdAndVersion : "8010.119.008.04" |
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8 | SrcFileTime : "Mon Apr 24 15:43:20 2006" |
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9 | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:15 2007 |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
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11 +--------------------------------------------------------------------------+
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12 */
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13
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14 /* PRAGMAS
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15 * PREFIX : CGRLC
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16 * COMPATIBILITY_DEFINES : NO
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO
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18 * ENABLE_GROUP: NO
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19 * CAPITALIZE_TYPENAME: NO
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20 */
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21
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22
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23 #ifndef P_CGRLC_VAL
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24 #define P_CGRLC_VAL
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27 #define CDG_ENTER__P_CGRLC_VAL
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29 #define CDG_ENTER__FILENAME _P_CGRLC_VAL
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30 #define CDG_ENTER__P_CGRLC_VAL__FILE_TYPE CDGINC
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31 #define CDG_ENTER__P_CGRLC_VAL__LAST_MODIFIED _2004_05_17
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32 #define CDG_ENTER__P_CGRLC_VAL__ID_AND_VERSION _8010_119_008_04
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33
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34 #define CDG_ENTER__P_CGRLC_VAL__SRC_FILE_TIME _Mon_Apr_24_15_43_20_2006
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35
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36 #include "CDG_ENTER.h"
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38 #undef CDG_ENTER__P_CGRLC_VAL
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40 #undef CDG_ENTER__FILENAME
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41
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42
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43 /*
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44 * Value constants for VAL_access_type
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45 */
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46 #define CGRLC_AT_NULL (0x0) /* No access is required */
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47 #define CGRLC_AT_ONE_PHASE (0x1) /* One phase access requested. */
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48 #define CGRLC_AT_TWO_PHASE (0x2) /* Two phase access requested. */
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49 #define CGRLC_AT_SHORT_ACCESS (0x3) /* Short access requested. */
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50 #define CGRLC_AT_PAGE_RESPONSE (0x4) /* Page response requested. */
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51 #define CGRLC_AT_CELL_UPDATE (0x5) /* Access for cell update primitive requested. */
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52 #define CGRLC_AT_MM_PROCEDURE (0x6) /* Access for MM/GMM primitive requested. */
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53 #define CGRLC_AT_SINGLE_BLOCK (0x7) /* Only used in GRR: access for single block without TBF */
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54
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55 /*
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56 * Value constants for VAL_dl_timeslot_offset
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57 */
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58 #define CGRLC_TEST_TN0 (0x0) /* Downlink timeslot offset 0. */
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59 #define CGRLC_TEST_TN1 (0x1) /* Downlink timeslot offset 1. */
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60 #define CGRLC_TEST_TN2 (0x2) /* Downlink timeslot offset 2. */
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61 #define CGRLC_TEST_TN3 (0x3) /* Downlink timeslot offset 3. */
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62 #define CGRLC_TEST_TN4 (0x4) /* Downlink timeslot offset 4. */
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63 #define CGRLC_TEST_TN5 (0x5) /* Downlink timeslot offset 5. */
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64 #define CGRLC_TEST_TN6 (0x6) /* Downlink timeslot offset 6. */
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65 #define CGRLC_TEST_TN7 (0x7) /* Downlink timeslot offset 7. */
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66
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67 /*
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68 * Value constants for VAL_failure
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69 */
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70 #define CGRLC_ACCESS_2_NETWORK_NOT_ALLOWED (0x0) /* Access to the network is not allowed. */
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71 #define CGRLC_PACKET_ACCESS_FAILURE (0x1) /* Failure during packet access procedure, e.g. T3162 expired. */
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72 #define CGRLC_RLC_MAC_ERROR (0x2) /* T3168 expires during contention resolution. */
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73 #define CGRLC_TLLI_MISMATCH (0x3) /* TLLI mismatch has occurred. */
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74 #define CGRLC_TBF_ESTABLISHMENT_FAILURE (0x4) /* T3164 expires or failure occurs due to any other reason. */
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75 #define CGRLC_RESUMPTION_FAILURE (0x5) /* Resumption failure after dedicated mode was left. */
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76 #define CGRLC_CONTENTION_RESOLUTION_FAILED (0x6) /* Contention Resolution has failed. */
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77
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78 /*
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79 * Value constants for VAL_prim_status
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80 */
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81 #define CGRLC_PRIM_STATUS_NULL (0x0) /* No primitives shall be deleted. */
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82 #define CGRLC_PRIM_STATUS_ONE (0x1) /* One primitive shall be deleted. */
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83 #define CGRLC_PRIM_STATUS_TBF (0x2) /* All primitives, which belongs to the current TBF, shall be deleted. */
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84 #define CGRLC_PRIM_STATUS_ALL (0xff) /* All primitives shall be deleted. */
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85
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86 /*
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87 * Value constants for VAL_prim_type
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88 */
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89 #define CGRLC_PRIM_TYPE_GMM (0x0) /* At least one GMM primitive was confirmed. */
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90 #define CGRLC_PRIM_TYPE_OTHER (0x1) /* No GMM primitive was confirmed. Other User data was confirmed. */
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91
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92 /*
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93 * Value constants for VAL_tbf_rel_cause
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94 */
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95 #define CGRLC_TBF_REL_NORMAL (0x0) /* Normal TBF release is or shall be performed. */
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96 #define CGRLC_TBF_REL_ABNORMAL (0x1) /* Abnormal TBF release is or shall be performed. */
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97 #define CGRLC_TBF_REL_CR_FAILED (0x2) /* Contention resolution failed */
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98 #define CGRLC_TBF_REL_WITH_CELL_RESELECT (0x3) /* TBF release with cell reselection */
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99
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100 /*
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101 * Value constants for VAL_starting_time
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102 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
103 #define CGRLC_STARTING_TIME_NOT_PRESENT (0xffffffff)/* No TBF starting time present. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
104
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
105 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
106 * Value constants for VAL_test_mode_flag
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
107 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
108 #define CGRLC_TEST_RANDOM (0x0) /* Pseudo random data. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
109 #define CGRLC_LOOP (0x1) /* Loop back. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
110 #define CGRLC_TEST_MODE_RELEASE (0xfe) /* used in GRLC, intermediate status during release procedure */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
111 #define CGRLC_NO_TEST_MODE (0xff) /* No testmode active */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
112
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
113 /*
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
114 * Value constants for VAL_ti
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
115 */
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
116 #define CGRLC_TLLI_NOT_PRESENT (0x0) /* TLLI shall not be sent in the RLC data block. */
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
117 #define CGRLC_TLLI_PRESENT (0x1) /* TLLI shall be sent in the RLC data block. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 /*
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 * Value constants for VAL_cs_mode
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121 */
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 #define CGRLC_CS_MODE_1 (0x0) /* Coding scheme 1. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 #define CGRLC_CS_MODE_2 (0x1) /* Coding scheme 2. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 #define CGRLC_CS_MODE_3 (0x2) /* Coding scheme 3. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 #define CGRLC_CS_MODE_4 (0x3) /* Coding scheme 4. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 * Value constants for VAL_tlli_cs_mode
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 #define CGRLC_TLLI_CS_MODE_1 (0x0) /* CS 1 shall be used during Contention resolution. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 #define CGRLC_TLLI_CS_MODE_DEF (0x1) /* Default coding scheme shall be used during Contention resolution. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 /*
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 * Value constants for VAL_mac_mode
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 */
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 #define CGRLC_MAC_MODE_DA (0x0) /* Dynamic allocation. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 #define CGRLC_MAC_MODE_EDA (0x1) /* Extended dynamic allocation. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 #define CGRLC_MAC_MODE_FA (0x2) /* Fixed allocation. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 #define CGRLC_MAC_MODE_FA_HD (0x3) /* Fixed allocation, half duplex mode. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 /*
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 * Value constants for VAL_queue_mode
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 */
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 #define CGRLC_QUEUE_MODE_DEFAULT (0x0) /* Use current queue. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 #define CGRLC_QUEUE_MODE_GMM (0x1) /* Use GMM queue (RAU procedure). */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 #define CGRLC_QUEUE_MODE_LLC (0x2) /* Use LLC queue. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 * Value constants for VAL_rlc_mode
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 #define CGRLC_RLC_MODE_ACK (0x0) /* RLC acknowledged mode. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 #define CGRLC_RLC_MODE_UACK (0x1) /* RLC unacknowledged mode. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 * Value constants for VAL_tbf_mode
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 #define CGRLC_TBF_MODE_NULL (0x0) /* No tbf active, used in GRR */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 #define CGRLC_TBF_MODE_ACCESS_FAILED (0x1) /* Access has failed. GRLC handles prim queue. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 #define CGRLC_TBF_MODE_DL (0x2) /* Downlink TBF is assigned/released. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 #define CGRLC_TBF_MODE_UL (0x3) /* Uplink TBF is assigned/released. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 #define CGRLC_TBF_MODE_TMA (0x4) /* Uplink TBF for Testmode A is assigned. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 #define CGRLC_TBF_MODE_TMB (0x5) /* Uplink TBF for Testmode B is assigned. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 #define CGRLC_TBF_MODE_DL_UL (0x6) /* Uplink and Downlink TBF assigned/released. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 #define CGRLC_TBF_MODE_ESTABLISHMENT_FAILURE (0x7)/* T3164 expires or failure occurs due to any other reason */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 * Value constants for VAL_rxlev
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 #define CGRLC_RXLEV_MIN (0x0) /* Minimum receive signal level value. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 #define CGRLC_RXLEV_MAX (0x3f) /* Maximum receive signal level value. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 #define CGRLC_RXLEV_NONE (0x80) /* Specific value used to indicate that no new RX value is present or RX value is invalid. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 * Value constants for VAL_alpha
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 #define CGRLC_ALPHA_INVALID (0xff) /* No alpha value is available. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 * Value constants for VAL_pc_meas_chan
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 #define CGRLC_MEAS_CHAN_BCCH (0x0) /* Downlink measurements for power control shall be made on BCCH. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 #define CGRLC_MEAS_CHAN_PDCH (0x1) /* Downlink measurements for power control shall be made on PDCH. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 * Value constants for VAL_gamma_ch
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 #define CGRLC_GAMMA_INVALID (0xff) /* No GCH is available. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 * Value constants for VAL_disable_class
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 #define CGRLC_DISABLE_CLASS_NULL (0x0) /* Initial state of the disable class */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 #define CGRLC_DISABLE_CLASS_OTHER (0x1) /* Any other cause for disable class */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 #define CGRLC_DISABLE_CLASS_CR (0x2) /* Disable cause is cell reselection */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 * Value constants for VAL_poll_b_type
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 #define CGRLC_POLL_NONE (0x0) /* No poll position present,only in grlc */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 #define CGRLC_POLL_COLLISION (0x1) /* Collision detected, only in grlc */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 #define CGRLC_POLL_DATA (0x2) /* Poll for dl ack/nack, only in grlc */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 #define CGRLC_POLL_UACK (0x3) /* Poll for pca uplink tbf relaase */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 #define CGRLC_POLL_CTRL (0x4) /* Default poll for control msg. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 #define CGRLC_POLL_RES_NB (0x5) /* Poll for normal burst with packet polling req */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 #define CGRLC_POLL_RES_AB (0x6) /* Poll for access burst with packet polling req */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 * Value constants for VAL_burst_type
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 #define CGRLC_BURST_TYPE_AB (0x0) /* Access burst */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 #define CGRLC_BURST_TYPE_NB (0x1) /* Normal burst */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 * Value constants for VAL_ab_type
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 #define CGRLC_AB_8_BIT (0x0) /* 8 bit access burst */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 #define CGRLC_AB_11_BIT (0x1) /* 11 bit access burst */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 * Value constants for VAL_blk_owner
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 #define CGRLC_BLK_OWNER_CTRL (0x0) /* Owner is service ctrl (GRR). */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 #define CGRLC_BLK_OWNER_CS (0x1) /* Owner is service cs (GRR). */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 #define CGRLC_BLK_OWNER_TM (0x2) /* Owner is service tm (GRLC). */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 #define CGRLC_BLK_OWNER_MEAS (0x3) /* Owner is service meas (GRR). */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 #define CGRLC_BLK_OWNER_NONE (0x4) /* Owner is not specified */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 * Value constants for VAL_cu_cause
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 #define CGRLC_RA_DEFAULT (0x0) /* No action required */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 #define CGRLC_RA_CU (0x1) /* Next packet access cause will be cell update */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 * Value constants for VAL_pmax
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 #define CGRLC_NO_UPDATE_N3102 (0xff) /* N3102 shall not be updated */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 * Value constants for VAL_llc_prim_type
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 #define CGRLC_LLC_PRIM_TYPE_NULL (0x0) /* No primitive available */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243 #define CGRLC_LLC_PRIM_TYPE_DATA_REQ (0x1) /* GRLC_DATA_REQ */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 #define CGRLC_LLC_PRIM_TYPE_UNITDATA_REQ (0x2) /* GRLC_UNITDATA_REQ */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 * Value constants for VAL_ac_class
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 #define CGRLC_CCCH_AC_NOT_ALLOWED (0x8) /* CCCH access control class not allowed */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250 #define CGRLC_PCCCH_AC_NOT_ALLOWED (0x9) /* PCCCH access control class not allowed */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 #define CGRLC_PCCCH_AC_ALLOWED (0xa) /* PCCCH access control class allowed */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 * Value constants for VAL_enable_cause
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 #define CGRLC_ENAC_NORMAL (0x0) /* Normal Operation */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257 #define CGRLC_ENAC_ABNORM_RELEASE_CRESELECT_FAILED (0x1)/* Abnormal Release with Cell Re-Selection has Failed */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260 * Value constants for VAL_rlc_db_granted
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 #define CGRLC_OPEN_ENDED_TBF (0x0) /* Open ended tbf */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
265 * Value constants for VAL_t3314_val
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 #define CGRLC_STANDBY (0x0) /* MS always in STANDBY state. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
268 #define CGRLC_T3314_DEFAULT (0xabe0) /* Default timeout value for T3314. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
269 #define CGRLC_DEACTIVATED (0xffffffff)/* MS always in READY state. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 * Value constants for VAL_pdch_band
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274 #define CGRLC_GSM_400 (0x0) /* GSM 400MHz Band. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
275 #define CGRLC_GSM_850 (0x1) /* GSM 850MHz Band. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
276 #define CGRLC_GSM_900 (0x2) /* GSM 900MHz Band. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
277 #define CGRLC_DCS_1800 (0x3) /* DCS 1800MHz Band. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
278 #define CGRLC_PCS_1900 (0x4) /* PCS 1900MHz Band. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281 * Value constants for VAL_ilev
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283 #define CGRLC_ILEV_MIN (0x0) /* Minimum interference level value. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284 #define CGRLC_ILEV_MAX (0x3f) /* Maximum interference level value. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285 #define CGRLC_ILEV_NONE (0x80) /* Specific value used to indicate that no new interference level value is present or interference level value is invalid. */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
286
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
287 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
288 * user defined constants
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
289 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 #define CGRLC_MAX_CTRL_MSG_SIZE (0x17)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291 #define CGRLC_MAX_TIMESLOTS (0x8)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 #include "CDG_LEAVE.h"
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294
56abf6cf8a0b cdg211: cdginc/mdf/pdf files from TCS211-20070608
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
295
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296 #endif