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annotate cdg211/cdginc/p_t30.val @ 662:8cd8fd15a095

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SIM speed enhancement re-enabled and made configurable TI's original code supported SIM speed enhancement, but Openmoko had it disabled, and OM's disabling of speed enhancement somehow caused certain SIM cards to start working which didn't work before (OM's bug #666). Because our FC community is much smaller in year 2020 than OM's community was in their day, we are not able to find one of those #666-affected SIMs, thus the real issue they had encountered remains elusive. Thus our solution is to re-enable SIM speed enhancement and simply wait for if and when someone runs into a #666-affected SIM once again. We provide a SIM_allow_speed_enhancement global variable that allows SIM speed enhancement to be enabled or disabled per session, and an /etc/SIM_spenh file in FFS that allows it to enabled or disabled on a non-volatile basis. SIM speed enhancement is now enabled by default.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 24 May 2020 05:02:28 +0000
parents 56abf6cf8a0b
children
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1 /*
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2 +--------------------------------------------------------------------------+
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3 | PROJECT : PROTOCOL STACK |
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4 | FILE : p_t30.val |
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5 | SOURCE : "__out__\g23m_dfile\prim\t30.pdf" |
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6 | LastModified : "2002-04-23" |
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7 | IdAndVersion : "8411.104.98.312" |
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8 | SrcFileTime : "Mon Nov 24 15:49:20 2003" |
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9 | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:16 2007 |
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10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
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11 +--------------------------------------------------------------------------+
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12 */
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13
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14 /* PRAGMAS
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15 * PREFIX : NONE
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16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
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17 * ALWAYS_ENUM_IN_VAL_FILE: NO
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18 * ENABLE_GROUP: NO
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19 * CAPITALIZE_TYPENAME: NO
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20 */
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21
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22
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23 #ifndef P_T30_VAL
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24 #define P_T30_VAL
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27 #define CDG_ENTER__P_T30_VAL
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28
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29 #define CDG_ENTER__FILENAME _P_T30_VAL
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30 #define CDG_ENTER__P_T30_VAL__FILE_TYPE CDGINC
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31 #define CDG_ENTER__P_T30_VAL__LAST_MODIFIED _2002_04_23
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32 #define CDG_ENTER__P_T30_VAL__ID_AND_VERSION _8411_104_98_312
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33
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34 #define CDG_ENTER__P_T30_VAL__SRC_FILE_TIME _Mon_Nov_24_15_49_20_2003
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35
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36 #include "CDG_ENTER.h"
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38 #undef CDG_ENTER__P_T30_VAL
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40 #undef CDG_ENTER__FILENAME
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41
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42
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43 /*
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44 * Value constants for VAL_dir
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45 */
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46 #define DIR_SND (0x0) /* send fax data */
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47 #define DIR_RCV (0x1) /* receive fax data */
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48
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49 /*
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50 * Value constants for VAL_sgn
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51 */
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52 #define SGN_OK (0x0) /* OK */
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53 #define SGN_DIS (0x1) /* Digital identification signal */
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54 #define SGN_CSI (0x2) /* Called subscriber identification */
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55 #define SGN_NSF (0x4) /* Non-standard facilities */
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56 #define SGN_CFR (0x21) /* Confirmation to receive */
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57 #define SGN_FTT (0x22) /* Failure to train */
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58 #define SGN_MCF (0x31) /* Message confirmation */
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59 #define SGN_RTN (0x32) /* Retrain negative */
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60 #define SGN_RTP (0x33) /* Retrain positive */
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61 #define SGN_PIN (0x34) /* Procedure interrupt negative */
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62 #define SGN_PIP (0x35) /* Procedure interrupt positive */
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63 #define SGN_FDM (0x3f) /* File diagnostics message */
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64 #define SGN_DCS (0x41) /* Digital command signal */
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65 #define SGN_TSI (0x42) /* Transmitting subscriber identification */
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66 #define SGN_SUB (0x43) /* Subaddress */
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67 #define SGN_NSS (0x44) /* Non-standard set-up */
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68 #define SGN_PWDR (0x45) /* Password - receive */
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69 #define SGN_TCF (0x4f) /* Training check frame */
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70 #define SGN_CRP (0x58) /* Command repeat */
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71 #define SGN_DCN (0x5f) /* Disconnect */
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72 #define SGN_EOM (0x71) /* End of message */
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73 #define SGN_MPS (0x72) /* Multi-page signal */
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74 #define SGN_EOP (0x74) /* End of procedure */
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75 #define SGN_PRI_EOM (0x79) /* Procedure Interrupt - End Of Message */
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76 #define SGN_PRI_MPS (0x7a) /* Procedure Interrupt - MultiPage Signal */
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77 #define SGN_PRI_EOP (0x7c) /* Procedure Interrupt - End Of Procedure */
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78 #define SGN_DTC (0x81) /* Digital transmit command */
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79 #define SGN_CIG (0x82) /* Calling subscriber identification */
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80 #define SGN_PWDS (0x83) /* Password - send */
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81 #define SGN_NSC (0x84) /* Non-standard facilities command */
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82 #define SGN_SEP (0x85) /* Selective Polling */
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83 #define SGN_FCS_ERR (0xf1) /* FCS error */
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84 #define SGN_NO_RES (0xf2) /* No response */
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85 #define SGN_CONT (0xf3) /* continue */
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86 #define SGN_NOT_USED (0xff) /* Not used */
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87
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88 /*
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89 * Value constants for VAL_cmpl
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90 */
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91 #define CMPL_EOP (0x0) /* end of procedure */
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92 #define CMPL_EOM (0x1) /* end of message */
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93 #define CMPL_PI (0x2) /* procedure interrupt */
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94 #define CMPL_DCN (0x3) /* disconnect */
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95
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96 /*
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97 * Value constants for VAL_cause
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98 */
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99 #define ERR_PH_A_UNSPEC (0x4d10) /* unspecified phase A error */
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100 #define ERR_PH_A_T1_TIMEOUT (0x4d11) /* no answer (T30 T1 timeout) */
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101 #define ERR_PH_B_SND_UNSPEC (0x4d20) /* unspecified transmit phase B error */
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102 #define ERR_PH_B_SND_CANT_RCV_OR_SND (0x4d21) /* remote cannot receive or send */
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103 #define ERR_PH_B_SND_COMREC (0x4d22) /* COMREC error in transmit phase B */
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104 #define ERR_PH_B_SND_COMREC_INVALID_CMD_RCVD (0x4d23)/* COMREC invalid command received */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
105 #define ERR_PH_B_SND_RSPREC (0x4d24) /* RSPREC transmit error phase B */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
106 #define ERR_PH_B_SND_DCS_RPTD_3_TIMES (0x4d25) /* DCS send three times without response */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
107 #define ERR_PH_B_SND_DIS_DTC_RCVD_3_TIMES (0x4d26)/* DIS/DTC received 3 times; DCS not recognized */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
108 #define ERR_PH_B_SND_FTT_2400 (0x4d27) /* failure to train at 2400 bit/s or +FMS value */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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109 #define ERR_PH_B_SND_INVALID_RESP_RCVD (0x4d28) /* invalid respones received */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
110 #define ERR_PH_C_SND_UNSPEC (0x4d40) /* unspecified transmit phase C error */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
111 #define ERR_PH_C_SND_UNSPEC_IMAGE_CONV (0x4d41) /* unspecified image format error */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
112 #define ERR_PH_C_SND_DTE_TO_DTC_DATA_UNDERFLOW (0x4d43)/* DTE to DTC data underflow */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
113 #define ERR_PH_C_SND_UNRECOG_TRANSP_DATA_CMD (0x4d44)/* unrecognized transparent data command */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
114 #define ERR_PH_C_SND_IMAGE_LINE_LENGTH (0x4d45) /* image error, line length wrong */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
115 #define ERR_PH_C_SND_IMAGE_PAGE_LENGTH (0x4d46) /* image error, page length wrong */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
116 #define ERR_PH_C_SND_IMAGE_COMPRESSION_MODE (0x4d47)/* image error, compression mode wrong */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
117 #define ERR_PH_D_SND_UNSPEC (0x4d50) /* unspecified transmit phase D error */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118 #define ERR_PH_D_SND_RSPREC (0x4d51) /* RESPREC transmit error phase D */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 #define ERR_PH_D_SND_MPS_RPTD_3_TIMES (0x4d52) /* no response to MPS repeated 3 times */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 #define ERR_PH_D_SND_INVALID_RESP_TO_MPS (0x4d53) /* invalid respones to MPS */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121 #define ERR_PH_D_SND_EOP_RPTD_3_TIMES (0x4d54) /* no response to EOP repeated 3 times */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 #define ERR_PH_D_SND_INVALID_RESP_TO_EOP (0x4d55) /* invalid response to EOP */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 #define ERR_PH_D_SND_EOM_RPTD_3_TIMES (0x4d56) /* no response to EOM repeated 3 times */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 #define ERR_PH_D_SND_INVALID_RESP_TO_EOM (0x4d57) /* invalid response to EOM */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 #define ERR_PH_D_SND_UNABLE_TO_CONT (0x4d58) /* unable to continue after PIN or PIP */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 #define ERR_PH_B_RCV_UNSPEC (0x4d70) /* unspecified receive phase B error */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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127 #define ERR_PH_B_RCV_RSPREC (0x4d71) /* RSPREC receive error phase B */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 #define ERR_PH_B_RCV_COMREC (0x4d72) /* COMREC error in receive phase B */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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129 #define ERR_PH_B_RCV_EXP_PAGE_NOT_RCVD (0x4d73) /* T30 T2 timeout, expected page not received */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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130 #define ERR_PH_B_RCV_T1_TIMEOUT_AFTER_EOM_RCVD (0x4d74)/* T30 T1 timeout after EOM received */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 #define ERR_PH_C_RCV_UNSPEC (0x4d90) /* unspecified receive phase C error */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 #define ERR_PH_C_RCV_EOL_MISSING (0x4d91) /* missing EOL after 5 seconds (3.2/T4) */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 #define ERR_PH_C_RCV_DCE_TO_DTE_BUFFER_OVERFLOW (0x4d93)/* DCE to DTE buffer overflow */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 #define ERR_PH_C_RCV_BAD_CRC_OR_FRAME (0x4d94) /* bad crc or frame (ECM mode) */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 #define ERR_PH_D_RCV_UNSPEC (0x4da0) /* unspecified receive phase D error */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 #define ERR_PH_D_RCV_RSPREC_INVALID_RESP_RCVD (0x4da1)/* RSPREC invalid respones received */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 #define ERR_PH_D_RCV_COMREC_INVALID_RESP_RCVD (0x4da2)/* COMREC invalid respones received */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 #define ERR_PH_D_RCV_UNABLE_TO_CONT (0x4da3) /* unable to continue after PIN or PIP */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 #define ERR_PH_B_SND_RESERVED1 (0xcde0) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 #define ERR_PH_B_SND_RESERVED2 (0xcde1) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 #define ERR_PH_B_SND_RESERVED3 (0xcde2) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 #define ERR_PH_C_SND_RESERVED1 (0xcde3) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 #define ERR_PH_C_SND_RESERVED2 (0xcde4) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 #define ERR_PH_D_SND_RESERVED1 (0xcde5) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 #define ERR_PH_D_SND_RESERVED2 (0xcde6) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 #define ERR_PH_D_SND_RESERVED3 (0xcde7) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 #define ERR_PH_B_RCV_NO_RESP (0xcde8) /* T2 timeout, no response */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 #define ERR_PH_B_RCV_INVALID_RESP_RCVD (0xcde9) /* invalid respones received */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 #define ERR_PH_B_RCV_RESERVED3 (0xcdea) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 #define ERR_PH_C_RCV_RESERVED1 (0xcdeb) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 #define ERR_PH_C_RCV_RESERVED2 (0xcdec) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 #define ERR_PH_D_RCV_NO_RESP (0xcded) /* T2 timeout, no response */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 #define ERR_PH_D_RCV_INVALID_RESP_RCVD (0xcdee) /* invalid respones received */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 #define ERR_PH_D_RCV_RESERVED3 (0xcdef) /* reserved */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 #define ERR_SGN_NOT_ALLOWED (0xcdf0) /* signal not allowed */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 #define ERR_CCD_ENC (0xcdf1) /* CCD encoding error */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 * Value constants for VAL_test_mode
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 #define TST_OFF (0x0) /* normal */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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162 #define TST_BCS (0x1) /* test BCS formatter only */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 #define TST_STUFF (0x2) /* stuffing/destuffing off */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 #define TST_FCS (0x4) /* FCS generating/checking off */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 #define TST_CTRL (0x8) /* Control checking off */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 #define TST_RTC (0x10) /* RTC checking off */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 #define TST_MIR (0x20) /* mirror report strings */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 #define TST_BUF (0x80) /* show contents of buffer */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 * Value constants for VAL_bitorder
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 #define FBO_NRM_DATA (0x0) /* no change in bitorder for DATA frames */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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174 #define FBO_NRM_STATUS (0x0) /* no change in bitorder for STATUS frames */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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175 #define FBO_REV_DATA (0x1) /* reverse bitorder only for MSG frames */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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176 #define FBO_REV_STATUS (0x2) /* reverse bitorder only for STATUS frames */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 * Value constants for VAL_phase
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 #define BCS_PHASE (0x0) /* Not a message phase */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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182 #define MSG_PHASE (0x1) /* Message phase (C) */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 * Value constants for VAL_dti_conn
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 #define T30_DISCONNECT_DTI (0x0) /* Disconnect DTI from T30 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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188 #define T30_CONNECT_DTI (0x1) /* Connect DTI to T30 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 * Value constants for VAL_link_id
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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193 #define T30_LINK_ID_DEFAULT (0x0) /* Default link id */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 * Value constants for VAL_dti_direction
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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198 #define T30_DTI_NORMAL (0x0) /* DTI used normally */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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199 #define T30_DTI_INVERTED (0x1) /* DTI is inverted */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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200
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201 /*
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202 * user defined constants
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203 */
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204 #define CSI_LEN (0x14)
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205 #define NSF_LEN (0x5a)
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206 #define CIG_LEN (0x14)
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207 #define NSC_LEN (0x5a)
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208 #define TSI_LEN (0x14)
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209 #define NSS_LEN (0x5a)
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210 #define PWD_LEN (0x14)
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211 #define SUB_LEN (0x14)
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212 #define SEP_LEN (0x14)
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213 #define T30_ENTITY_NAME_LEN (0x6)
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214
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215 #include "CDG_LEAVE.h"
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216
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217
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218 #endif