FreeCalypso > hg > fc-magnetite

annotate cdg3/cdginc-conservative/p_uart.h @ 662:8cd8fd15a095

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SIM speed enhancement re-enabled and made configurable TI's original code supported SIM speed enhancement, but Openmoko had it disabled, and OM's disabling of speed enhancement somehow caused certain SIM cards to start working which didn't work before (OM's bug #666). Because our FC community is much smaller in year 2020 than OM's community was in their day, we are not able to find one of those #666-affected SIMs, thus the real issue they had encountered remains elusive. Thus our solution is to re-enable SIM speed enhancement and simply wait for if and when someone runs into a #666-affected SIM once again. We provide a SIM_allow_speed_enhancement global variable that allows SIM speed enhancement to be enabled or disabled per session, and an /etc/SIM_spenh file in FFS that allows it to enabled or disabled on a non-volatile basis. SIM speed enhancement is now enabled by default.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 24 May 2020 05:02:28 +0000
parents c15047b3d00d
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
16
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 +--------------------------------------------------------------------------+
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 | PROJECT : PROTOCOL STACK |
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 | FILE : p_uart.h |
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 | SOURCE : "sap\uart.pdf" |
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 | LastModified : "2002-03-11" |
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7 | IdAndVersion : "8441.117.99.014" |
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 | SrcFileTime : "Thu Nov 29 09:56:02 2007" |
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9 | Generated by CCDGEN_2.5.5A on Thu Sep 25 09:52:55 2014 |
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! |
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11 +--------------------------------------------------------------------------+
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 /* PRAGMAS
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15 * PREFIX : NONE
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16 * COMPATIBILITY_DEFINES : NO (require PREFIX)
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 * ALWAYS_ENUM_IN_VAL_FILE: NO
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18 * ENABLE_GROUP: NO
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19 * CAPITALIZE_TYPENAME: NO
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
23 #ifndef P_UART_H
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
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24 #define P_UART_H
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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25
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
26
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
27 #define CDG_ENTER__P_UART_H
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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28
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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29 #define CDG_ENTER__FILENAME _P_UART_H
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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30 #define CDG_ENTER__P_UART_H__FILE_TYPE CDGINC
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
31 #define CDG_ENTER__P_UART_H__LAST_MODIFIED _2002_03_11
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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32 #define CDG_ENTER__P_UART_H__ID_AND_VERSION _8441_117_99_014
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
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33
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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34 #define CDG_ENTER__P_UART_H__SRC_FILE_TIME _Thu_Nov_29_09_56_02_2007
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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35
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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36 #include "CDG_ENTER.h"
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
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37
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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38 #undef CDG_ENTER__P_UART_H
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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39
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
40 #undef CDG_ENTER__FILENAME
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
41
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
42
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
43 #include "p_uart.val"
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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44
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
45 #ifndef __T_comPar__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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46 #define __T_comPar__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
47 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
48 * Parameters of serial link
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
49 * CCDGEN:WriteStruct_Count==3110
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
50 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
51 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
52 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
53 U8 speed; /*< 0: 1> baud rate */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
54 U8 bpc; /*< 1: 1> bits per character */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
55 U8 nsb; /*< 2: 1> stop bits */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
56 U8 parity; /*< 3: 1> parity of serial link */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
57 U8 flow_rx; /*< 4: 1> flow control mode RX */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
58 U8 flow_tx; /*< 5: 1> flow control mode TX */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
59 U8 xon_valid; /*< 6: 1> indicator whether xon is valid */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
60 U8 xon; /*< 7: 1> XOn character for XON/XOFF flow control */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
61 U8 xoff_valid; /*< 8: 1> indicator whether xoff is valid */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
62 U8 xoff; /*< 9: 1> XOff character for XON/XOFF flow control */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
63 U8 esc_valid; /*< 10: 1> indicator whether esc_char and esc_gp are valid */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
64 U8 esc_char; /*< 11: 1> escape character */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
65 U16 esc_gp; /*< 12: 2> guard period */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
66 U8 _align0; /*< 14: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
67 U8 _align1; /*< 15: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
68 } T_comPar;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
69 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
70
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
71
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
72 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
73 * End of substructure section, begin of primitive definition section
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
74 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
75
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
76 #ifndef __T_UART_PARAMETERS_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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77 #define __T_UART_PARAMETERS_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
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78 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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79 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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80 * CCDGEN:WriteStruct_Count==3111
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
81 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
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82 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
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83 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
84 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
85 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
86 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
87 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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88 T_comPar comPar; /*< 4: 16> Parameters of serial link */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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89 } T_UART_PARAMETERS_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
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90 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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91
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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92 #ifndef __T_UART_PARAMETERS_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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93 #define __T_UART_PARAMETERS_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
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94 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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95 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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96 * CCDGEN:WriteStruct_Count==3112
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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97 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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98 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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99 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
100 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
101 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
102 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
103 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
104 } T_UART_PARAMETERS_CNF;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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105 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
106
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
107 #ifndef __T_UART_PARAMETERS_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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108 #define __T_UART_PARAMETERS_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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109 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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110 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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111 * CCDGEN:WriteStruct_Count==3113
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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112 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
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113 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
114 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
115 U8 uart_instances; /*< 0: 1> number of UART instances */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
116 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
117 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 } T_UART_PARAMETERS_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 #ifndef __T_UART_DTI_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 #define __T_UART_DTI_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 * CCDGEN:WriteStruct_Count==3114
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 U8 dti_conn; /*< 0: 1> DTI connect */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 U8 device; /*< 1: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 U8 dlci; /*< 2: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 U8 direction; /*< 3: 1> direction of the DTI link */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 U32 link_id; /*< 4: 4> identifier of DTI connection */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 U32 entity_name; /*< 8: 4> communication entity name */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 } T_UART_DTI_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 #ifndef __T_UART_DTI_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 #define __T_UART_DTI_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 * CCDGEN:WriteStruct_Count==3115
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 U8 dti_conn; /*< 0: 1> DTI connect */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 U8 device; /*< 1: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 U8 dlci; /*< 2: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 U8 _align0; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 } T_UART_DTI_CNF;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 #ifndef __T_UART_DTI_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 #define __T_UART_DTI_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 * CCDGEN:WriteStruct_Count==3116
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 U8 dti_conn; /*< 0: 1> DTI connect */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 U8 device; /*< 1: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 U8 dlci; /*< 2: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 U8 _align0; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 } T_UART_DTI_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 #ifndef __T_UART_DISABLE_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 #define __T_UART_DISABLE_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 * CCDGEN:WriteStruct_Count==3117
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 } T_UART_DISABLE_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 #ifndef __T_UART_DISABLE_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 #define __T_UART_DISABLE_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 * CCDGEN:WriteStruct_Count==3118
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 } T_UART_DISABLE_CNF;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 #ifndef __T_UART_RING_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 #define __T_UART_RING_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 * CCDGEN:WriteStruct_Count==3119
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 U8 line_state; /*< 2: 1> state of line */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 U8 _align0; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 } T_UART_RING_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 #ifndef __T_UART_RING_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 #define __T_UART_RING_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 * CCDGEN:WriteStruct_Count==3120
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 U8 _align0; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 U8 _align1; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 } T_UART_RING_CNF;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 #ifndef __T_UART_DCD_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 #define __T_UART_DCD_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233 * CCDGEN:WriteStruct_Count==3121
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 U8 line_state; /*< 2: 1> state of line */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 U8 _align0; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 } T_UART_DCD_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 #ifndef __T_UART_DCD_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 #define __T_UART_DCD_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248 * CCDGEN:WriteStruct_Count==3122
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 U8 _align0; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255 U8 _align1; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 } T_UART_DCD_CNF;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259 #ifndef __T_UART_ESCAPE_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260 #define __T_UART_ESCAPE_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263 * CCDGEN:WriteStruct_Count==3123
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
265 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
268 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
269 U8 detection; /*< 2: 1> escape sequence detection */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270 U8 _align0; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 } T_UART_ESCAPE_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274 #ifndef __T_UART_ESCAPE_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
275 #define __T_UART_ESCAPE_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
276 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
277 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
278 * CCDGEN:WriteStruct_Count==3124
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284 U8 _align0; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285 U8 _align1; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
286 } T_UART_ESCAPE_CNF;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
287 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
288
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
289 #ifndef __T_UART_DETECTED_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 #define __T_UART_DETECTED_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 * CCDGEN:WriteStruct_Count==3125
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
295 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
297 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
298 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
299 U8 cause; /*< 2: 1> cause of indication */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
300 U8 _align0; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
301 } T_UART_DETECTED_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
302 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
303
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
304 #ifndef __T_UART_ERROR_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
305 #define __T_UART_ERROR_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
306 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
307 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
308 * CCDGEN:WriteStruct_Count==3126
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
309 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
310 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
311 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
312 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
313 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
314 U8 error; /*< 2: 1> error code */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
315 U8 _align0; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
316 } T_UART_ERROR_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
317 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
318
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
319 #ifndef __T_UART_MUX_START_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
320 #define __T_UART_MUX_START_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
321 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
322 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
323 * CCDGEN:WriteStruct_Count==3127
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
324 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
325 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
326 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
327 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
328 U8 mode; /*< 1: 1> transparency mechanism */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
329 U8 frame_type; /*< 2: 1> type of frame */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
330 U8 _align0; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
331 U16 n1; /*< 4: 2> maximum frame size */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
332 U8 t1; /*< 6: 1> acknowledgement timer */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
333 U8 n2; /*< 7: 1> maximum numer of retransmissions */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
334 U8 t2; /*< 8: 1> response timer for the multiplexer control channel */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
335 U8 t3; /*< 9: 1> wake up response timer */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
336 U8 _align1; /*< 10: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
337 U8 _align2; /*< 11: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
338 } T_UART_MUX_START_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
339 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
340
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
341 #ifndef __T_UART_MUX_START_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
342 #define __T_UART_MUX_START_CNF__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
343 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
344 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
345 * CCDGEN:WriteStruct_Count==3128
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
346 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
347 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
348 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
349 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
350 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
351 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
352 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
353 } T_UART_MUX_START_CNF;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
354 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
355
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
356 #ifndef __T_UART_MUX_DLC_ESTABLISH_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
357 #define __T_UART_MUX_DLC_ESTABLISH_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
358 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
359 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
360 * CCDGEN:WriteStruct_Count==3129
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
361 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
362 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
365 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
366 U8 convergence; /*< 2: 1> convergence layer */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
367 U8 _align0; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
368 U16 n1; /*< 4: 2> maximum frame size */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
369 U8 service; /*< 6: 1> service on DLC */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
370 U8 _align1; /*< 7: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
371 } T_UART_MUX_DLC_ESTABLISH_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
372 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
373
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
374 #ifndef __T_UART_MUX_DLC_ESTABLISH_RES__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
375 #define __T_UART_MUX_DLC_ESTABLISH_RES__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
376 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
377 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
378 * CCDGEN:WriteStruct_Count==3130
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
379 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
380 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
381 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
382 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
383 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
384 U16 n1; /*< 2: 2> maximum frame size */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
385 } T_UART_MUX_DLC_ESTABLISH_RES;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
386 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
387
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
388 #ifndef __T_UART_MUX_DLC_RELEASE_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
389 #define __T_UART_MUX_DLC_RELEASE_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
390 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
391 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
392 * CCDGEN:WriteStruct_Count==3131
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
393 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
394 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
395 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
396 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
397 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
398 U8 _align0; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
399 U8 _align1; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
400 } T_UART_MUX_DLC_RELEASE_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
401 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
402
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
403 #ifndef __T_UART_MUX_DLC_RELEASE_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
404 #define __T_UART_MUX_DLC_RELEASE_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
405 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
406 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
407 * CCDGEN:WriteStruct_Count==3132
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
408 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
409 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
410 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
411 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
412 U8 dlci; /*< 1: 1> data link connection identifier */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
413 U8 _align0; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
414 U8 _align1; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
415 } T_UART_MUX_DLC_RELEASE_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
416 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
417
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
418 #ifndef __T_UART_MUX_SLEEP_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
419 #define __T_UART_MUX_SLEEP_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
420 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
421 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
422 * CCDGEN:WriteStruct_Count==3133
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
423 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
424 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
425 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
426 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
427 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
428 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
429 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
430 } T_UART_MUX_SLEEP_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
431 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
432
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
433 #ifndef __T_UART_MUX_SLEEP_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
434 #define __T_UART_MUX_SLEEP_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
435 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
436 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
437 * CCDGEN:WriteStruct_Count==3134
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
438 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
439 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
440 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
441 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
442 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
443 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
444 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
445 } T_UART_MUX_SLEEP_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
446 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
447
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
448 #ifndef __T_UART_MUX_WAKEUP_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
449 #define __T_UART_MUX_WAKEUP_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
450 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
451 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
452 * CCDGEN:WriteStruct_Count==3135
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
453 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
454 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
455 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
456 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
457 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
458 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
459 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
460 } T_UART_MUX_WAKEUP_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
461 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
462
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
463 #ifndef __T_UART_MUX_WAKEUP_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
464 #define __T_UART_MUX_WAKEUP_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
465 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
466 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
467 * CCDGEN:WriteStruct_Count==3136
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
468 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
469 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
470 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
471 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
472 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
473 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
474 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
475 } T_UART_MUX_WAKEUP_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
476 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
477
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
478 #ifndef __T_UART_MUX_CLOSE_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
479 #define __T_UART_MUX_CLOSE_REQ__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
480 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
481 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
482 * CCDGEN:WriteStruct_Count==3137
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
483 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
484 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
485 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
486 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
487 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
488 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
489 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
490 } T_UART_MUX_CLOSE_REQ;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
491 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
492
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
493 #ifndef __T_UART_MUX_CLOSE_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
494 #define __T_UART_MUX_CLOSE_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
495 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
496 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
497 * CCDGEN:WriteStruct_Count==3138
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
498 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
499 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
500 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
501 U8 device; /*< 0: 1> device number */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
502 U8 _align0; /*< 1: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
503 U8 _align1; /*< 2: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
504 U8 _align2; /*< 3: 1> alignment */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
505 } T_UART_MUX_CLOSE_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
506 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
507
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
508 #ifndef __T_UART_DRIVER_SENT_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
509 #define __T_UART_DRIVER_SENT_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
510 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
511 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
512 * CCDGEN:WriteStruct_Count==3139
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
513 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
514 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
515 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
516 U32 devId; /*< 0: 4> device ID */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
517 } T_UART_DRIVER_SENT_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
518 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
519
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
520 #ifndef __T_UART_DRIVER_RECEIVED_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
521 #define __T_UART_DRIVER_RECEIVED_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
522 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
523 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
524 * CCDGEN:WriteStruct_Count==3140
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
525 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
526 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
527 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
528 U32 devId; /*< 0: 4> device ID */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
529 } T_UART_DRIVER_RECEIVED_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
530 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
531
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
532 #ifndef __T_UART_DRIVER_FLUSHED_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
533 #define __T_UART_DRIVER_FLUSHED_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
534 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
535 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
536 * CCDGEN:WriteStruct_Count==3141
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
537 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
538 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
539 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
540 U32 devId; /*< 0: 4> device ID */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
541 } T_UART_DRIVER_FLUSHED_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
542 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
543
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
544 #ifndef __T_UART_DRIVER_CONNECT_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
545 #define __T_UART_DRIVER_CONNECT_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
546 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
547 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
548 * CCDGEN:WriteStruct_Count==3142
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
549 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
550 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
551 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
552 U32 devId; /*< 0: 4> device ID */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
553 } T_UART_DRIVER_CONNECT_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
554 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
555
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
556 #ifndef __T_UART_DRIVER_DISCONNECT_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
557 #define __T_UART_DRIVER_DISCONNECT_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
558 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
559 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
560 * CCDGEN:WriteStruct_Count==3143
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
561 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
562 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
563 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
564 U32 devId; /*< 0: 4> device ID */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
565 } T_UART_DRIVER_DISCONNECT_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
566 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
567
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
568 #ifndef __T_UART_DRIVER_CLEAR_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
569 #define __T_UART_DRIVER_CLEAR_IND__
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
570 /*
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
571 *
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
572 * CCDGEN:WriteStruct_Count==3144
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
573 */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
574 typedef struct
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
575 {
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
576 U32 devId; /*< 0: 4> device ID */
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
577 } T_UART_DRIVER_CLEAR_IND;
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
578 #endif
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
579
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
580
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
581 #include "CDG_LEAVE.h"
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
582
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
583
c15047b3d00d cdg3: import from freecalypso-citrine/cdg
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
584 #endif