FreeCalypso > hg > fc-magnetite

annotate src/cs/layer1/p_include/l1p_tabs.h @ 326:919b44c991fc

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FCHG: reading of battery table from FFS implemented
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 05 Dec 2017 05:04:09 +0000
parents 945cf7f506b2
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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0
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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1 /************* Revision Controle System Header *************
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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2 * GSM Layer 1 software
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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3 * L1P_TABS.H
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4 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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5 * Filename l1p_tabs.h
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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6 * Copyright 2003 (C) Texas Instruments
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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7 *
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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8 ************* Revision Controle System Header *************/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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9
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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10 /*********************************************************************
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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11 * Content:
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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12 * This file contains miscelaneous ROM tables for packet procedures
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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13 *********************************************************************/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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14
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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15 #ifdef L1_SYNC_C
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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16 /*-----------------------------------------------------------------*/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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17 /* Frame Number Paging Position. */
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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18 /*-----------------------------------------------------------------*/
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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19
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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20 const UWORD8 PACKET_PG_POSITION[MAX_NBR_PG_BLKS * (MAX_PG_BLKS_INDEX+1)] =
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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21 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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22 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 1.
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23 // ---------------------------------------
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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24 // Paging
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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25 PCCCH_1, // Packet Paging Block Index = 0.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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26 PCCCH_2, // Packet Paging Block Index = 1.
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27 PCCCH_3, // Packet Paging Block Index = 2.
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28 PCCCH_4, // Packet Paging Block Index = 3.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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29 PCCCH_5, // Packet Paging Block Index = 4.
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30 PCCCH_6, // Packet Paging Block Index = 5.
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31 PCCCH_7, // Packet Paging Block Index = 6.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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32 PCCCH_8, // Packet Paging Block Index = 7.
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33 PCCCH_9, // Packet Paging Block Index = 8.
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34 PCCCH_10, // Packet Paging Block Index = 9.
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35 PCCCH_11, // Packet Paging Block Index = 10.
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36
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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37 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 2.
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38 // ---------------------------------------
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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39 // Paging
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40 PCCCH_1, // Packet Paging Block Index = 0.
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41 PCCCH_2, // Packet Paging Block Index = 1.
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42 PCCCH_3, // Packet Paging Block Index = 2.
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43 PCCCH_4, // Packet Paging Block Index = 3.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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44 PCCCH_5, // Packet Paging Block Index = 4.
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45 PCCCH_7, // Packet Paging Block Index = 5.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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46 PCCCH_8, // Packet Paging Block Index = 6.
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47 PCCCH_9, // Packet Paging Block Index = 7.
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48 PCCCH_10, // Packet Paging Block Index = 8.
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49 PCCCH_11, // Packet Paging Block Index = 9.
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50 NULL, // Packet Paging Block Index = 10.
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51
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52 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 3.
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53 // ---------------------------------------
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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54 // Paging
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55 PCCCH_1, // Packet Paging Block Index = 0.
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56 PCCCH_2, // Packet Paging Block Index = 1.
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57 PCCCH_4, // Packet Paging Block Index = 2.
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58 PCCCH_5, // Packet Paging Block Index = 3.
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59 PCCCH_7, // Packet Paging Block Index = 4.
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60 PCCCH_8, // Packet Paging Block Index = 5.
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61 PCCCH_9, // Packet Paging Block Index = 6.
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62 PCCCH_10, // Packet Paging Block Index = 7.
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63 PCCCH_11, // Packet Paging Block Index = 8.
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64 NULL, // Packet Paging Block Index = 9.
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65 NULL, // Packet Paging Block Index = 10.
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66
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67 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 4.
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68 // ---------------------------------------
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69 // Paging
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70 PCCCH_1, // Packet Paging Block Index = 0.
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71 PCCCH_2, // Packet Paging Block Index = 1.
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72 PCCCH_4, // Packet Paging Block Index = 2.
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73 PCCCH_5, // Packet Paging Block Index = 3.
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74 PCCCH_7, // Packet Paging Block Index = 4.
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75 PCCCH_8, // Packet Paging Block Index = 5.
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76 PCCCH_10, // Packet Paging Block Index = 6.
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77 PCCCH_11, // Packet Paging Block Index = 7.
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78 NULL, // Packet Paging Block Index = 8.
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79 NULL, // Packet Paging Block Index = 9.
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80 NULL, // Packet Paging Block Index = 10.
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81
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82 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 5.
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83 // ---------------------------------------
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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84 // Paging
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85 PCCCH_2, // Packet Paging Block Index = 0.
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86 PCCCH_4, // Packet Paging Block Index = 1.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
87 PCCCH_5, // Packet Paging Block Index = 2.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
88 PCCCH_7, // Packet Paging Block Index = 3.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
89 PCCCH_8, // Packet Paging Block Index = 4.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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90 PCCCH_10, // Packet Paging Block Index = 5.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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91 PCCCH_11, // Packet Paging Block Index = 6.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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92 NULL, // Packet Paging Block Index = 7.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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93 NULL, // Packet Paging Block Index = 8.
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94 NULL, // Packet Paging Block Index = 9.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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95 NULL, // Packet Paging Block Index = 10.
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96
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97 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 6.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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98 // ---------------------------------------
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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99 // Paging
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100 PCCCH_2, // Packet Paging Block Index = 0.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
101 PCCCH_4, // Packet Paging Block Index = 1.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
102 PCCCH_5, // Packet Paging Block Index = 2.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
103 PCCCH_8, // Packet Paging Block Index = 3.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
104 PCCCH_10, // Packet Paging Block Index = 4.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
105 PCCCH_11, // Packet Paging Block Index = 5.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
106 NULL, // Packet Paging Block Index = 6.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
107 NULL, // Packet Paging Block Index = 7.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
108 NULL, // Packet Paging Block Index = 8.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
109 NULL, // Packet Paging Block Index = 9.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
110 NULL, // Packet Paging Block Index = 10.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
111
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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112 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 7.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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113 // ---------------------------------------
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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114 // Paging
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
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115 PCCCH_2, // Packet Paging Block Index = 0.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
116 PCCCH_5, // Packet Paging Block Index = 1.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
117 PCCCH_8, // Packet Paging Block Index = 2.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118 PCCCH_10, // Packet Paging Block Index = 3.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 PCCCH_11, // Packet Paging Block Index = 4.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 NULL, // Packet Paging Block Index = 5.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121 NULL, // Packet Paging Block Index = 6.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 NULL, // Packet Paging Block Index = 7.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 NULL, // Packet Paging Block Index = 8.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 NULL, // Packet Paging Block Index = 9.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 NULL, // Packet Paging Block Index = 10.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 8.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 // ---------------------------------------
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 // Paging
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 PCCCH_2, // Packet Paging Block Index = 0.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 PCCCH_5, // Packet Paging Block Index = 1.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 PCCCH_8, // Packet Paging Block Index = 2.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 PCCCH_11, // Packet Paging Block Index = 3.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 NULL, // Packet Paging Block Index = 4.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 NULL, // Packet Paging Block Index = 5.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 NULL, // Packet Paging Block Index = 6.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 NULL, // Packet Paging Block Index = 7.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 NULL, // Packet Paging Block Index = 8.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 NULL, // Packet Paging Block Index = 9.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 NULL, // Packet Paging Block Index = 10.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 9.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 // ---------------------------------------
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 // Paging
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 PCCCH_5, // Packet Paging Block Index = 0.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 PCCCH_8, // Packet Paging Block Index = 1.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 PCCCH_11, // Packet Paging Block Index = 2.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 NULL, // Packet Paging Block Index = 3.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 NULL, // Packet Paging Block Index = 4.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 NULL, // Packet Paging Block Index = 5.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 NULL, // Packet Paging Block Index = 6.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 NULL, // Packet Paging Block Index = 7.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 NULL, // Packet Paging Block Index = 8.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 NULL, // Packet Paging Block Index = 9.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 NULL, // Packet Paging Block Index = 10.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 10.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 // ---------------------------------------
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 // Paging
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 PCCCH_5, // Packet Paging Block Index = 0.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 PCCCH_11, // Packet Paging Block Index = 1.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 NULL, // Packet Paging Block Index = 2.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 NULL, // Packet Paging Block Index = 3.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 NULL, // Packet Paging Block Index = 4.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 NULL, // Packet Paging Block Index = 5.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 NULL, // Packet Paging Block Index = 6.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 NULL, // Packet Paging Block Index = 7.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 NULL, // Packet Paging Block Index = 8.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 NULL, // Packet Paging Block Index = 9.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 NULL, // Packet Paging Block Index = 10.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172 // BS_PAG_BLKS_RES + BS_PBCCH_BLKS_RES = 11.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 // ---------------------------------------
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 // Paging
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 PCCCH_11, // Packet Paging Block Index = 0.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 NULL, // Packet Paging Block Index = 1.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 NULL, // Packet Paging Block Index = 2.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 NULL, // Packet Paging Block Index = 3.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 NULL, // Packet Paging Block Index = 4.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 NULL, // Packet Paging Block Index = 5.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 NULL, // Packet Paging Block Index = 6.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 NULL, // Packet Paging Block Index = 7.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 NULL, // Packet Paging Block Index = 8.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 NULL, // Packet Paging Block Index = 9.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 NULL, // Packet Paging Block Index = 10.
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 };
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 // Starting times of each block for ordered list of blocks
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 const UWORD8 ORDERED_BLOCK_START_TIME[12] =
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 0, // B0
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 26, // B6
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 13, // B3
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 39, // B9
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 4, // B1
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 30, // B7
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 17, // B4
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 43, // B10
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 8, // B2
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 34, // B8
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 21, // B5
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 47 // B11
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 };
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 // Serving Cell PBCCH block index
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 const UWORD8 PBCCH_BLK_INDEX[MAX_NBR_PB_BLKS * (MAX_PB_BLKS_INDEX+1)] =
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 // BS_BPCCH_BLKS = 0
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 0,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 0,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 0,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 0,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 // BS_BPCCH_BLKS = 1
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 0,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 6,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 0,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 0,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 // BS_BPCCH_BLKS = 2
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 0,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 3,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 6,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 0,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 // BS_BPCCH_BLKS = 3
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 0,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 3,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 6,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 9
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 };
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 // Serving PBCCH and Neighbor PBCCH block position in the MF52
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 const UWORD8 PBCCH_POSITION[4][4] =
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 {
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 {51,00,00,00}, // BS_PBCCH_BLKS=0
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 {51,25,00,00}, // BS_PBCCH_BLKS=1
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 {51,12,25,00}, // BS_PBCCH_BLKS=2
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 {51,12,25,38} // BS_PBCCH_BLKS=3
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 };
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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242
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243 #else
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244 extern UWORD8 PACKET_PG_POSITION[MAX_NBR_PG_BLKS * (MAX_PG_BLKS_INDEX+1)];
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245 extern UWORD8 ORDERED_BLOCK_START_TIME[12];
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246 extern UWORD8 PBCCH_BLK_INDEX[MAX_NBR_PB_BLKS * (MAX_PB_BLKS_INDEX+1)];
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247 extern UWORD8 PBCCH_POSITION[4][4];
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248 #endif