FreeCalypso > hg > fc-magnetite
annotate src/cs/drivers/drv_core/inth/niq32.c @ 677:91d9f8506420
GPIO046 dummy outputs on FCDEV3B, GTA0x and Tango
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sat, 20 Jun 2020 04:32:45 +0000 |
parents | baa0a02bc676 |
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rev | line source |
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1 /****************************************************************************** |
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2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION |
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3 |
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4 Property of Texas Instruments -- For Unrestricted Internal Use Only |
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5 Unauthorized reproduction and/or distribution is strictly prohibited. This |
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6 product is protected under copyright law and trade secret law as an |
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7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All |
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8 rights reserved. |
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9 |
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10 |
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11 Filename : niq32.c |
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12 |
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13 Description : Nucleus IQ initializations |
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14 |
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15 Project : Drivers |
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16 |
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17 Author : proussel@ti.com Patrick Roussel. |
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18 |
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19 Version number : 1.25 |
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20 |
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21 Date : 08/22/03 |
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22 |
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23 Previous delta : 12/19/00 14:24:51 |
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24 |
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25 *******************************************************************************/ |
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26 |
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27 #include "l1sw.cfg" |
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28 |
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29 #include "chipset.cfg" |
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30 #include "board.cfg" |
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31 #include "rf.cfg" |
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32 #include "swconfig.cfg" |
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33 #include "fc-target.h" |
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34 |
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35 #if(OP_L1_STANDALONE == 0) |
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36 #include "debug.cfg" |
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37 #include "rv/rv_defined_swe.h" |
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38 #include "rtc/board/rtc_config.h" |
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39 #else |
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40 #include "l1_macro.h" |
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41 #include "l1_confg.h" |
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42 #endif |
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43 |
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44 #if(OP_L1_STANDALONE == 0) |
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45 #include "swconfig.cfg" |
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46 #ifdef BLUETOOTH_INCLUDED |
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47 #include "btemobile.cfg" |
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48 #ifdef BT_CLK_REQ_INT |
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49 #include "board/bth_drv.h" |
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50 #endif |
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51 #endif |
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52 #endif |
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53 |
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54 |
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55 #if(L1_DYN_DSP_DWNLD == 1) |
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56 #include "l1_api_hisr.h" |
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57 #endif |
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58 |
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59 #if (OP_L1_STANDALONE == 0) |
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60 #include "main/sys_types.h" |
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61 #else |
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62 #include "sys_types.h" |
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63 #endif |
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64 |
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65 #if (CHIPSET == 12) |
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66 #include "sys_inth.h" |
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67 #else |
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68 #include "inth/inth.h" |
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69 #include "memif/mem.h" |
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70 #if (OP_L1_STANDALONE == 1) |
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71 #include "serialswitch_core.h" |
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72 #else |
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73 #include "uart/serialswitch.h" |
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74 #endif |
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75 |
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76 #if (OP_L1_STANDALONE == 0) |
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77 #include "sim/sim.h" |
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78 #endif |
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79 #endif |
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80 |
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81 #include "abb/abb_core_inth.h" // for External Interrupt |
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82 #define IQ_H |
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83 #include "inth/iq.h" |
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84 #include "ulpd/ulpd.h" |
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85 #if (BOARD == 34) |
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86 #include "csmi/csmi.h" |
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87 #endif |
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88 |
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89 #if (defined RVM_DAR_SWE) && (defined _GSM) |
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90 extern void dar_watchdog_reset(void); |
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91 #endif |
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92 |
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93 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45)) |
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94 #include "armio/armio.h" |
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95 #if (OP_L1_STANDALONE == 0) |
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96 #include "uart/uartfax.h" |
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97 #endif |
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98 #endif |
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99 |
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100 /* External declaration */ |
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101 extern void GAUGING_Handler(void); |
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102 extern void TMT_Timer_Interrupt(void); |
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103 #if (OP_L1_STANDALONE == 1) |
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104 extern void TM_Timer1Handler(void); |
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105 #endif |
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106 extern void kpd_key_handler(void); |
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107 extern void TP_FrameIntHandler(void); |
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108 |
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109 #if (OP_L1_STANDALONE == 0) |
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110 #if (defined RVM_MPM_SWE) |
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111 extern void MPM_InterruptHandler(void); |
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112 #endif |
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113 |
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114 #if (TI_PROFILER == 1) |
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115 extern void ti_profiler_tdma_action(void); |
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116 #endif |
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117 |
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118 #if(RF_FAM==35) |
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119 extern void TSP_RxHandler(void); |
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120 #endif |
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121 |
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122 extern void RTC_GaugingHandler(void); |
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123 extern void RTC_ItTimerHandle(void); |
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124 extern void RTC_ItAlarmHandle(void); |
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125 #endif |
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126 |
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127 |
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128 |
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129 /* Global variables */ |
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130 unsigned IQ_TimerCount1; /* Used to check if timer is incrementing */ |
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131 unsigned IQ_TimerCount2; /* Used to check if timer is incrementing */ |
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132 unsigned IQ_TimerCount; /* Used to check if timer is incrementing */ |
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133 unsigned IQ_DummyCount; /* Used to check if dummy IT */ |
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134 unsigned IQ_FrameCount; /* Used to check if Frame IT TPU*/ |
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135 unsigned IQ_GsmTimerCount; /* Used to check if GSM Timer IT */ |
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136 |
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137 |
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138 #if (CHIPSET != 12) |
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139 /*--------------------------------------------------------------*/ |
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140 /* irqHandlers */ |
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141 /*--------------------------------------------------------------*/ |
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142 /* Parameters :none */ |
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143 /* Return : none */ |
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144 /* Functionality : Table of interrupt handlers */ |
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145 /* These MUST be 32-bit entries */ |
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146 /*--------------------------------------------------------------*/ |
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147 |
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148 SYS_FUNC irqHandlers[IQ_NUM_INT] = |
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149 { |
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150 IQ_TimerHandler, /* Watchdog timer */ |
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151 IQ_TimerHandler1, /* timer 1 */ |
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152 IQ_TimerHandler2, /* timer 2 */ |
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153 IQ_Dummy, /* AIRQ 3 */ |
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154 IQ_FrameHandler, /* TPU Frame It AIRQ 4 */ |
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155 IQ_Dummy, /* AIRQ 5 */ |
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156 #if (OP_L1_STANDALONE == 0) |
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157 SIM_IntHandler, /* AIRQ 6 */ |
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158 #else |
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159 IQ_Dummy, /* AIRQ 6 */ |
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160 #endif |
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161 #if ((CHIPSET == 2) || (CHIPSET == 3)) |
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162 SER_uart_handler, /* AIRQ 7 */ |
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163 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) |
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164 SER_uart_modem_handler, /* AIRQ 7 */ |
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165 #endif |
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166 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41)) |
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167 IQ_KeypadGPIOHandler, /* AIRQ 8 */ |
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168 #else |
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169 IQ_KeypadHandler, /* AIRQ 8 */ |
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170 #endif |
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171 IQ_Rtc_Handler, /* AIRQ 9 RTC Timer*/ |
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172 #if ((CHIPSET == 2) || (CHIPSET == 3)) |
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173 IQ_RtcA_GsmTim_Handler, /* AIRQ 10 RTC ALARM OR ULPD GSM TIMER*/ |
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174 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) |
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175 IQ_RtcA_Handler, /* AIRQ 10 RTC ALARM */ |
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176 #endif |
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177 IQ_Gauging_Handler, /* AIRQ 11 ULPD GAUGING */ |
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178 IQ_External, /* AIRQ 12 */ |
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179 IQ_Dummy, /* AIRQ 13 */ |
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180 IQ_Dummy, /* DMA interrupt */ |
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181 #if (CHIPSET == 4) |
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182 IQ_Dummy, /* LEAD */ |
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183 IQ_Dummy, /* SIM card-detect fast interrupt */ |
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184 IQ_Dummy, /* External fast interrupt */ |
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185 SER_uart_irda_handler, /* UART IrDA interrupt */ |
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186 IQ_GsmTim_Handler /* ULPD GSM timer */ |
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187 #elif ((CHIPSET == 5) || (CHIPSET == 6)) |
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188 IQ_Dummy, /* LEAD */ |
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189 IQ_Dummy, /* SIM card-detect fast interrupt */ |
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190 IQ_Dummy, /* External fast interrupt */ |
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191 SER_uart_irda_handler, /* UART IrDA interrupt */ |
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192 IQ_GsmTim_Handler, /* ULPD GSM timer */ |
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193 #if (BOARD == 34) |
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194 IQ_IcrHandler32, |
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195 #else |
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196 IQ_Dummy, /* Not mapped interrupt */ |
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197 #endif |
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198 IQ_Dummy, /* Not mapped interrupt */ |
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199 IQ_Dummy, /* Not mapped interrupt */ |
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200 IQ_Dummy, /* Not mapped interrupt */ |
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201 IQ_Dummy /* GEA interrupt */ |
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202 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)) |
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203 #if (L1_DYN_DSP_DWNLD == 1) |
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204 IQ_ApiHandler, /* LEAD */ |
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205 #else |
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206 IQ_Dummy, /* LEAD */ |
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207 #endif |
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208 IQ_Dummy, /* SIM card-detect fast interrupt */ |
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209 IQ_Dummy, /* External fast interrupt */ |
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210 SER_uart_irda_handler, /* UART IrDA interrupt */ |
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211 IQ_GsmTim_Handler, /* ULPD GSM timer */ |
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212 IQ_Dummy /* GEA interrupt */ |
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213 #elif (CHIPSET == 9) |
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214 IQ_Dummy, /* LEAD */ |
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215 IQ_Dummy, /* SIM card-detect fast interrupt */ |
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216 IQ_Dummy, /* External fast interrupt */ |
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217 SER_uart_irda_handler, /* UART IrDA interrupt */ |
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218 IQ_GsmTim_Handler, /* ULPD GSM timer */ |
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219 IQ_Dummy, /* Not mapped interrupt */ |
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220 IQ_Dummy, /* Not mapped interrupt */ |
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221 IQ_Dummy, /* Not mapped interrupt */ |
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222 IQ_Dummy, /* Not mapped interrupt */ |
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223 IQ_Dummy /* Reserved */ |
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224 #else |
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225 IQ_Dummy /* LEAD */ |
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226 #endif |
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227 }; |
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228 |
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229 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) |
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230 /*--------------------------------------------------------------*/ |
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231 /* fiqHandlers */ |
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232 /*--------------------------------------------------------------*/ |
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233 /* Parameters :none */ |
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234 /* Return :none */ |
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235 /* Functionality : Table of interrupt handlers */ |
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236 /* These MUST be 32-bit entries */ |
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237 /*--------------------------------------------------------------*/ |
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238 |
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239 SYS_FUNC fiqHandlers[IQ_NUM_INT] = |
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240 { |
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241 IQ_Dummy, /* Watchdog timer */ |
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242 IQ_Dummy, /* timer 1 */ |
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243 IQ_Dummy, /* timer 2 */ |
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244 #if ((OP_L1_STANDALONE == 0) && (RF_FAM == 35)) |
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245 TSP_RxHandler, /* 3 TSP */ |
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246 #else |
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247 IQ_Dummy, /* AIRQ 3 */ |
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248 #endif |
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249 IQ_Dummy, /* TPU Frame It AIRQ 4 */ |
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250 IQ_Dummy, /* AIRQ 5 */ |
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251 IQ_Dummy, /* AIRQ 6 */ |
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252 IQ_Dummy, /* AIRQ 7 */ |
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253 IQ_Dummy, /* AIRQ 8 */ |
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254 IQ_Dummy, /* AIRQ 9 RTC Timer */ |
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255 IQ_Dummy, /* AIRQ 10 RTC ALARM */ |
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256 IQ_Dummy, /* AIRQ 11 ULPD GAUGING */ |
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257 IQ_Dummy, /* AIRQ 12 */ |
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258 IQ_Dummy, /* AIRQ 13 Spi Tx Rx interrupt */ |
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259 IQ_Dummy, /* DMA interrupt */ |
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260 IQ_Dummy, /* LEAD */ |
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261 #if (OP_L1_STANDALONE == 0) |
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262 SIM_CD_IntHandler, /* SIM card-detect fast interrupt */ |
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263 #else |
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264 IQ_Dummy, /* SIM card-detect fast interrupt */ |
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265 #endif |
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266 IQ_Dummy, /* External fast interrupt */ |
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267 IQ_Dummy, /* UART_IRDA interrupt */ |
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268 #if (CHIPSET == 4) |
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269 IQ_Dummy /* ULPD GSM timer */ |
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270 #elif ((CHIPSET == 5) || (CHIPSET == 6)) |
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271 IQ_Dummy, /* ULPD GSM timer */ |
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272 IQ_Dummy, /* Not mapped interrupt */ |
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273 IQ_Dummy, /* Not mapped interrupt */ |
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274 IQ_Dummy, /* Not mapped interrupt */ |
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275 IQ_Dummy, /* Not mapped interrupt */ |
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276 IQ_Dummy /* GEA interrupt */ |
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277 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)) |
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278 IQ_Dummy, /* ULPD GSM timer */ |
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279 IQ_Dummy /* GEA timer */ |
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280 #elif (CHIPSET == 9) |
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281 IQ_Dummy, /* ULPD GSM timer */ |
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282 IQ_Dummy, /* Not mapped interrupt */ |
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283 IQ_Dummy, /* Not mapped interrupt */ |
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284 IQ_Dummy, /* Not mapped interrupt */ |
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285 IQ_Dummy, /* Not mapped interrupt */ |
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286 IQ_Dummy /* Reserved */ |
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287 #endif |
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288 }; |
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289 #endif |
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290 #endif /* (CHIPSET != 12)*/ |
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291 |
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292 /*--------------------------------------------------------------*/ |
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293 /* IQ_Gauging_Handler */ |
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294 /*--------------------------------------------------------------*/ |
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295 /* Parameters :none */ |
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296 /* Return : none */ |
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297 /* Functionality : Handle unused interrupts */ |
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298 /*--------------------------------------------------------------*/ |
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299 void IQ_Gauging_Handler(void) |
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300 { |
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301 GAUGING_Handler(); |
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302 #if (OP_L1_STANDALONE == 0) |
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303 RTC_GaugingHandler(); |
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304 #endif |
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305 } |
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306 |
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307 |
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308 /*--------------------------------------------------------------*/ |
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309 /* IQ_External */ |
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310 /*--------------------------------------------------------------*/ |
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311 /* Parameters : none */ |
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312 /* Return : none */ |
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313 /* Functionality : Handle External IRQ mapped on ABB. */ |
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314 /*--------------------------------------------------------------*/ |
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315 void IQ_External(void) |
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316 { |
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317 #if (CHIPSET == 12) |
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318 // Mask external interrupt 12 |
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319 F_INTH_DISABLE_ONE_IT(C_INTH_ABB_IRQ_IT); |
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320 #else |
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321 // Mask external interrupt 12 |
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322 IQ_Mask(IQ_EXT); |
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323 #endif |
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324 |
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325 // The external IRQ is mapped on the ABB interrupt. |
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326 // The associated HISR ABB_Hisr is activated on reception on the external IRQ. |
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327 if(Activate_ABB_HISR()) |
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328 { |
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329 #if (CHIPSET == 12) |
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330 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); |
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331 #else |
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332 // Mask external interrupt 12 |
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333 IQ_Unmask(IQ_EXT); |
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334 #endif |
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335 } |
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336 } |
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337 |
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338 #if (CHIPSET != 12) |
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339 /*--------------------------------------------------------------*/ |
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340 /* IQ_Dummy */ |
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341 /*--------------------------------------------------------------*/ |
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342 /* Parameters :none */ |
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343 /* Return : none */ |
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344 /* Functionality : Handle unused interrupts */ |
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345 /*--------------------------------------------------------------*/ |
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346 void IQ_Dummy(void) |
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347 { |
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348 IQ_DummyCount++; |
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349 } |
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350 #endif |
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351 |
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352 /*--------------------------------------------------------------*/ |
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353 /* IQ_RTCHandler */ |
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354 /*--------------------------------------------------------------*/ |
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355 /* Parameters :none */ |
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356 /* Return : none */ |
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357 /* Functionality : Handle RTC Time interrupts */ |
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358 /*--------------------------------------------------------------*/ |
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359 |
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360 void IQ_Rtc_Handler(void) |
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361 { |
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362 #if (OP_L1_STANDALONE == 0) |
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363 RTC_ItTimerHandle(); |
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364 #endif |
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365 } |
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366 |
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367 /*--------------------------------------------------------------*/ |
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368 /* IQ_RtcA_GsmTim_Handler */ |
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369 /*--------------------------------------------------------------*/ |
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370 /* Parameters :none */ |
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371 /* Return : none */ |
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372 /* Functionality : Handle RTC ALARM or GAUGING interrupts */ |
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373 /*--------------------------------------------------------------*/ |
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374 |
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375 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
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376 void IQ_RtcA_Handler(void) |
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377 { |
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378 #if (OP_L1_STANDALONE == 0) |
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379 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */ |
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380 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM ) |
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381 RTC_ItAlarmHandle(); |
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382 #endif |
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383 } |
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384 |
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385 void IQ_GsmTim_Handler(void) |
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386 { |
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387 |
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388 if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) |
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389 { |
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390 // it is GSM Timer it..... |
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391 IQ_GsmTimerCount++; |
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392 } |
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393 } |
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394 #else |
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395 void IQ_RtcA_GsmTim_Handler(void) |
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396 { |
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397 #if (OP_L1_STANDALONE == 0) |
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398 if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) |
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399 { |
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400 // it is GSM Timer it..... |
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401 IQ_GsmTimerCount++; |
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402 } |
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403 else |
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404 { |
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405 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */ |
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406 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM ) |
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407 RTC_ItAlarmHandle(); |
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408 } |
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409 #endif |
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410 } |
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411 #endif |
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412 |
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413 #if (BOARD == 34) |
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414 /* |
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415 * IQ_IcrHandler32 |
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416 * |
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417 */ |
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418 void IQ_IcrHandler32(void) |
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419 { |
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420 CSMI_InterruptHandler(); |
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421 } |
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422 #endif |
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423 |
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424 /*--------------------------------------------------------------*/ |
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425 /* IQ_TimerHandler */ |
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426 /*--------------------------------------------------------------*/ |
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427 /* Parameters :none */ |
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428 /* Return : none */ |
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429 /* Functionality : Handle Timer interrupts */ |
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430 /*--------------------------------------------------------------*/ |
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431 void IQ_TimerHandler(void) |
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432 { |
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433 IQ_TimerCount++; |
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434 TMT_Timer_Interrupt(); |
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435 #if (defined RVM_DAR_SWE) && (defined _GSM) |
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436 dar_watchdog_reset(); |
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437 #endif |
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438 } |
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439 |
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440 /*--------------------------------------------------------------*/ |
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441 /* IQ_FramerHandler */ |
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442 /*--------------------------------------------------------------*/ |
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443 /* Parameters :none */ |
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444 /* Return : none */ |
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445 /* Functionality : Handle Timer interrupts */ |
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446 /*--------------------------------------------------------------*/ |
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447 void IQ_FrameHandler(void) |
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448 { |
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449 IQ_FrameCount++; |
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450 TMT_Timer_Interrupt(); |
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451 TP_FrameIntHandler(); |
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452 #if (OP_L1_STANDALONE == 0) |
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453 #if (TI_PROFILER == 1) |
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454 // TDMA treatment for profiling buffer |
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455 ti_profiler_tdma_action(); |
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456 #endif |
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457 #endif |
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458 } |
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459 |
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460 /*--------------------------------------------------------------*/ |
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461 /* IQ_TimerHandler1 */ |
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462 /*--------------------------------------------------------------*/ |
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463 /* Parameters :none */ |
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464 /* Return : none */ |
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465 /* Functionality : Handle Timer 1 interrupts */ |
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466 /*--------------------------------------------------------------*/ |
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467 void IQ_TimerHandler1(void) |
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468 { |
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469 IQ_TimerCount1++; |
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470 #if (OP_L1_STANDALONE == 1) |
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471 TM_Timer1Handler(); |
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472 #endif |
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473 } |
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474 |
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475 /*--------------------------------------------------------------*/ |
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476 /* IQ_TimerHandler2 */ |
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477 /*--------------------------------------------------------------*/ |
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478 /* Parameters :none */ |
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479 /* Return : none */ |
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480 /* Functionality : Handle Timer 2 interrupts */ |
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481 /*--------------------------------------------------------------*/ |
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482 void IQ_TimerHandler2(void) |
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483 { |
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484 IQ_TimerCount2++; |
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485 } |
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486 #if(L1_DYN_DSP_DWNLD == 1) |
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487 |
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488 /*-------------------------------------------------------*/ |
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489 /* IQ_ApiHandler() */ |
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490 /*-------------------------------------------------------*/ |
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491 /* Parameters : none */ |
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492 /* Return : none */ |
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493 /* Functionality : API int management */ |
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494 /*-------------------------------------------------------*/ |
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495 void IQ_ApiHandler(void) |
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496 { |
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497 l1_api_handler(); |
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498 } /* IQ_ApiHandler() */ |
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499 #endif |
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500 |
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501 |
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502 #if (CHIPSET !=12) |
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503 /*--------------------------------------------------------------*/ |
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504 /* IQ_IRQ_isr */ |
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505 /*--------------------------------------------------------------*/ |
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506 /* Parameters :none */ |
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507 /* Return : none */ |
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508 /* Functionality : HHandle IRQ interrupts */ |
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509 /*--------------------------------------------------------------*/ |
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510 void IQ_IRQ_isr(void) |
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511 { |
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512 irqHandlers[((* (SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM)](); /* ACK IT */ |
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513 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_IRQ); /* valid next IRQ */ |
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514 } |
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515 |
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516 /*--------------------------------------------------------------*/ |
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517 /* IQ_FIQ_isr */ |
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518 /*--------------------------------------------------------------*/ |
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519 /* Parameters :none */ |
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520 /* Return : none */ |
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521 /* Functionality : Handle FIQ interrupts */ |
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522 /*--------------------------------------------------------------*/ |
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523 void IQ_FIQ_isr(void) |
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524 { |
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525 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) |
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526 fiqHandlers[((* (SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM)](); /* ACK IT */ |
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527 #endif |
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528 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_FIQ); /* valid next FIQ */ |
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529 } |
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530 #endif /* chipset != 12 ) */ |
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531 |
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532 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41)) |
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533 |
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534 /*--------------------------------------------------------------*/ |
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535 /* IQ_KeypadGPIOHandler */ |
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536 /*--------------------------------------------------------------*/ |
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537 /* Parameters : none */ |
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538 /* Return : none */ |
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539 /* Functionality : Handle keypad and GPIO interrupts */ |
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540 /*--------------------------------------------------------------*/ |
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541 |
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542 void IQ_KeypadGPIOHandler(void) |
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543 { |
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544 |
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545 #if (OP_L1_STANDALONE == 0) |
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546 /* |
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547 * GPIO interrupt must be checked before the keypad interrupt. The GPIO |
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548 * status bit is reset when the register is read. |
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549 */ |
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550 |
635
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551 if (AI_CheckITSource (ARMIO_GPIO_INT)) { |
0
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552 #ifdef RVM_MPM_SWE |
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553 // check if the SWE has been started |
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554 MPM_InterruptHandler (); |
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555 #elif BT_CLK_REQ_INT |
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556 BT_DRV_ClkReqInterruptHandler( ); |
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557 #elif UARTFAX_CLASSIC_DTR_DCD |
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558 UAF_DTRInterruptHandler (); |
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559 #else |
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560 AI_MaskIT(ARMIO_MASKIT_GPIO); |
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561 AI_UnmaskIT(ARMIO_MASKIT_GPIO); |
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562 #endif |
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563 } |
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564 if (AI_CheckITSource (ARMIO_KEYPDAD_INT)) |
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565 { |
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566 kpd_key_handler (); |
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567 } |
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568 #endif |
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569 } |
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570 |
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571 #elif ((BOARD == 34) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45)) |
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572 |
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573 /*--------------------------------------------------------------*/ |
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574 /* IQ_KeypadHandler */ |
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575 /*--------------------------------------------------------------*/ |
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576 /* Parameters :none */ |
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577 /* Return : none */ |
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578 /* Functionality : Handle keypad interrupts */ |
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579 /*--------------------------------------------------------------*/ |
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580 void IQ_KeypadHandler(void) |
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581 { |
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582 #if (OP_L1_STANDALONE == 0) |
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583 #if (BOARD == 34) |
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584 IQ_Mask (IQ_ARMIO); |
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585 #else |
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586 kpd_key_handler (); |
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587 #endif |
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588 #endif |
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589 } |
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590 |
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591 #endif |