FreeCalypso > hg > fc-magnetite
annotate components/frame_na7_db_ir-partial @ 604:a7ed7d4483b0
main assembly boot path code: MEMIF change for 26 MHz targets
as explained in the MEMIF-wait-states document
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Mon, 17 Jun 2019 02:11:17 +0000 |
parents | 41b6a18ffa0b |
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rev | line source |
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1 # Building frame_na7_db_ir.lib using the GPF source bits we got with TCS3.2 |
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2 # This version uses the original TCS211 objects for the OSL part |
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3 |
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4 CFLAGS="-mw -x -pw2 -o3 -me -mt -g -mn" |
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5 |
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6 # Defines |
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7 |
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8 CPPFLAGS="-DNU_DEBUG -D_FF_RV_EXIST_ -DRUN_INT_RAM" |
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9 CPPFLAGS="$CPPFLAGS -D_TARGET_ -D_NUCLEUS_" |
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10 |
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11 # Includes |
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12 |
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13 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/frame" |
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14 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc/nuc" |
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15 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc/nuc/arm7" |
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16 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc" |
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17 CPPFLAGS="$CPPFLAGS -I$SRC/gpf2/tst" |
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18 |
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19 # Source modules |
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20 |
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21 SRCDIR=$SRC/gpf3/frame |
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22 |
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23 cfile_symlink $SRCDIR/frame.c |
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24 cfile_symlink $SRCDIR/vsi_sem.c |
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25 cfile_symlink $SRCDIR/vsi_com.c |
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26 cfile_symlink $SRCDIR/vsi_mem.c |
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27 cfile_symlink $SRCDIR/vsi_tim.c |
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28 cfile_symlink $SRCDIR/vsi_mis.c |
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29 cfile_symlink $SRCDIR/vsi_drv.c |
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30 cfile_symlink $SRCDIR/vsi_trc.c |
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31 cfile_symlink $SRCDIR/vsi_pro.c |
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32 cfile_symlink $SRCDIR/xalert.c |
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33 cfile_symlink $SRCDIR/route.c |
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34 cfile_symlink $SRCDIR/prf_func.c |
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35 cfile_symlink $SRCDIR/frm_ext.c |
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36 cfile_symlink $SRCDIR/frame_version.c |
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OSL: os_com_ir.c compiles
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37 |
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38 # OSL |
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39 |
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40 OBJDIR=../../blobs/obj/osl/ir |
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41 |
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42 OBJS="$OBJS $OBJDIR/os_com.obj" |
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43 OBJS="$OBJS $OBJDIR/os_drv.obj" |
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44 OBJS="$OBJS $OBJDIR/os_evt.obj" |
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45 OBJS="$OBJS $OBJDIR/os_isr.obj" |
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46 OBJS="$OBJS $OBJDIR/os_mem.obj" |
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47 OBJS="$OBJS $OBJDIR/os_mis.obj" |
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48 OBJS="$OBJS $OBJDIR/os_pro.obj" |
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49 OBJS="$OBJS $OBJDIR/os_sem.obj" |
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50 OBJS="$OBJS $OBJDIR/os_tim.obj" |