FreeCalypso > hg > fc-magnetite
annotate src/cs/layer1/cfile/l1_drive.c @ 342:a9743c1dbe58
create_RVtasks.c: start FCHG SWE when it is included
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 15 Dec 2017 19:02:09 +0000 |
parents | 50a15a54801e |
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rev | line source |
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1 /************* Revision Controle System Header ************* |
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2 * GSM Layer 1 software |
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3 * L1_DRIVE.C |
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4 * |
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5 * Filename l1_drive.c |
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6 * Copyright 2003 (C) Texas Instruments |
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7 * |
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8 ************* Revision Controle System Header *************/ |
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9 |
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10 #define L1_DRIVE_C |
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11 |
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12 #include "l1_confg.h" |
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13 |
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14 #if (RF_FAM == 61) |
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15 #include "apc.h" |
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16 #endif |
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17 |
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18 #define W_A_DSP_PR20037 1 /* FreeCalypso */ |
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19 |
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20 #if ((L1M_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE ==1)&&(W_A_DSP_PR20037 == 1)) |
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21 #include "nucleus.h" |
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22 #endif |
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23 #include "l1_macro.h" |
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24 #if (CODE_VERSION == SIMULATION) |
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25 #include <string.h> |
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26 #include "l1_types.h" |
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27 #include "sys_types.h" |
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28 #include "l1_const.h" |
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29 #include "l1_time.h" |
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30 #if TESTMODE |
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31 #include "l1tm_defty.h" |
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32 #endif |
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33 #if (AUDIO_TASK == 1) |
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34 #include "l1audio_const.h" |
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35 #include "l1audio_cust.h" |
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36 #include "l1audio_defty.h" |
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37 #endif |
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38 #if (L1_GTT == 1) |
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39 #include "l1gtt_const.h" |
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40 #include "l1gtt_defty.h" |
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41 #endif |
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42 #if (L1_MP3 == 1) |
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43 #include "l1mp3_defty.h" |
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44 #endif |
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45 #if (L1_MIDI == 1) |
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46 #include "l1midi_defty.h" |
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47 #endif |
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48 //ADDED FOR AAC |
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49 #if (L1_AAC == 1) |
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50 #include "l1aac_defty.h" |
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51 #endif |
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52 #include "l1_defty.h" |
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53 #include "l1_varex.h" |
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54 #include "cust_os.h" |
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55 #include "l1_msgty.h" |
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56 #if TESTMODE |
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57 #include "l1tm_varex.h" |
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58 #endif |
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59 #if L2_L3_SIMUL |
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60 #include "hw_debug.h" |
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61 #endif |
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62 |
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63 #if L1_GPRS |
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64 #include "l1p_cons.h" |
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65 #include "l1p_msgt.h" |
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66 #include "l1p_deft.h" |
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67 #include "l1p_vare.h" |
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68 #include "l1p_sign.h" |
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69 #endif |
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70 |
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71 #include <stdio.h> |
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72 #include "sim_cfg.h" |
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73 #include "sim_cons.h" |
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74 #include "sim_def.h" |
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75 #include "sim_var.h" |
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76 |
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77 #include "l1_ctl.h" |
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78 |
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79 #else |
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80 |
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81 #include <string.h> |
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82 #include "l1_types.h" |
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83 #include "sys_types.h" |
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84 #include "l1_const.h" |
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85 #include "l1_time.h" |
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86 #if TESTMODE |
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87 #include "l1tm_defty.h" |
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88 #endif |
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89 #if (AUDIO_TASK == 1) |
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90 #include "l1audio_const.h" |
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91 #include "l1audio_cust.h" |
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92 #include "l1audio_defty.h" |
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93 #endif |
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94 #if (L1_GTT == 1) |
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95 #include "l1gtt_const.h" |
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96 #include "l1gtt_defty.h" |
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97 #endif |
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98 #if (L1_MP3 == 1) |
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99 #include "l1mp3_defty.h" |
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100 #endif |
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101 #if (L1_MIDI == 1) |
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102 #include "l1midi_defty.h" |
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103 #endif |
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104 //ADDED FOR AAC |
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105 #if (L1_AAC == 1) |
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106 #include "l1aac_defty.h" |
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107 #endif |
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108 #include "l1_defty.h" |
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109 #include "l1_varex.h" |
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110 #include "cust_os.h" |
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111 #include "l1_msgty.h" |
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112 #if TESTMODE |
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113 #include "l1tm_varex.h" |
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114 #endif |
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115 #if L2_L3_SIMUL |
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116 #include "hw_debug.h" |
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117 #endif |
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118 #include "tpudrv.h" |
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119 |
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120 #if L1_GPRS |
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121 #include "l1p_cons.h" |
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122 #include "l1p_msgt.h" |
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123 #include "l1p_deft.h" |
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124 #include "l1p_vare.h" |
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125 #include "l1p_sign.h" |
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126 #endif |
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127 |
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128 #include "l1_ctl.h" |
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129 |
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130 #endif |
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131 |
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132 #if (RF_FAM == 61) |
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133 #include "tpudrv61.h" |
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134 #endif |
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135 |
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136 |
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137 |
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138 /* |
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139 * Prototypes of external functions used in this file. |
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140 * |
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141 * FreeCalypso change: removed all those prototypes which appear |
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142 * in tpudrv.h, and kept only the additional ones. |
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143 */ |
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144 |
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145 #if ((REL99 == 1) && (FF_BHO == 1)) |
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146 #if (L1_MADC_ON == 1) |
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147 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq,UWORD8 adc_active); |
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148 #else |
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149 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq); |
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150 #endif |
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151 #endif//#if ((REL99 == 1) && (FF_BHO == 1)) |
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152 |
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153 void Cust_get_ramp_tab(API *a_ramp, UWORD8 txpwr_ramp_up, UWORD8 txpwr_ramp_down, UWORD16 radio_freq); |
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154 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (RF_FAM == 61)) |
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155 UWORD16 Cust_get_pwr_data(UWORD8 txpwr, UWORD16 radio_freq |
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156 #if(REL99 && FF_PRF) |
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157 ,UWORD8 number_uplink_timeslot |
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158 #endif |
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159 ); |
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160 #endif |
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161 |
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162 #if L1_GPRS |
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163 void l1ps_reset_db_mcu_to_dsp(T_DB_MCU_TO_DSP_GPRS *page_ptr); |
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164 #endif |
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165 |
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166 /*-------------------------------------------------------*/ |
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167 /* l1ddsp_load_info() */ |
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168 /*-------------------------------------------------------*/ |
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169 /* Parameters : */ |
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170 /* Return : */ |
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171 /* Functionality : */ |
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172 /*-------------------------------------------------------*/ |
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173 void l1ddsp_load_info(UWORD32 task, API *info_ptr, UWORD8 *data) |
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174 { |
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175 if(task == RACH_DSP_TASK) |
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176 // RACH info. format is only 2 words... |
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177 { |
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178 info_ptr[0] = ((API)(data[0])) | ((API)(data[1])<<8); |
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179 } |
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180 else |
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181 // Fill mcu-dsp comm. buffer. |
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182 { |
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183 UWORD8 i,j; |
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184 |
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185 // Fill data block Header... |
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186 info_ptr[0] = (1 << B_BLUD); // 1st word: Set B_BLU bit. |
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187 info_ptr[1] = 0; // 2nd word: cleared. |
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188 info_ptr[2] = 0; // 3rd word: cleared. |
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189 |
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190 if((info_ptr == l1s_dsp_com.dsp_ndb_ptr->a_du_0) || |
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191 (info_ptr == l1s_dsp_com.dsp_ndb_ptr->a_du_1)) |
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192 // DATA traffic buffers: size of buffer is 260 bit -> 17 words but DATA traffic uses |
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193 // only a max of 240 bit (30 bytes) -> 15 words. |
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194 { |
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195 for (i=0, j=(3+0); j<(3+15); j++) |
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196 { |
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197 info_ptr[j] = ((API)(data[i])) | ((API)(data[i+1]) << 8); |
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198 i += 2; |
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199 } |
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200 #if (TRACE_TYPE==3) |
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201 if (l1_stats.type == PLAY_UL) |
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202 { |
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203 for (i=0, j=(3+0); j<(3+17); j++) |
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204 { |
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205 info_ptr[j] = ((API)(data[i])) | |
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206 ((API)(data[i]) << 8); |
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207 i ++; |
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208 } |
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209 } |
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210 #endif |
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211 } |
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212 else |
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213 // Data block for control purpose is 184 bit length: 23 bytes: 12 words (16 bit/word). |
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214 { |
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215 // Copy first 22 bytes in the first 11 words after header. |
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216 for (i=0, j=(3+0); j<(3+11); j++) |
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217 { |
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218 info_ptr[j] = ((API)(data[i])) | ((API)(data[i+1]) << 8); |
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219 i += 2; |
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220 } |
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221 |
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222 // Copy last UWORD8 (23rd) in the 12th word after header. |
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223 info_ptr[14] = data[22]; |
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224 } |
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225 } |
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226 } |
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227 |
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228 /*-------------------------------------------------------*/ |
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229 /* l1ddsp_load_monit_task() */ |
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230 /*-------------------------------------------------------*/ |
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231 /* Parameters : */ |
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232 /* Return : */ |
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233 /* Functionality : */ |
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234 /*-------------------------------------------------------*/ |
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235 void l1ddsp_load_monit_task(API monit_task, API fb_mode) |
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236 { |
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237 l1s_dsp_com.dsp_db_w_ptr->d_task_md = monit_task; // Write number of measurements |
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238 |
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239 if(l1a_l1s_com.mode == CS_MODE) |
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240 l1s_dsp_com.dsp_ndb_ptr->d_fb_mode = fb_mode; // Write FB detection algo. mode. |
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241 else |
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242 l1s_dsp_com.dsp_ndb_ptr->d_fb_mode = 1; |
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243 } |
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244 |
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245 |
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246 /* --------------------------------------------------- */ |
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247 |
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248 /* Locosto Changes....*/ |
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249 |
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250 // Parameters: UWORD16 afcval |
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251 // Return :Void |
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252 //Functionality: TPU to accept the afcvalue from the MCU and copy it |
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253 //to the mem_xtal before triggering of AFC Script in DRP |
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254 |
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255 #if(RF_FAM == 61) |
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256 void l1dtpu_load_afc(UWORD16 afc) |
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257 { |
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258 l1dmacro_afc(afc, 0); |
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259 } |
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260 |
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261 /* --------------------------------------------------- */ |
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262 |
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263 /* Locosto Changes....*/ |
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264 |
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265 /* Parameters: API dco_algo_ctl_sb */ |
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266 /* Functionality: Loads the API d_dco_ctl_algo_sb in the API |
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267 This should be called after updating the value in the API via cust_Get_dco_algo_ctl(...) */ |
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268 |
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269 /* --------------------------------------------------- */ |
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270 |
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271 void l1ddsp_load_dco_ctl_algo_sb (UWORD16 dco_ctl_algo) |
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272 { |
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273 #if (DSP == 38) || (DSP == 39) |
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274 l1s_dsp_com.dsp_db_common_w_ptr->d_dco_algo_ctrl_sb = (API) dco_ctl_algo; |
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275 #endif |
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276 } |
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277 |
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278 /* --------------------------------------------------- */ |
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279 |
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280 /* Locosto Changes....*/ |
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281 |
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282 /* Parameters: API dco_algo_ctl_nb */ |
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283 /* Functionality: Loads the API d_dco_ctl_algo_nb in the API |
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284 This should be called after updating the value in the API via cust_Get_dco_algo_ctl(...) */ |
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285 |
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286 /* --------------------------------------------------- */ |
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287 |
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288 void l1ddsp_load_dco_ctl_algo_nb (UWORD16 dco_ctl_algo) |
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289 { |
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290 #if (DSP == 38) || (DSP == 39) |
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291 l1s_dsp_com.dsp_db_common_w_ptr->d_dco_algo_ctrl_nb = (API) dco_ctl_algo; |
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292 #endif |
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293 |
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294 } |
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295 /* --------------------------------------------------- */ |
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296 |
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297 /* Locosto Changes....*/ |
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298 |
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299 /* Parameters: API dco_algo_ctl_pw */ |
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300 /* Functionality: Loads the API d_dco_ctl_algo_pw in the API |
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301 This should be called after updating the value in the API via cust_Get_dco_algo_ctl(...) */ |
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302 |
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303 /* --------------------------------------------------- */ |
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304 |
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305 void l1ddsp_load_dco_ctl_algo_pw (UWORD16 dco_ctl_algo) |
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306 { |
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307 #if (DSP == 38) || (DSP == 39) |
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308 l1s_dsp_com.dsp_db_common_w_ptr->d_dco_algo_ctrl_pw = (API) dco_ctl_algo; |
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309 #endif |
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310 } |
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311 |
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312 #endif |
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313 |
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314 /*-------------------------------------------------------*/ |
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315 /* l1ddsp_load_afc() */ |
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316 /*-------------------------------------------------------*/ |
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317 /* Parameters : */ |
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318 /* Return : */ |
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319 /* Functionality : */ |
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320 /*-------------------------------------------------------*/ |
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321 void l1ddsp_load_afc(API afc) |
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322 { |
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323 #if (L1_EOTD==1) |
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324 // NEW !!! For EOTD measurements in IDLE mode only, cut AFC updates.... |
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325 #if (L1_GPRS) |
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326 if ( (l1a_l1s_com.nsync.eotd_meas_session == FALSE) || |
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327 (l1a_l1s_com.mode == DEDIC_MODE)|| |
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328 (l1a_l1s_com.l1s_en_task[PDTCH] == TASK_ENABLED)) |
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329 #else |
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330 if ( (l1a_l1s_com.nsync.eotd_meas_session == FALSE) || |
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331 (l1a_l1s_com.mode == DEDIC_MODE)) |
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332 #endif |
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333 |
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334 { |
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335 #endif |
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336 //######################## For DSP Rom ################################# |
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337 l1s_dsp_com.dsp_db_w_ptr->d_afc = afc; // Write new afc command. |
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338 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (RF_FAM == 61)) |
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339 // NOTE: In Locosto AFC loading is w.r.t DRP not in ABB |
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340 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= (1 << B_AFC); // Validate new afc value. |
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341 #endif |
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342 #if (L1_EOTD==1) |
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343 } |
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344 #endif |
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345 |
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346 } |
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347 |
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348 /*-------------------------------------------------------*/ |
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349 /* l1ddsp_load_txpwr() */ |
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350 /*-------------------------------------------------------*/ |
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351 /* Parameters : */ |
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352 /* Return : */ |
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353 /* Functionality : */ |
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354 /*Notes: |
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355 |
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356 While Programming APC Ramp always Program the APCDEL also |
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357 Cal+: |
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358 APCDEL1: LSB Dwn(9:5):Up(4:0) |
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359 APCDEL2: MSB Dwn(9:5):Up(4:0) |
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360 |
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361 Locosto: |
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362 APCDEL1: LSB Dwn(9:5):Up(4:0) |
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363 APCDEL2: MSB Dwn(9:5):Up(4:0) |
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364 ----- |
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365 Cal+ |
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366 APCRAM : Dwn(51:11)Up(10:6)Forced(0) |
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367 Locosto: |
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368 APCRAM: Dwn(9:5)Up(4:0) |
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369 |
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370 For AFC, APCDEL1, APCDEL2, APCRAMP the Control word d_ctl_abb is checked |
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371 i f they are reqd to be updated. |
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372 |
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373 For AUXAPC (Cal+), the last bit = 1 would mean the DSP would pick it at Tx |
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374 For APCLEV (Loc), it is picked at every Tx, for dummy burst DSP would make it 0 |
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375 */ |
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376 |
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377 /*-------------------------------------------------------*/ |
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378 void l1ddsp_load_txpwr(UWORD8 txpwr, UWORD16 radio_freq) |
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379 { |
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380 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (RF_FAM == 61)) |
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381 UWORD16 pwr_data; |
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382 #endif |
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383 |
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384 //config |
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385 if (l1_config.tx_pwr_code ==0) |
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386 { |
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387 // Fixed TXPWR. |
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388 l1s_dsp_com.dsp_db_w_ptr->d_power_ctl = l1_config.params.fixed_txpwr; // GSM management disabled: Fixed TXPWR used. |
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389 |
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390 |
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391 #if(RF_FAM == 61) |
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392 //Locosto has new API for Ramp |
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393 #if (DSP == 38) || (DSP == 39) |
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394 Cust_get_ramp_tab(l1s_dsp_com.dsp_ndb_ptr->a_drp_ramp, txpwr, txpwr, radio_freq); |
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395 #endif |
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396 #else |
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397 #if (CODE_VERSION != SIMULATION) |
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398 /*** Reference to real ramp array (GSM: 15 power levels, 5-19, DCS: 16 power levels, 0-15) ***/ |
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399 Cust_get_ramp_tab(l1s_dsp_com.dsp_ndb_ptr->a_ramp, txpwr, txpwr, radio_freq); |
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400 #endif |
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401 #endif |
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402 |
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403 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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404 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL) | (1 << B_BULRAMPDEL2)); |
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405 #endif |
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406 |
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407 #if(RF_FAM == 61) |
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408 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL) | (1 << B_BULRAMPDEL2)); |
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409 #endif |
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410 |
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411 } |
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412 else |
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413 { |
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414 static UWORD8 last_used_freq_band = 0; |
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415 UWORD8 freq_band; |
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416 |
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417 #if (L1_FF_MULTIBAND == 0) |
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418 // Check whether band has changed |
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419 // This will be used to reload ramps |
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420 if ((l1_config.std.id == DUAL) || |
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421 (l1_config.std.id == DUALEXT) || |
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422 (l1_config.std.id == DUAL_US)) |
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423 { |
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424 if (radio_freq < l1_config.std.first_radio_freq_band2) |
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425 freq_band = BAND1; |
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426 else |
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parents:
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427 freq_band = BAND2; |
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parents:
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428 } |
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429 else |
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430 freq_band = BAND1; |
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431 #else |
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432 |
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433 freq_band = l1_multiband_radio_freq_convert_into_effective_band_id(radio_freq); |
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434 |
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435 #endif |
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436 |
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parents:
diff
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437 // Note: txpwr = NO_TXPWR is reserved for forcing the transmitter off |
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parents:
diff
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438 // ----- (to suppress SACCH during handover, for example) |
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parents:
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439 |
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440 /*** Check to see if the TXPWR is to be suppressed (txpwr = NO_TXPWR) ***/ |
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parents:
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|
441 |
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442 if(txpwr == NO_TXPWR) |
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443 { |
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parents:
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444 /*** No transmit ***/ |
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445 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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parents:
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446 l1s_dsp_com.dsp_db_w_ptr->d_power_ctl = 0x12; // AUXAPC initialization addr 9 pg 0 Omega |
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parents:
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447 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL) | (1 << B_BULRAMPDEL2)); |
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parents:
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448 #endif |
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449 |
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parents:
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450 #if(RF_FAM == 61 ) //Locosto without Syren Format |
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parents:
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451 l1s_dsp_com.dsp_db_w_ptr->d_power_ctl = (API) 0; // APCLEV |
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parents:
diff
changeset
|
452 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL) | (1 << B_BULRAMPDEL2)); |
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parents:
diff
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453 #endif |
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parents:
diff
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|
454 |
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parents:
diff
changeset
|
455 l1s.last_used_txpwr = NO_TXPWR; |
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parents:
diff
changeset
|
456 return; |
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parents:
diff
changeset
|
457 } |
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parents:
diff
changeset
|
458 else |
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parents:
diff
changeset
|
459 { |
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parents:
diff
changeset
|
460 /*** Get power data according to clipped TXPWR ***/ |
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parents:
diff
changeset
|
461 pwr_data = Cust_get_pwr_data(txpwr, radio_freq |
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parents:
diff
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|
462 #if(REL99 && FF_PRF) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
463 ,1 |
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parents:
diff
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|
464 #endif |
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parents:
diff
changeset
|
465 ); |
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parents:
diff
changeset
|
466 |
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parents:
diff
changeset
|
467 /*** Load power control level adding the APC address register ***/ |
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parents:
diff
changeset
|
468 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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parents:
diff
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|
469 l1s_dsp_com.dsp_db_w_ptr->d_power_ctl = ((pwr_data << 6) | 0x12); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
470 // AUXAPC initialization addr 9 pg 0 Omega |
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parents:
diff
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|
471 #endif |
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parents:
diff
changeset
|
472 |
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parents:
diff
changeset
|
473 #if(RF_FAM == 61) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
474 l1s_dsp_com.dsp_db_w_ptr->d_power_ctl = (API)(pwr_data); |
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parents:
diff
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|
475 #endif |
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parents:
diff
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|
476 } |
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parents:
diff
changeset
|
477 |
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parents:
diff
changeset
|
478 #if TESTMODE |
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parents:
diff
changeset
|
479 #if(RF_FAM == 61) |
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parents:
diff
changeset
|
480 // Currently for RF_FAM=61 Enabling APC-Ramp, APCDEL1 and APCDEL2 writing always i.e. in every TDMA frame |
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parents:
diff
changeset
|
481 // TODO: Check whether this is okay |
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parents:
diff
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|
482 if ((l1_config.TestMode) && (l1_config.tmode.rf_params.down_up & TMODE_UPLINK)) |
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parents:
diff
changeset
|
483 #else |
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parents:
diff
changeset
|
484 if ((l1_config.TestMode) && (l1_config.tmode.rf_params.down_up & TMODE_UPLINK) && |
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parents:
diff
changeset
|
485 ((l1s.last_used_txpwr != txpwr) || (l1_config.tmode.rf_params.reload_ramps_flag))) |
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parents:
diff
changeset
|
486 #endif |
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parents:
diff
changeset
|
487 { |
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parents:
diff
changeset
|
488 #if(RF_FAM == 61) |
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parents:
diff
changeset
|
489 #if (DSP == 38) || (DSP == 39) |
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parents:
diff
changeset
|
490 Cust_get_ramp_tab(l1s_dsp_com.dsp_ndb_ptr->a_drp_ramp, txpwr, txpwr, radio_freq); |
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parents:
diff
changeset
|
491 #endif |
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parents:
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|
492 #else |
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|
493 #if (CODE_VERSION != SIMULATION) |
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parents:
diff
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|
494 Cust_get_ramp_tab(l1s_dsp_com.dsp_ndb_ptr->a_ramp, txpwr, txpwr, radio_freq); |
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parents:
diff
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|
495 #endif |
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|
496 #endif |
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parents:
diff
changeset
|
497 |
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changeset
|
498 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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parents:
diff
changeset
|
499 // Setting bit 3 of this register causes DSP to write to APCDEL1 register in Omega. However, |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
500 // we are controlling this register from MCU through the SPI. Therefore, set it to 0. |
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parents:
diff
changeset
|
501 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (0 << B_BULRAMPDEL) | (1 << B_BULRAMPDEL2)); |
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parents:
diff
changeset
|
502 #endif |
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parents:
diff
changeset
|
503 |
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parents:
diff
changeset
|
504 #if (RF_FAM == 61) |
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parents:
diff
changeset
|
505 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL) | (1 << B_BULRAMPDEL2)); |
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parents:
diff
changeset
|
506 #endif |
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parents:
diff
changeset
|
507 |
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parents:
diff
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|
508 l1s.last_used_txpwr = txpwr; |
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parents:
diff
changeset
|
509 l1_config.tmode.rf_params.reload_ramps_flag = 0; |
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parents:
diff
changeset
|
510 } |
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parents:
diff
changeset
|
511 else |
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parents:
diff
changeset
|
512 #endif |
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parents:
diff
changeset
|
513 |
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parents:
diff
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|
514 if ((l1s.last_used_txpwr != txpwr) || (last_used_freq_band != freq_band)) |
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parents:
diff
changeset
|
515 { |
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parents:
diff
changeset
|
516 /*** Power level or band has changed, so update the ramp, and trigger the data send to ABB ***/ |
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parents:
diff
changeset
|
517 |
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parents:
diff
changeset
|
518 l1s.last_used_txpwr = txpwr; |
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parents:
diff
changeset
|
519 last_used_freq_band = freq_band; |
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parents:
diff
changeset
|
520 |
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parents:
diff
changeset
|
521 /*** Reference to real ramp array (GSM: 15 power levels, 5-19, DCS: 16 power levels, 0-15) ***/ |
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parents:
diff
changeset
|
522 #if(RF_FAM == 61) |
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parents:
diff
changeset
|
523 #if (DSP == 38) || (DSP == 39) |
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parents:
diff
changeset
|
524 Cust_get_ramp_tab(l1s_dsp_com.dsp_ndb_ptr->a_drp_ramp, txpwr, txpwr, radio_freq); |
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parents:
diff
changeset
|
525 #endif |
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parents:
diff
changeset
|
526 #else |
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diff
changeset
|
527 #if (CODE_VERSION != SIMULATION) |
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diff
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528 Cust_get_ramp_tab(l1s_dsp_com.dsp_ndb_ptr->a_ramp, txpwr, txpwr, radio_freq); |
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529 #endif |
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530 #endif |
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531 |
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532 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) ||(RF_FAM == 61)) |
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533 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_abb |= ( (1 << B_RAMP) | (1 << B_BULRAMPDEL) | (1 << B_BULRAMPDEL2)); |
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534 #endif |
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535 } |
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536 } |
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537 } |
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538 |
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539 #if (FF_L1_FAST_DECODING == 1) |
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540 /*-------------------------------------------------------*/ |
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541 /* l1ddsp_load_fp_task() */ |
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542 /*-------------------------------------------------------*/ |
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543 /* Parameters : */ |
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544 /* Return : */ |
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545 /* Functionality : */ |
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546 /*-------------------------------------------------------*/ |
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547 void l1ddsp_load_fast_dec_task(API task, UWORD8 burst_id) |
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548 { |
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549 if (l1s_check_fast_decoding_authorized(task)) |
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550 { |
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551 //l1s_dsp_com.dsp_db_w_ptr->d_fast_paging_ctrl = 0x0001 |
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552 l1s_dsp_com.dsp_db_common_w_ptr->d_fast_paging_ctrl = 0x00001; |
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553 if(burst_id == BURST_1) |
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554 { |
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555 l1s_dsp_com.dsp_db_common_w_ptr->d_fast_paging_ctrl |= 0x8000; |
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556 } |
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557 } |
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558 } |
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559 #endif /* FF_L1_FAST_DECODING */ |
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560 |
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561 /*-------------------------------------------------------*/ |
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562 /* l1ddsp_load_rx_task() */ |
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563 /*-------------------------------------------------------*/ |
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parents:
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564 /* Parameters : */ |
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565 /* Return : */ |
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566 /* Functionality : */ |
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567 /*-------------------------------------------------------*/ |
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parents:
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568 void l1ddsp_load_rx_task(API rx_task, UWORD8 burst_id, UWORD8 tsq) |
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parents:
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569 { |
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570 l1s_dsp_com.dsp_db_w_ptr->d_task_d = rx_task; // Write RX task Identifier. |
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571 l1s_dsp_com.dsp_db_w_ptr->d_burst_d = burst_id; // Write RX burst Identifier. |
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572 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_system |= tsq << B_TSQ; // Write end of task DSP state. |
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parents:
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573 } |
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574 |
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parents:
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575 /*-------------------------------------------------------*/ |
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parents:
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576 /* l1ddsp_load_tx_task() */ |
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577 /*-------------------------------------------------------*/ |
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parents:
diff
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578 /* Parameters : */ |
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changeset
|
579 /* Return : */ |
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parents:
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580 /* Functionality : */ |
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parents:
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581 /*-------------------------------------------------------*/ |
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582 void l1ddsp_load_tx_task(API tx_task, UWORD8 burst_id, UWORD8 tsq) |
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parents:
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583 { |
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parents:
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584 l1s_dsp_com.dsp_db_w_ptr->d_task_u = tx_task; // write TX task Identifier. |
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diff
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585 l1s_dsp_com.dsp_db_w_ptr->d_burst_u = burst_id; // write TX burst Identifier. |
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parents:
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586 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_system |= tsq << B_TSQ; // Write end of task DSP state. |
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parents:
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|
587 } |
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changeset
|
588 |
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parents:
diff
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589 /*-------------------------------------------------------*/ |
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parents:
diff
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590 /* l1ddsp_load_ra_task() */ |
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|
591 /*-------------------------------------------------------*/ |
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parents:
diff
changeset
|
592 /* Parameters : */ |
50a15a54801e
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593 /* Return : */ |
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parents:
diff
changeset
|
594 /* Functionality : */ |
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595 /*-------------------------------------------------------*/ |
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parents:
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changeset
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596 void l1ddsp_load_ra_task(API ra_task) |
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parents:
diff
changeset
|
597 { |
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598 l1s_dsp_com.dsp_db_w_ptr->d_task_ra = ra_task; // write RA task Identifier. |
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parents:
diff
changeset
|
599 } |
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changeset
|
600 |
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changeset
|
601 /*-------------------------------------------------------*/ |
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602 /* l1ddsp_load_tch_mode() */ |
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603 /*-------------------------------------------------------*/ |
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changeset
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604 /* Parameters : */ |
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605 /* Return : */ |
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606 /* Functionality : */ |
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607 /*-------------------------------------------------------*/ |
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608 void l1ddsp_load_tch_mode(UWORD8 dai_mode, BOOL dtx_allowed) |
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609 { |
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610 // TCH mode register. |
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611 // bit[0] -> b_eotd. |
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parents:
diff
changeset
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612 // bit[1] -> b_audio_async only for WCP |
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613 // bit [2] -> b_dtx. |
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614 // bit[3] -> play_ul when set to 1 |
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615 // bit[4] -> play_dl when set to 1 |
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616 // bit[5] -> DTX selection for voice memo |
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617 // bit[6] -> Reserved for ciphering debug |
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618 // bit[7..10] -> Reserved for ramp up control |
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619 // bit[11] -> Reserved for analog device selection |
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620 |
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621 #if (DSP == 32) |
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622 UWORD16 mask = 0xfffb; |
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623 #else // NO OP_WCP |
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624 UWORD16 mask = 0xfff8; |
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625 #endif |
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626 |
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627 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode = (l1s_dsp_com.dsp_ndb_ptr->d_tch_mode & mask) |
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628 | (dtx_allowed<<2); |
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629 #if (L1_EOTD == 1) |
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630 l1s_dsp_com.dsp_ndb_ptr->d_tch_mode |= B_EOTD; |
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631 #endif |
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632 } |
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633 |
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634 #if (AMR == 1) |
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635 /*-------------------------------------------------------*/ |
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636 /* l1ddsp_load_tch_param() */ |
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637 /*-------------------------------------------------------*/ |
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638 /* Parameters : */ |
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639 /* Return : */ |
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640 /* Functionality : */ |
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641 /*-------------------------------------------------------*/ |
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642 #if (FF_L1_TCH_VOCODER_CONTROL == 1) |
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643 void l1ddsp_load_tch_param(T_TIME_INFO *next_time, UWORD8 chan_mode, |
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644 UWORD8 chan_type, UWORD8 subchannel, |
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645 UWORD8 tch_loop, UWORD8 sync_tch, |
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646 UWORD8 sync_amr, |
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647 UWORD8 reset_sacch, |
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648 #if !FF_L1_IT_DSP_DTX |
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649 UWORD8 vocoder_on) |
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650 #else |
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651 UWORD8 vocoder_on, |
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652 BOOL dtx_dsp_interrupt) |
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653 #endif |
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654 #else |
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655 void l1ddsp_load_tch_param(T_TIME_INFO *next_time, UWORD8 chan_mode, |
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656 UWORD8 chan_type, UWORD8 subchannel, |
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657 UWORD8 tch_loop, UWORD8 sync_tch, |
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658 #if !FF_L1_IT_DSP_DTX |
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659 UWORD8 sync_amr) |
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660 #else |
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661 UWORD8 sync_amr, BOOL dtx_dsp_interrupt) |
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662 #endif |
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663 #endif |
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664 { |
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665 UWORD32 count_0; |
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666 UWORD32 count_1; |
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667 UWORD32 d_ctrl_tch; |
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668 UWORD32 d_fn; |
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669 |
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670 // d_ctrl_tch |
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671 // ---------- |
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672 // bit [0..3] -> b_chan_mode |
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673 // bit [4..7] -> b_chan_type |
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674 // bit [8] -> b_sync_tch_ul |
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675 // bit [9] -> b_sync_amr |
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676 // bit [10] -> b_stop_tch_ul |
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677 // bit [11] -> b_stop_tch_dl |
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678 // bit [12..14] -> b_tch_loop |
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679 // bit [15] -> b_subchannel |
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680 #if (FF_L1_TCH_VOCODER_CONTROL == 1) |
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681 d_ctrl_tch = (chan_mode<<B_CHAN_MODE) | (chan_type<<B_CHAN_TYPE) | (subchannel<<B_SUBCHANNEL) | |
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682 (sync_tch<<B_SYNC_TCH_UL) | (sync_amr<<B_SYNC_AMR) | |
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683 (tch_loop<<B_TCH_LOOP) | (reset_sacch<<B_RESET_SACCH) | (vocoder_on<<B_VOCODER_ON); |
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684 #else |
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685 d_ctrl_tch = (chan_mode<<B_CHAN_MODE) | (chan_type<<B_CHAN_TYPE) | (subchannel<<B_SUBCHANNEL) | |
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686 (sync_tch<<B_SYNC_TCH_UL) | (sync_amr<<B_SYNC_AMR) | |
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687 (tch_loop<<B_TCH_LOOP); |
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688 #endif |
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689 |
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690 // d_fn |
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691 // ---- |
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692 // bit [0..7] -> b_fn_report |
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693 // bit [8..15] -> b_fn_sid |
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694 d_fn = (next_time->fn_in_report) | ((next_time->fn%104)<<8); |
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695 |
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696 // a_a5fn |
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697 // ------ |
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698 // count_0 (a_a5fn[0]), bit [0..4] -> T2. |
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699 // count_0 (a_a5fn[1]), bit [5..10] -> T3. |
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700 // count_1 (a_a5fn[0]), bit [0..10] -> T1. |
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701 count_0 = ((UWORD16)next_time->t3 << 5) | (next_time->t2); |
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702 count_1 = (next_time->t1); |
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|
703 |
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704 l1s_dsp_com.dsp_db_w_ptr->d_fn = d_fn; // write both Fn_sid, Fn_report. |
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705 l1s_dsp_com.dsp_db_w_ptr->a_a5fn[0] = count_0; // cyphering FN part 1. |
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706 l1s_dsp_com.dsp_db_w_ptr->a_a5fn[1] = count_1; // cyphering FN part 2. |
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707 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_tch = d_ctrl_tch; // Channel config. |
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708 #if FF_L1_IT_DSP_DTX |
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709 // ### TBD: report this block below in the other instance of this function |
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710 // DTX interrupt request is latched by DSP in TDMA3 (TCH-AFS, TCH-AHS0) or TDMA0 (TCH-AHS1) |
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711 if ((chan_mode == TCH_AFS_MODE) || (chan_mode == TCH_AHS_MODE)) |
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|
712 { |
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|
713 if (((next_time->fn_mod13_mod4 == 3) && |
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714 ((chan_mode == TCH_AFS_MODE) || ((subchannel == 0)))) || |
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715 ((next_time->fn_mod13_mod4 == 0) && |
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716 ((chan_mode == TCH_AHS_MODE) && (subchannel == 1))) |
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|
717 ) |
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|
718 { |
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|
719 if (dtx_dsp_interrupt) |
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|
720 l1s_dsp_com.dsp_ndb_ptr->d_fast_dtx_enable=1; |
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721 else |
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722 l1s_dsp_com.dsp_ndb_ptr->d_fast_dtx_enable=0; |
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|
723 |
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|
724 } |
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|
725 } |
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726 // Fast DTX not supported |
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727 else |
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728 { |
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|
729 // No interrupt genaration |
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|
730 l1s_dsp_com.dsp_ndb_ptr->d_fast_dtx_enable=0; |
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|
731 } |
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|
732 #endif |
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|
733 } |
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|
734 #else |
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|
735 /*-------------------------------------------------------*/ |
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parents:
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changeset
|
736 /* l1ddsp_load_tch_param() */ |
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parents:
diff
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|
737 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
738 /* Parameters : */ |
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parents:
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|
739 /* Return : */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
740 /* Functionality : */ |
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parents:
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|
741 /*-------------------------------------------------------*/ |
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parents:
diff
changeset
|
742 #if (FF_L1_TCH_VOCODER_CONTROL == 1) |
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parents:
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743 void l1ddsp_load_tch_param(T_TIME_INFO *next_time, UWORD8 chan_mode, |
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parents:
diff
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|
744 UWORD8 chan_type, UWORD8 subchannel, |
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parents:
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|
745 UWORD8 tch_loop, UWORD8 sync_tch, |
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parents:
diff
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|
746 #if !FF_L1_IT_DSP_DTX |
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parents:
diff
changeset
|
747 UWORD8 reset_sacch, UWORD8 vocoder_on) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
748 #else |
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parents:
diff
changeset
|
749 UWORD8 reset_sacch, UWORD8 vocoder_on, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
750 BOOL dtx_dsp_interrupt) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
751 #endif |
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parents:
diff
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|
752 #else |
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parents:
diff
changeset
|
753 void l1ddsp_load_tch_param(T_TIME_INFO *next_time, UWORD8 chan_mode, |
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parents:
diff
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|
754 UWORD8 chan_type, UWORD8 subchannel, |
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parents:
diff
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|
755 #if !FF_L1_IT_DSP_DTX |
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parents:
diff
changeset
|
756 UWORD8 tch_loop, UWORD8 sync_tch) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
757 #else |
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parents:
diff
changeset
|
758 UWORD8 tch_loop, UWORD8 sync_tch, |
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parents:
diff
changeset
|
759 BOOL dtx_dsp_interrupt) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
760 #endif |
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parents:
diff
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|
761 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
762 { |
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parents:
diff
changeset
|
763 UWORD32 count_0; |
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parents:
diff
changeset
|
764 UWORD32 count_1; |
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parents:
diff
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|
765 UWORD32 d_ctrl_tch; |
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parents:
diff
changeset
|
766 UWORD32 d_fn; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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changeset
|
767 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
768 // d_ctrl_tch |
50a15a54801e
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parents:
diff
changeset
|
769 // ---------- |
50a15a54801e
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parents:
diff
changeset
|
770 // bit [0..3] -> b_chan_mode |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
771 // bit [4..7] -> b_chan_type |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
772 // bit [8] -> b_sync_tch_ul |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
773 // bit [9] -> b_sync_tch_dl |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
774 // bit [10] -> b_stop_tch_ul |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
775 // bit [11] -> b_stop_tch_dl |
50a15a54801e
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parents:
diff
changeset
|
776 // bit [12..14] -> b_tch_loop |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
777 // bit [15] -> b_subchannel |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
778 #if (FF_L1_TCH_VOCODER_CONTROL == 1) |
50a15a54801e
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parents:
diff
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|
779 d_ctrl_tch = (chan_mode<<B_CHAN_MODE) | (chan_type<<B_CHAN_TYPE) | (subchannel<<B_SUBCHANNEL) | |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
780 (sync_tch<<B_SYNC_TCH_UL) | (sync_tch<<B_SYNC_TCH_DL) | |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
781 (tch_loop<<B_TCH_LOOP) | (reset_sacch<<B_RESET_SACCH) | (vocoder_on<<B_VOCODER_ON); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
782 #else |
50a15a54801e
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parents:
diff
changeset
|
783 d_ctrl_tch = (chan_mode<<B_CHAN_MODE) | (chan_type<<B_CHAN_TYPE) | (subchannel<<B_SUBCHANNEL) | |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
784 (sync_tch<<B_SYNC_TCH_UL) | (sync_tch<<B_SYNC_TCH_DL) | |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
785 (tch_loop<<B_TCH_LOOP); |
50a15a54801e
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parents:
diff
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|
786 #endif |
50a15a54801e
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parents:
diff
changeset
|
787 |
50a15a54801e
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parents:
diff
changeset
|
788 // d_fn |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
789 // ---- |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
790 // bit [0..7] -> b_fn_report |
50a15a54801e
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parents:
diff
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|
791 // bit [8..15] -> b_fn_sid |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
792 d_fn = (next_time->fn_in_report) | ((next_time->fn%104)<<8); |
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parents:
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|
793 |
50a15a54801e
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parents:
diff
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|
794 // a_a5fn |
50a15a54801e
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parents:
diff
changeset
|
795 // ------ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
796 // count_0 (a_a5fn[0]), bit [0..4] -> T2. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
797 // count_0 (a_a5fn[1]), bit [5..10] -> T3. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
798 // count_1 (a_a5fn[0]), bit [0..10] -> T1. |
50a15a54801e
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parents:
diff
changeset
|
799 count_0 = ((UWORD16)next_time->t3 << 5) | (next_time->t2); |
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parents:
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|
800 count_1 = (next_time->t1); |
50a15a54801e
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parents:
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changeset
|
801 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
802 l1s_dsp_com.dsp_db_w_ptr->d_fn = d_fn; // write both Fn_sid, Fn_report. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
803 l1s_dsp_com.dsp_db_w_ptr->a_a5fn[0] = count_0; // cyphering FN part 1. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
804 l1s_dsp_com.dsp_db_w_ptr->a_a5fn[1] = count_1; // cyphering FN part 2. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
805 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_tch = d_ctrl_tch; // Channel config. |
50a15a54801e
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parents:
diff
changeset
|
806 } |
50a15a54801e
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parents:
diff
changeset
|
807 #endif |
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parents:
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changeset
|
808 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
809 #if (L1_VOCODER_IF_CHANGE == 0) |
50a15a54801e
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parents:
diff
changeset
|
810 // TODO: to be moved in API file (see BUG3093) |
50a15a54801e
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parents:
diff
changeset
|
811 BOOL enable_tch_vocoder(BOOL vocoder) |
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Mychaela Falconia <falcon@freecalypso.org>
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changeset
|
812 { |
50a15a54801e
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parents:
diff
changeset
|
813 #if (FF_L1_TCH_VOCODER_CONTROL == 1) |
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parents:
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|
814 // To enable the vocoder, we set the trigger => then handled in l1s_dedicated_mode_manager |
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parents:
diff
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|
815 #if (W_A_DSP_PR20037 == 1) |
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parents:
diff
changeset
|
816 if ((vocoder==TRUE) && (l1a_l1s_com.dedic_set.start_vocoder == TCH_VOCODER_DISABLED)) |
50a15a54801e
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parents:
diff
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|
817 { |
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parents:
diff
changeset
|
818 l1a_l1s_com.dedic_set.start_vocoder = TCH_VOCODER_ENABLE_REQ; |
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changeset
|
819 |
50a15a54801e
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parents:
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|
820 #if ( L1M_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE ==1) |
50a15a54801e
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parents:
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changeset
|
821 NU_Sleep(DSP_VOCODER_ON_TRANSITION); // DSP transition |
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parents:
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|
822 #endif |
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|
823 } |
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changeset
|
824 // When vocoder_on = FALSE, vocoder module is not executed |
50a15a54801e
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parents:
diff
changeset
|
825 else if ((vocoder==FALSE) && (l1a_l1s_com.dedic_set.start_vocoder == TCH_VOCODER_ENABLED)) |
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diff
changeset
|
826 { |
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parents:
diff
changeset
|
827 l1a_l1s_com.dedic_set.start_vocoder = TCH_VOCODER_DISABLE_REQ; |
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changeset
|
828 } |
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parents:
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|
829 #else // W_A_DSP_PR20037 == 0 |
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parents:
diff
changeset
|
830 if (vocoder) |
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diff
changeset
|
831 { |
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parents:
diff
changeset
|
832 l1a_l1s_com.dedic_set.start_vocoder = TRUE; |
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changeset
|
833 } |
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diff
changeset
|
834 // When vocoder_on = FALSE, vocoder module is not executed |
50a15a54801e
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changeset
|
835 else |
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diff
changeset
|
836 { |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
837 l1a_l1s_com.dedic_set.vocoder_on = FALSE; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
838 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
839 #endif // W_A_DSP_PR20037 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
840 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
841 return TRUE; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
842 #else |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
843 return FALSE; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
844 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
845 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
846 #endif // L1_VOCODER_IF_CHANGE |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
847 BOOL l1_select_mcsi_port(UWORD8 port) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
848 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
849 #if ( (CHIPSET == 12) && (RF_FAM != 61) ) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
850 l1s_dsp_com.dsp_ndb_ptr->d_mcsi_select = (API)port; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
851 return TRUE; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
852 #else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
853 return FALSE; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
854 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
855 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
856 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
857 // TODO: to be moved in API file |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
858 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
859 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
860 /* l1ddsp_load_ciph_param() */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
861 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
862 /* Parameters : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
863 /* Return : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
864 /* Functionality : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
865 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
866 void l1ddsp_load_ciph_param(UWORD8 a5mode, |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
867 T_ENCRYPTION_KEY *ciph_key) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
868 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
869 // Store ciphering mode (0 for no ciphering) in MCU-DSP com. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
870 l1s_dsp_com.dsp_ndb_ptr->d_a5mode = a5mode; // A5 algorithm (0 for none). |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
871 // Store ciphering key. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
872 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
873 #if (L1_A5_3 == 1) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
874 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
875 if(a5mode == 3) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
876 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
877 #if(OP_L1_STANDALONE != 1) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
878 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[0] = (ciph_key->A[0]) | (ciph_key->A[1] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
879 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[1] = (ciph_key->A[2]) | (ciph_key->A[3] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
880 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[2] = (ciph_key->A[4]) | (ciph_key->A[5] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
881 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[3] = (ciph_key->A[6]) | (ciph_key->A[7] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
882 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[4] = (ciph_key->A[8]) | (ciph_key->A[9] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
883 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[5] = (ciph_key->A[10]) | (ciph_key->A[11] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
884 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[6] = (ciph_key->A[12]) | (ciph_key->A[13] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
885 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[7] = (ciph_key->A[14]) | (ciph_key->A[15] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
886 #else // (OP_L1_STANDALONE == 1) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
887 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[0] = (ciph_key->A[0]) | (ciph_key->A[1] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
888 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[1] = (ciph_key->A[2]) | (ciph_key->A[3] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
889 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[2] = (ciph_key->A[4]) | (ciph_key->A[5] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
890 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[3] = (ciph_key->A[6]) | (ciph_key->A[7] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
891 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[4] = (ciph_key->A[8]) | (ciph_key->A[1] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
892 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[5] = (ciph_key->A[10]) | (ciph_key->A[3] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
893 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[6] = (ciph_key->A[12]) | (ciph_key->A[5] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
894 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[7] = (ciph_key->A[14]) | (ciph_key->A[7] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
895 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
896 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
897 else // a5mode == 1 or 2 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
898 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
899 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[0] = (ciph_key->A[0]) | (ciph_key->A[1] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
900 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[1] = (ciph_key->A[2]) | (ciph_key->A[3] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
901 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[2] = (ciph_key->A[4]) | (ciph_key->A[5] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
902 l1s_dsp_com.dsp_ndb_ptr->a_a5_kc[3] = (ciph_key->A[6]) | (ciph_key->A[7] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
903 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
904 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
905 #else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
906 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
907 l1s_dsp_com.dsp_ndb_ptr->a_kc[0] = (ciph_key->A[0]) | (ciph_key->A[1] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
908 l1s_dsp_com.dsp_ndb_ptr->a_kc[1] = (ciph_key->A[2]) | (ciph_key->A[3] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
909 l1s_dsp_com.dsp_ndb_ptr->a_kc[2] = (ciph_key->A[4]) | (ciph_key->A[5] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
910 l1s_dsp_com.dsp_ndb_ptr->a_kc[3] = (ciph_key->A[6]) | (ciph_key->A[7] << 8); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
911 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
912 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
913 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
914 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
915 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
916 /* l1ddsp_stop_tch() */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
917 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
918 /* Parameters : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
919 /* Return : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
920 /* Functionality : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
921 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
922 void l1ddsp_stop_tch(void) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
923 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
924 // Tch channel description. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
925 // bit [10] -> b_stop_tch_ul, stop TCH/UL. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
926 // bit [11] -> b_stop_tch_dl, stop TCH/DL. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
927 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
928 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_tch |= 3 << B_STOP_TCH_UL; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
929 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
930 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
931 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
932 /* l1ddsp_meas_read() */ |
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parents:
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933 /*-------------------------------------------------------*/ |
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parents:
diff
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|
934 /* Parameters : */ |
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parents:
diff
changeset
|
935 /* Return : */ |
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parents:
diff
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|
936 /* Functionality : */ |
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parents:
diff
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|
937 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
938 void l1ddsp_meas_read(UWORD8 nbmeas, UWORD8 *pm) |
50a15a54801e
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parents:
diff
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|
939 { |
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parents:
diff
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|
940 UWORD8 i; |
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|
941 |
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parents:
diff
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|
942 for (i= 0; i < nbmeas; i++) |
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parents:
diff
changeset
|
943 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
944 pm[i] = ((l1s_dsp_com.dsp_db_r_ptr->a_pm[i] & 0xffff) >> 5); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
945 } |
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parents:
diff
changeset
|
946 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
947 #if TESTMODE |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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changeset
|
948 if(l1_config.TestMode) |
50a15a54801e
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parents:
diff
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|
949 l1tm.tmode_stats.pm_recent = l1s_dsp_com.dsp_db_r_ptr->a_pm[0] & 0xffff; |
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parents:
diff
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|
950 #endif |
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parents:
diff
changeset
|
951 } |
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parents:
diff
changeset
|
952 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
953 #if (AMR == 1) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
954 /*-------------------------------------------------------*/ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
955 /* l1ddsp_load_amr_param() */ |
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parents:
diff
changeset
|
956 /*-------------------------------------------------------*/ |
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parents:
diff
changeset
|
957 /* Parameters : AMR configuration */ |
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parents:
diff
changeset
|
958 /* Return : none */ |
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parents:
diff
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|
959 /* Functionality : Download the AMR configuration to the */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
960 /* DSP via API */ |
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parents:
diff
changeset
|
961 /*-------------------------------------------------------*/ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
962 void l1ddsp_load_amr_param(T_AMR_CONFIGURATION amr_param, UWORD8 cmip) |
50a15a54801e
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parents:
diff
changeset
|
963 { |
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parents:
diff
changeset
|
964 // Clear the AMR API buffer |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
965 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[0] = (API)0; |
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parents:
diff
changeset
|
966 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[1] = (API)0; |
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parents:
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|
967 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[2] = (API)0; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
968 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[3] = (API)0; |
50a15a54801e
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parents:
diff
changeset
|
969 |
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parents:
diff
changeset
|
970 // Set the AMR parameters |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
971 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[NSCB_INDEX] |= (API)((amr_param.noise_suppression_bit & NSCB_MASK ) << NSCB_SHIFT); |
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972 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[ICMUL_INDEX] |= (API)((amr_param.initial_codec_mode & ICM_MASK ) << ICMUL_SHIFT); |
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diff
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|
973 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[ICMDL_INDEX] |= (API)((amr_param.initial_codec_mode & ICM_MASK ) << ICMDL_SHIFT); |
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parents:
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|
974 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[ICMIUL_INDEX] |= (API)((amr_param.initial_codec_mode_indicator & ICMI_MASK ) << ICMIUL_SHIFT); |
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parents:
diff
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|
975 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[ICMIDL_INDEX] |= (API)((amr_param.initial_codec_mode_indicator & ICMI_MASK ) << ICMIDL_SHIFT); |
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diff
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976 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[ACSUL_INDEX] |= (API)((amr_param.active_codec_set & ACS_MASK ) << ACSUL_SHIFT); |
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|
977 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[ACSDL_INDEX] |= (API)((amr_param.active_codec_set & ACS_MASK ) << ACSDL_SHIFT); |
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978 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[THR1_INDEX] |= (API)((amr_param.threshold[0] & THR_MASK ) << THR1_SHIFT); |
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|
979 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[THR2_INDEX] |= (API)((amr_param.threshold[1] & THR_MASK ) << THR2_SHIFT); |
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diff
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|
980 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[THR3_INDEX] |= (API)((amr_param.threshold[2] & THR_MASK ) << THR3_SHIFT); |
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parents:
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changeset
|
981 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[HYST1_INDEX] |= (API)((amr_param.hysteresis[0] & HYST_MASK ) << HYST1_SHIFT); |
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parents:
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|
982 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[HYST2_INDEX] |= (API)((amr_param.hysteresis[1] & HYST_MASK ) << HYST2_SHIFT); |
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diff
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|
983 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[HYST3_INDEX] |= (API)((amr_param.hysteresis[2] & HYST_MASK ) << HYST3_SHIFT); |
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|
984 l1s_dsp_com.dsp_ndb_ptr->a_amr_config[CMIP_INDEX] |= (API)((cmip & CMIP_MASK ) << CMIP_SHIFT); |
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|
985 } |
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986 #endif |
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|
987 |
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988 #if (L1_SAIC != 0) |
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diff
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|
989 /*-------------------------------------------------------*/ |
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parents:
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990 /* l1ddsp_load_swh_flag() */ |
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991 /*-------------------------------------------------------*/ |
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992 /* Parameters : SWH (Spatial Whitening) Flag */ |
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993 /* Return : none */ |
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994 /* Functionality : To write the d_swh_ApplyWhitening flag*/ |
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995 /*-------------------------------------------------------*/ |
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996 void l1ddsp_load_swh_flag (UWORD16 SWH_flag, UWORD16 SAIC_flag) |
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997 { |
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998 |
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diff
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|
999 if(SAIC_flag) |
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|
1000 { |
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1001 l1s_dsp_com.dsp_db_common_w_ptr->d_swh_ctrl_db = SAIC_ENABLE_DB; |
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|
1002 if(SWH_flag) |
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1003 { |
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1004 l1s_dsp_com.dsp_db_common_w_ptr->d_swh_ctrl_db |= (0x01<< B_SWH_DB); |
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|
1005 } |
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1006 } |
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1007 else |
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changeset
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1008 { |
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1009 l1s_dsp_com.dsp_db_common_w_ptr->d_swh_ctrl_db = 0; |
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diff
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1010 } |
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1011 } |
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1012 #endif |
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changeset
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1013 |
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|
1014 /*-------------------------------------------------------*/ |
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1015 /* l1ddsp_end_scenario() */ |
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1016 /*-------------------------------------------------------*/ |
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1017 /* Parameters : */ |
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1018 /* Return : */ |
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1019 /* Functionality : */ |
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1020 /*-------------------------------------------------------*/ |
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1021 void l1ddsp_end_scenario(UWORD8 type) |
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diff
changeset
|
1022 { |
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diff
changeset
|
1023 #if (CODE_VERSION == SIMULATION) |
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1024 #if (AUDIO_SIMULATION) |
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|
1025 switch(type) |
50a15a54801e
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diff
changeset
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1026 { |
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changeset
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1027 case GSM_CTL: |
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changeset
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1028 case GSM_MISC_CTL: |
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changeset
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1029 // a DSP control for a GSM task or |
50a15a54801e
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changeset
|
1030 // a DSP control for a GSM and a MISC tasks |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1031 //----------------------------- |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1032 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1033 // set DSP_ENB and DSP_PAG for communication interrupt |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1034 l1s_tpu_com.reg_cmd->dsp_pag_bit = l1s_dsp_com.dsp_w_page; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1035 l1s_tpu_com.reg_cmd->dsp_enb_bit = ON; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1036 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1037 // change DSP page pointer for next controle |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1038 l1s_dsp_com.dsp_w_page ^= 1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1039 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1040 break; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1041 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1042 case MISC_CTL: |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1043 // a DSP control for a MISC task |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1044 //------------------------------ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1045 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1046 // set only MISC task and reset MISC page |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1047 // (don't change GSM PAGE). |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1048 // set DSP communication Interrupt. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1049 // set DSP_ENB and the same DSP_PAG for communication interrupt |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1050 l1s_tpu_com.reg_cmd->dsp_pag_bit = l1s_dsp_com.dsp_w_page^1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1051 l1s_tpu_com.reg_cmd->dsp_enb_bit = ON; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1052 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1053 break; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1054 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1055 #else // NO AUDIO_SIMULATION |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1056 // set DSP_ENB and DSP_PAG for communication interrupt |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1057 l1s_tpu_com.reg_cmd->dsp_pag_bit = l1s_dsp_com.dsp_w_page; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1058 l1s_tpu_com.reg_cmd->dsp_enb_bit = ON; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1059 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1060 // change DSP page pointer for next control |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1061 l1s_dsp_com.dsp_w_page ^= 1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1062 #endif // AUDIO_SIMULATION |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1063 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1064 #else // NOT_SIMULATION |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1065 UWORD32 dsp_task; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1066 switch(type) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1067 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1068 case GSM_CTL: |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1069 // a DSP control for a GSM task |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1070 //----------------------------- |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1071 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1072 // set only GSM task and GSM page |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1073 dsp_task = B_GSM_TASK | l1s_dsp_com.dsp_w_page; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1074 // change DSP page pointer for next controle |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1075 l1s_dsp_com.dsp_w_page ^= 1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1076 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1077 break; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1078 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1079 case MISC_CTL: |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1080 // a DSP control for a MISC task |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1081 //------------------------------ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1082 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1083 UWORD32 previous_page = l1s_dsp_com.dsp_w_page ^ 1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1084 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1085 // set only MISC task and reset MISC page |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1086 // (don't change GSM PAGE). |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1087 // set DSP communication Interrupt. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1088 dsp_task = B_MISC_TASK | previous_page; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1089 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1090 // Rem: DSP makes the DB header feedback even in case |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1091 // of MISC task (like TONES). This created some |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1092 // side effect which are "work-around" passing |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1093 // the correct DB page to the DSP. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1094 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1095 break; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1096 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1097 case GSM_MISC_CTL: |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1098 // a DSP control for a GSM and a MISC tasks |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1099 //----------------------------------------- |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1100 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1101 // set GSM task, MISC task and GSM page bit..... |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1102 dsp_task = B_GSM_TASK | B_MISC_TASK | l1s_dsp_com.dsp_w_page; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1103 // change DSP page pointer for next controle |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1104 l1s_dsp_com.dsp_w_page ^= 1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1105 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1106 break; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1107 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1108 #if 0 /* enable this after TCS211 reconstruction */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1109 default: |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1110 dsp_task = 0; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1111 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1112 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1113 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1114 // write dsp tasks..... |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1115 #if (DSP >= 33) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1116 l1s_dsp_com.dsp_ndb_ptr->d_dsp_page = (API) dsp_task; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1117 #else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1118 l1s_dsp_com.dsp_param_ptr->d_dsp_page = (API) dsp_task; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1119 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1120 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1121 // Enable frame IT on next TDMA |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1122 l1dmacro_set_frame_it(); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1123 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1124 #if (DSP >= 38) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1125 // DSP CPU load measurement - write logic (provide TDMA frame number to DSP) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1126 (*((volatile UWORD16 *)(DSP_CPU_LOAD_MCU_W_TDMA_FN))) = (API)l1s.actual_time.fn_mod42432; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1127 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1128 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1129 #endif // NOT_SIMULATION |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1130 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1131 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1132 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1133 /* l1dtpu_meas() */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1134 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1135 /* Parameters : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1136 /* Return : */ |
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1137 /* Functionality : */ |
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1138 |
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1139 /* Locosto : should take additional Param of task */ |
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1140 |
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|
1141 /*-------------------------------------------------------*/ |
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1142 void l1dtpu_meas(UWORD16 radio_freq, |
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1143 WORD8 agc, |
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1144 UWORD8 lna_off, |
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1145 UWORD16 win_id, |
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1146 UWORD16 tpu_synchro, UWORD8 adc_active |
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1147 #if(RF_FAM == 61) |
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1148 ,UWORD8 afc_mode |
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1149 ,UWORD8 if_ctl |
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1150 #endif |
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1151 ) |
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1152 |
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1153 { |
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1154 |
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1155 WORD16 offset; |
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1156 WORD16 when; |
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1157 UWORD16 offset_chg; |
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1158 |
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1159 #if TESTMODE |
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1160 if (!l1_config.agc_enable) |
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|
1161 { |
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1162 // AGC gain can only be controlled in 2dB steps as the bottom bit (bit zero) |
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1163 // corresponds to the lna_off bit |
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1164 agc = l1_config.tmode.rx_params.agc; |
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1165 lna_off = l1_config.tmode.rx_params.lna_off; |
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1166 } |
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1167 #endif // TESTMODE |
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1168 |
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1169 // Compute offset |
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1170 offset_chg = ((win_id * BP_DURATION) >> BP_SPLIT_PW2); |
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1171 offset = tpu_synchro + offset_chg; |
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1172 if(offset >= TPU_CLOCK_RANGE) offset -= TPU_CLOCK_RANGE; |
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1173 |
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|
1174 // Compute offset change timing |
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1175 when = offset_chg + PROVISION_TIME - (l1_config.params.rx_synth_setup_time + EPSILON_OFFS); |
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parents:
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1176 if(when < 0) when += TPU_CLOCK_RANGE; |
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1177 |
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1178 // Program TPU scenario |
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1179 l1dmacro_offset (offset, when); // change TPU offset according to win_id |
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1180 l1dmacro_rx_synth (radio_freq); // pgme SYNTH. |
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1181 if(adc_active == ACTIVE) |
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1182 l1dmacro_adc_read_rx(); // pgme ADC measurement |
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1183 |
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1184 l1dmacro_agc (radio_freq, agc,lna_off |
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1185 #if (RF_FAM == 61) |
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1186 ,if_ctl |
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1187 #endif |
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1188 ); // pgme AGC. |
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1189 #if (CODE_VERSION == SIMULATION) |
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1190 l1dmacro_rx_ms (radio_freq, 0); // pgm PWR acquisition. |
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1191 #else |
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1192 #if (L1_MADC_ON == 1) |
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1193 #if (RF_FAM == 61) |
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1194 l1dmacro_rx_ms (radio_freq,adc_active); // pgm PWR acquisition. |
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1195 #endif |
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1196 #else |
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1197 l1dmacro_rx_ms (radio_freq); // pgm PWR acquisition. |
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1198 #endif |
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1199 #endif |
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|
1200 l1dmacro_offset (tpu_synchro, IMM); // restore offset |
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1201 |
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1202 //Locosto |
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1203 #if(RF_FAM == 61) |
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|
1204 // L1_AFC_SCRIPT_MODE - This is specific to Locosto to make AFC script run after |
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1205 // the second power measurement during FBNEW |
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|
1206 if ((win_id == 0) || (afc_mode == L1_AFC_SCRIPT_MODE)) |
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|
1207 #else |
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|
1208 if (win_id == 0) |
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|
1209 #endif |
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|
1210 { |
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|
1211 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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|
1212 // NOTE: In Locosto AFC is in DRP not in triton |
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|
1213 l1ddsp_load_afc(l1s.afc); |
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|
1214 #endif |
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|
1215 |
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|
1216 //Locosto |
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1217 #if(RF_FAM == 61) |
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1218 if(afc_mode != L1_AFC_NONE) |
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|
1219 { |
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diff
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|
1220 if(afc_mode == L1_AFC_SCRIPT_MODE) |
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|
1221 { |
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|
1222 l1dtpu_load_afc(l1s.afc); //Load the Initial afc value to the TPU. TPU would copy it to the DRP Wrapper Mem. |
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|
1223 } |
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|
1224 else |
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|
1225 { |
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|
1226 l1ddsp_load_afc(l1s.afc); |
50a15a54801e
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|
1227 } |
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|
1228 } |
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parents:
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|
1229 #endif |
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|
1230 // end Locosto |
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|
1231 } |
50a15a54801e
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|
1232 } |
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|
1233 |
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|
1234 /*-------------------------------------------------------*/ |
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|
1235 /* l1dtpu_neig_fb() */ |
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|
1236 /*-------------------------------------------------------*/ |
50a15a54801e
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|
1237 /* Parameters : */ |
50a15a54801e
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diff
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|
1238 /* Return : */ |
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parents:
diff
changeset
|
1239 /* Functionality : */ |
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|
1240 /*-------------------------------------------------------*/ |
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diff
changeset
|
1241 void l1dtpu_neig_fb(UWORD16 radio_freq, WORD8 agc, UWORD8 lna_off) |
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Mychaela Falconia <falcon@freecalypso.org>
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changeset
|
1242 { |
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parents:
diff
changeset
|
1243 #if TESTMODE |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1244 if (!l1_config.agc_enable) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1245 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1246 // AGC gain can only be controlled in 2dB steps as the bottom bit (bit zero) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1247 // corresponds to the lna_off bit |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1248 agc = l1_config.tmode.rx_params.agc; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1249 lna_off = l1_config.tmode.rx_params.lna_off; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1250 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1251 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1252 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1253 l1dmacro_rx_synth (radio_freq); // pgme SYNTH. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1254 l1dmacro_agc (radio_freq,agc, lna_off |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1255 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1256 ,IF_120KHZ_DSP |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1257 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1258 ); // pgme AGC. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1259 #if (L1_MADC_ON == 1) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1260 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1261 l1dmacro_rx_fb (radio_freq,INACTIVE); // pgm FB acquisition. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1262 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1263 #else |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1264 l1dmacro_rx_fb (radio_freq); // pgm FB acquisition. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1265 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1266 } |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1267 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1268 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1269 /* l1dtpu_neig_fb26() */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1270 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1271 /* Parameters : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1272 /* Return : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1273 /* Functionality : */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1274 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1275 void l1dtpu_neig_fb26(UWORD16 radio_freq, WORD8 agc, UWORD8 lna_off, UWORD32 offset_serv) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1276 { |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1277 WORD16 offset; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1278 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1279 #if TESTMODE |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1280 if (!l1_config.agc_enable) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1281 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1282 // AGC gain can only be controlled in 2dB steps as the bottom bit (bit zero) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1283 // corresponds to the lna_off bit |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1284 agc = l1_config.tmode.rx_params.agc; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1285 lna_off = l1_config.tmode.rx_params.lna_off; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1286 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
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parents:
diff
changeset
|
1287 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1288 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1289 // Compute offset |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1290 offset = offset_serv + l1_config.params.fb26_anchoring_time; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1291 if(offset >= TPU_CLOCK_RANGE) offset -= TPU_CLOCK_RANGE; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1292 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1293 // Program TPU scenario |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1294 l1dmacro_offset (offset, l1_config.params.fb26_change_offset_time); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1295 l1dmacro_rx_synth (radio_freq); // pgme SYNTH. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1296 l1dmacro_agc (radio_freq,agc, lna_off |
50a15a54801e
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parents:
diff
changeset
|
1297 #if (RF_FAM == 61) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1298 ,IF_120KHZ_DSP |
50a15a54801e
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parents:
diff
changeset
|
1299 #endif |
50a15a54801e
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parents:
diff
changeset
|
1300 ); // pgme AGC. |
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parents:
diff
changeset
|
1301 #if (L1_MADC_ON == 1) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1302 #if (RF_FAM == 61) |
50a15a54801e
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parents:
diff
changeset
|
1303 l1dmacro_rx_fb26 (radio_freq, INACTIVE); // pgm FB acquisition. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1304 #endif |
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diff
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|
1305 #else |
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parents:
diff
changeset
|
1306 l1dmacro_rx_fb26 (radio_freq); // pgm FB acquisition. |
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parents:
diff
changeset
|
1307 #endif |
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parents:
diff
changeset
|
1308 l1dmacro_offset (offset_serv, IMM); // restore offset |
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parents:
diff
changeset
|
1309 } |
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parents:
diff
changeset
|
1310 |
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parents:
diff
changeset
|
1311 /*-------------------------------------------------------*/ |
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parents:
diff
changeset
|
1312 /* l1dtpu_neig_sb() */ |
50a15a54801e
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parents:
diff
changeset
|
1313 /*-------------------------------------------------------*/ |
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changeset
|
1314 /* Parameters : */ |
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parents:
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changeset
|
1315 /* Return : */ |
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parents:
diff
changeset
|
1316 /* Functionality : */ |
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parents:
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changeset
|
1317 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
1318 void l1dtpu_neig_sb(UWORD16 radio_freq, WORD8 agc, UWORD8 lna_off, |
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parents:
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changeset
|
1319 UWORD32 time_alignmt, UWORD32 offset_serv, UWORD8 reload_flag, |
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|
1320 UWORD8 attempt |
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parents:
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changeset
|
1321 #if (RF_FAM == 61) |
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parents:
diff
changeset
|
1322 ,UWORD8 if_ctl |
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parents:
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changeset
|
1323 #endif |
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diff
changeset
|
1324 ) |
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parents:
diff
changeset
|
1325 { |
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parents:
diff
changeset
|
1326 UWORD16 offset_neigh; |
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parents:
diff
changeset
|
1327 |
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diff
changeset
|
1328 #if TESTMODE |
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changeset
|
1329 if (!l1_config.agc_enable) |
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parents:
diff
changeset
|
1330 { |
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parents:
diff
changeset
|
1331 // AGC gain can only be controlled in 2dB steps as the bottom bit (bit zero) |
50a15a54801e
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parents:
diff
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|
1332 // corresponds to the lna_off bit |
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diff
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|
1333 agc = l1_config.tmode.rx_params.agc; |
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diff
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|
1334 lna_off = l1_config.tmode.rx_params.lna_off; |
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changeset
|
1335 } |
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|
1336 #endif |
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changeset
|
1337 |
50a15a54801e
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parents:
diff
changeset
|
1338 // compute offset neighbour... |
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parents:
diff
changeset
|
1339 offset_neigh = offset_serv + time_alignmt; |
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diff
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|
1340 if(offset_neigh >= TPU_CLOCK_RANGE) offset_neigh -= TPU_CLOCK_RANGE; |
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changeset
|
1341 |
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diff
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|
1342 // load OFFSET with NEIGHBOUR value. |
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parents:
diff
changeset
|
1343 l1dmacro_offset (offset_neigh, l1_config.params.rx_change_offset_time); |
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parents:
diff
changeset
|
1344 |
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parents:
diff
changeset
|
1345 // Insert 1 NOP to correct the EPSILON_SYNC side effect. |
50a15a54801e
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parents:
diff
changeset
|
1346 if(attempt != 2) |
50a15a54801e
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parents:
diff
changeset
|
1347 if(time_alignmt >= (TPU_CLOCK_RANGE - EPSILON_SYNC)) |
50a15a54801e
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parents:
diff
changeset
|
1348 l1dmacro_offset (offset_neigh, 0); // load OFFSET with NEIGHBOUR value. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
1349 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1350 l1dmacro_rx_synth(radio_freq); // pgme SYNTH. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1351 l1dmacro_agc (radio_freq, agc, lna_off |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1352 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1353 ,if_ctl |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1354 #endif |
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parents:
diff
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|
1355 ); // pgme AGC. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1356 #if (L1_MADC_ON == 1) |
50a15a54801e
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parents:
diff
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|
1357 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1358 l1dmacro_rx_sb (radio_freq,INACTIVE); // pgm SB acquisition. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1359 #endif |
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parents:
diff
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|
1360 #else |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1361 l1dmacro_rx_sb (radio_freq); // pgm SB acquisition. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1362 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1363 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1364 // Restore offset with serving value. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1365 if(reload_flag == TRUE) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1366 { |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1367 l1dmacro_offset (offset_serv, IMM); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1368 } |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1369 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1370 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
1371 /* l1dtpu_neig_fbsb() */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1372 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1373 /* Parameters : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1374 /* Return : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1375 /* Functionality : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1376 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1377 #if ((REL99 == 1) && (FF_BHO == 1)) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1378 /*void l1dtpu_neig_fbsb(UWORD16 radio_freq, WORD8 agc, UWORD8 lna_off |
50a15a54801e
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parents:
diff
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|
1379 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1380 ,UWORD8 if_ctl |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1381 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1382 )*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1383 void l1dtpu_neig_fbsb(UWORD16 radio_freq, WORD8 agc, UWORD8 lna_off) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1384 { |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1385 #if TESTMODE |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1386 if (!l1_config.agc_enable) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1387 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1388 // AGC gain can only be controlled in 2dB steps as the bottom bit (bit zero) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
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parents:
diff
changeset
|
1389 // corresponds to the lna_off bit |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1390 agc = l1_config.tmode.rx_params.agc; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1391 lna_off = l1_config.tmode.rx_params.lna_off; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1392 } |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1393 #endif // TESTMODE |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1394 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1395 l1dmacro_rx_synth (radio_freq); // pgme SYNTH. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1396 /*l1dmacro_agc(radio_freq, agc, lna_off |
50a15a54801e
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parents:
diff
changeset
|
1397 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1398 ,if_ctl |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1399 #endif |
50a15a54801e
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parents:
diff
changeset
|
1400 ); // pgme AGC. |
50a15a54801e
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parents:
diff
changeset
|
1401 */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1402 l1dmacro_agc (radio_freq,agc, lna_off |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1403 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1404 ,L1_CTL_LOW_IF |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1405 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1406 ); // pgme AGC. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1407 #if (L1_MADC_ON == 1) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1408 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1409 l1dmacro_rx_fbsb(radio_freq,INACTIVE); // pgm FB acquisition. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1410 #endif |
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parents:
diff
changeset
|
1411 #else |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1412 l1dmacro_rx_fbsb(radio_freq); // pgm FB acquisition.- sajal commented |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1413 #endif |
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parents:
diff
changeset
|
1414 } |
50a15a54801e
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parents:
diff
changeset
|
1415 #endif // #if ((REL99 == 1) && (FF_BHO == 1)) |
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|
1416 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
1417 /* l1dtpu_neig_sb26() */ |
50a15a54801e
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parents:
diff
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|
1418 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
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changeset
|
1419 /* Parameters : */ |
50a15a54801e
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parents:
diff
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|
1420 /* Return : */ |
50a15a54801e
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parents:
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changeset
|
1421 /* Functionality : */ |
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parents:
diff
changeset
|
1422 /*-------------------------------------------------------*/ |
50a15a54801e
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diff
changeset
|
1423 void l1dtpu_neig_sb26(UWORD16 radio_freq, WORD8 agc, UWORD8 lna_off, UWORD32 time_alignmt, |
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changeset
|
1424 UWORD32 fn_offset, UWORD32 offset_serv |
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|
1425 #if (RF_FAM == 61) |
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parents:
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|
1426 ,UWORD8 if_ctl |
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parents:
diff
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|
1427 #endif |
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diff
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|
1428 ) |
50a15a54801e
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parents:
diff
changeset
|
1429 { |
50a15a54801e
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parents:
diff
changeset
|
1430 UWORD16 offset_neigh; |
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parents:
diff
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|
1431 |
50a15a54801e
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parents:
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changeset
|
1432 #if TESTMODE |
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|
1433 if (!l1_config.agc_enable) |
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parents:
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|
1434 { |
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parents:
diff
changeset
|
1435 // AGC gain can only be controlled in 2dB steps as the bottom bit (bit zero) |
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parents:
diff
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|
1436 // corresponds to the lna_off bit |
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diff
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|
1437 agc = l1_config.tmode.rx_params.agc; |
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|
1438 lna_off = l1_config.tmode.rx_params.lna_off; |
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diff
changeset
|
1439 } |
50a15a54801e
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|
1440 #endif |
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parents:
diff
changeset
|
1441 |
50a15a54801e
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parents:
diff
changeset
|
1442 // compute offset neighbour... |
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parents:
diff
changeset
|
1443 offset_neigh = offset_serv + time_alignmt; |
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parents:
diff
changeset
|
1444 if(offset_neigh >= TPU_CLOCK_RANGE) offset_neigh -= TPU_CLOCK_RANGE; |
50a15a54801e
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parents:
diff
changeset
|
1445 |
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parents:
diff
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|
1446 if(fn_offset != 0) |
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parents:
diff
changeset
|
1447 l1dmacro_offset (offset_neigh, 0); // 1 NOP in some case |
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parents:
diff
changeset
|
1448 else |
50a15a54801e
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parents:
diff
changeset
|
1449 l1dmacro_offset (offset_neigh, l1_config.params.fb26_change_offset_time); |
50a15a54801e
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parents:
diff
changeset
|
1450 |
50a15a54801e
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parents:
diff
changeset
|
1451 l1dmacro_rx_synth(radio_freq); // pgme SYNTH. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1452 l1dmacro_agc(radio_freq, agc, lna_off |
50a15a54801e
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parents:
diff
changeset
|
1453 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1454 ,if_ctl |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1455 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1456 ); // pgme AGC. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1457 #if (L1_MADC_ON == 1) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1458 #if (RF_FAM == 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1459 l1dmacro_rx_sb (radio_freq, INACTIVE); // pgm SB acquisition. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1460 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1461 #else |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1462 l1dmacro_rx_sb (radio_freq); // pgm SB acquisition. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1463 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1464 l1dmacro_offset (offset_serv, IMM); // Restore offset with serving value. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1465 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1466 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1467 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1468 /* l1dtpu_serv_rx_nb() */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1469 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1470 /* Parameters : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1471 /* Return : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1472 /* Functionality : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1473 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1474 void l1dtpu_serv_rx_nb(UWORD16 radio_freq, WORD8 agc, UWORD8 lna_off, |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1475 UWORD32 synchro_serv,UWORD32 new_offset,BOOL change_offset, |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1476 UWORD8 adc_active |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1477 #if(RF_FAM == 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1478 , UWORD8 csf_filter_choice |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1479 , UWORD8 if_ctl |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1480 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1481 #if (NEW_SNR_THRESHOLD == 1) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1482 , UWORD8 saic_flag |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1483 #endif/* NEW_SNR_THRESHOLD == 1*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1484 ) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1485 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1486 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1487 #if (CODE_VERSION == SIMULATION) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1488 UWORD32 tpu_w_page; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1489 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1490 if (hw.tpu_r_page==0) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1491 tpu_w_page=1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1492 else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1493 tpu_w_page=0; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1494 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1495 // Give the Ts related to the L1s |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1496 hw.rx_id[tpu_w_page][0]= ((TPU_CLOCK_RANGE+new_offset-synchro_serv)%TPU_CLOCK_RANGE)/TN_WIDTH; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1497 hw.num_rx[tpu_w_page][0]=1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1498 hw.rx_group_id[tpu_w_page]=1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1499 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1500 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1501 #if TESTMODE |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1502 if (!l1_config.agc_enable) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1503 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1504 // AGC gain can only be controlled in 2dB steps as the bottom bit (bit zero) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1505 // corresponds to the lna_off bit |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1506 agc = l1_config.tmode.rx_params.agc; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1507 lna_off = l1_config.tmode.rx_params.lna_off; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1508 } |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1509 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1510 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1511 l1dmacro_synchro (l1_config.params.rx_change_synchro_time, synchro_serv); // Adjust serving OFFSET. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1512 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1513 #if L2_L3_SIMUL |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1514 #if (DEBUG_TRACE == BUFFER_TRACE_OFFSET) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1515 buffer_trace(3, 0x43, synchro_serv,l1s.actual_time.fn,0); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1516 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1517 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1518 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1519 // Need to slide offset to cope with the new synchro. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1520 if(change_offset) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1521 l1dmacro_offset(new_offset, l1_config.params.rx_change_offset_time); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1522 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1523 l1dmacro_rx_synth(radio_freq); // load SYNTH. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1524 if(adc_active == ACTIVE) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1525 l1dmacro_adc_read_rx(); // pgme ADC measurement |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1526 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1527 l1dmacro_agc (radio_freq, agc, lna_off |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1528 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1529 ,if_ctl |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1530 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1531 ); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1532 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1533 #if TESTMODE && (CODE_VERSION != SIMULATION) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1534 // Continuous mode: Rx continuous scenario only on START_RX state. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1535 if ((l1_config.TestMode) && |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1536 (l1_config.tmode.rf_params.tmode_continuous == TM_START_RX_CONTINUOUS)) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1537 #if (L1_MADC_ON == 1) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1538 #if (RF_FAM == 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1539 l1dmacro_rx_cont (FALSE, radio_freq,adc_active,csf_filter_choice |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1540 #if (NEW_SNR_THRESHOLD == 1) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1541 ,saic_flag |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1542 #endif /* NEW_SNR_THRESHOLD*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1543 ); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1544 #endif /* RF_FAM == 61*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1545 #else /* L1_MADC_ON == 1 */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1546 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1547 l1dmacro_rx_cont (FALSE, radio_freq,csf_filter_choice); |
50a15a54801e
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parents:
diff
changeset
|
1548 #else |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1549 l1dmacro_rx_cont (FALSE, radio_freq); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1550 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1551 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1552 //TBD Danny New MAcro for Cont Tx reqd, to use only External Trigger |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1553 else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1554 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1555 #if ( L1_MADC_ON == 1) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1556 #if (RF_FAM == 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1557 l1dmacro_rx_nb (radio_freq, adc_active, csf_filter_choice |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1558 #if (NEW_SNR_THRESHOLD == 1) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1559 ,saic_flag |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1560 #endif /* NEW_SNR_THRESHOLD*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1561 ); // RX window for NB. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1562 #endif /* RF_FAM == 61*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1563 #else /* L1_MADC_ON == 1*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1564 #if (RF_FAM == 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1565 l1dmacro_rx_nb (radio_freq, csf_filter_choice); // RX window for NB. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1566 #else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1567 l1dmacro_rx_nb (radio_freq); // RX window for NB. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1568 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1569 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1570 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1571 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1572 l1ddsp_load_afc(l1s.afc); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1573 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1574 #if (RF_FAM == 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1575 l1dtpu_load_afc(l1s.afc); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1576 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1577 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1578 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1579 if(change_offset) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1580 l1dmacro_offset(synchro_serv, IMM); // Restore offset. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1581 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1582 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1583 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1584 /* l1dtpu_serv_tx_nb() */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1585 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1586 /* Parameters : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1587 /* Return : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1588 /* Functionality : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1589 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1590 void l1dtpu_serv_tx_nb(UWORD16 radio_freq, UWORD8 timing_advance, |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1591 UWORD32 offset_serv, UWORD8 txpwr, UWORD8 adc_active) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1592 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1593 WORD32 time; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1594 UWORD32 offset_tx; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1595 UWORD32 timing_advance_in_qbit = (UWORD32)timing_advance << 2; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1596 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1597 #if (CODE_VERSION == SIMULATION) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1598 UWORD32 tpu_w_page; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1599 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1600 if (hw.tpu_r_page==0) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1601 tpu_w_page=1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1602 else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1603 tpu_w_page=0; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1604 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1605 hw.tx_id[tpu_w_page][0]=3;// MS synchronized on TN=0 for RX => TN=3 for TX |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1606 hw.num_tx[tpu_w_page][0]=1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1607 hw.tx_group_id[tpu_w_page]=1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1608 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1609 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1610 // Reset timing advance if TA_ALGO not enabled. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1611 #if !TA_ALGO |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1612 timing_advance_in_qbit = 0; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1613 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1614 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1615 // Compute offset value for TX. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1616 // PRG_TX has become variable, no longer contained in TIME_OFFSET_TX ! |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1617 offset_tx = (offset_serv + TIME_OFFSET_TX-l1_config.params.prg_tx_gsm - timing_advance_in_qbit) ; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1618 if (offset_tx >= TPU_CLOCK_RANGE) offset_tx -= TPU_CLOCK_RANGE; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1619 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1620 // Check that RX controle has been already installed. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1621 // Offset for TX must be set an immediately if RX is there else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1622 // it must be performed EPSILON_SYNC before current offset time. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1623 if( l1s.tpu_ctrl_reg & CTRL_RX ) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1624 time = l1_config.params.tx_change_offset_time - l1_config.params.prg_tx_gsm; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1625 else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1626 time = TPU_CLOCK_RANGE - EPSILON_SYNC; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1627 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1628 l1dmacro_offset (offset_tx, time); // load OFFSET for TX before each burst. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1629 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1630 #if L2_L3_SIMUL |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1631 #if (DEBUG_TRACE == BUFFER_TRACE_OFFSET) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1632 buffer_trace(2, offset_tx,l1s.actual_time.fn,0,0); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1633 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1634 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1635 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1636 l1dmacro_tx_synth(radio_freq); // load SYNTH. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1637 #if TESTMODE && (CODE_VERSION != SIMULATION) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1638 // Continuous mode: Tx continuous scenario only on START_TX state. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1639 #if (RF_FAM != 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1640 if ((l1_config.TestMode) && |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1641 (l1_config.tmode.rf_params.tmode_continuous == TM_START_TX_CONTINUOUS)) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1642 l1dmacro_tx_cont (radio_freq, txpwr); // TX window for NB. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1643 else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1644 #endif // RF_FAM != 61 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1645 #if (RF_FAM == 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1646 // NOTE: In Test Mode and in TX Continuous, APC control is in manual mode |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1647 // This is done in l1tm_async.c |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1648 if ((l1_config.TestMode) && |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1649 (l1_config.tmode.rf_params.tmode_continuous == TM_START_TX_CONTINUOUS)) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1650 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1651 // NOTE: APC is set in manual mode from l1tm_async.c |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1652 l1dmacro_tx_cont (radio_freq, txpwr); // TX window for NB. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1653 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1654 else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1655 #endif // RF_FAM == 61 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1656 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1657 l1dmacro_tx_nb (radio_freq, txpwr, adc_active); // TX window for NB. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1658 // TX window for NB. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1659 l1dmacro_offset (offset_serv, IMM); // Restore offset with serving value. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1660 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1661 #if L2_L3_SIMUL |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1662 #if (DEBUG_TRACE == BUFFER_TRACE_OFFSET) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1663 buffer_trace(2, offset_serv,l1s.actual_time.fn,0,0); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1664 #endif |
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parents:
diff
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|
1665 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1666 } |
50a15a54801e
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parents:
diff
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|
1667 |
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parents:
diff
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|
1668 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
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|
1669 /* l1dtpu_neig_rx_nb() */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1670 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1671 /* Parameters : */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1672 /* Return : */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1673 /* Functionality : */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1674 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1675 void l1dtpu_neig_rx_nb(UWORD16 radio_freq, WORD8 agc, UWORD8 lna_off, |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1676 UWORD32 time_alignmt, UWORD32 offset_serv, UWORD8 reload_flag, |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1677 UWORD8 nop |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1678 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1679 ,UWORD8 if_ctl |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1680 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1681 #if (NEW_SNR_THRESHOLD == 1) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1682 ,UWORD8 saic_flag |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1683 #endif /* NEW_SNR_THRESHOLD*/ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1684 ) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1685 { |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1686 UWORD32 offset_neigh; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1687 #if (RF_FAM == 61) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1688 // By default we choose the hardware filter for neighbour Normal Bursts |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1689 UWORD8 csf_filter_choice = L1_SAIC_HARDWARE_FILTER; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1690 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1691 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1692 #if TESTMODE |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1693 if (!l1_config.agc_enable) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1694 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1695 // AGC gain can only be controlled in 2dB steps as the bottom bit (bit zero) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1696 // corresponds to the lna_off bit |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1697 agc = l1_config.tmode.rx_params.agc; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1698 lna_off = l1_config.tmode.rx_params.lna_off; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1699 } |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1700 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1701 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1702 // compute offset neighbour... |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1703 offset_neigh = (offset_serv + time_alignmt) ; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1704 if (offset_neigh >= TPU_CLOCK_RANGE) offset_neigh -= TPU_CLOCK_RANGE; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1705 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1706 l1dmacro_offset (offset_neigh, l1_config.params.rx_change_offset_time); // load OFFSET with NEIGHBOUR value. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1707 // Insert 1 NOP to correct the EPSILON_SYNC side effect |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1708 if (nop ==1) l1dmacro_offset (offset_neigh,0); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1709 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1710 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1711 l1dmacro_rx_synth(radio_freq); // load SYNTH. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1712 l1dmacro_agc (radio_freq, agc, lna_off |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1713 #if (RF_FAM == 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1714 ,if_ctl |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1715 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1716 ); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1717 #if (L1_MADC_ON == 1) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1718 #if (RF_FAM == 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1719 l1dmacro_rx_nb (radio_freq, INACTIVE, csf_filter_choice |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1720 #if (NEW_SNR_THRESHOLD == 1) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1721 ,saic_flag |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1722 #endif /* NEW_SNR_THRESHOLD*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1723 ) ; // RX window for NB. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1724 #endif /* RF_FAM == 61*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1725 #else /* L1_MADC_ON == 1*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1726 #if (RF_FAM == 61) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1727 l1dmacro_rx_nb (radio_freq, csf_filter_choice); // RX window for NB. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1728 #else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1729 l1dmacro_rx_nb (radio_freq); // RX window for NB. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1730 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1731 #endif |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1732 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1733 // Restore offset with serving value. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1734 if(reload_flag == TRUE) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1735 l1dmacro_offset (offset_serv, IMM); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1736 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1737 } |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1738 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1739 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1740 /* l1dtpu_serv_tx_ra() */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1741 /*-------------------------------------------------------*/ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1742 /* Parameters : "burst_id" gives the burst identifier */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1743 /* which is used for offset management. */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1744 /* Return : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1745 /* Functionality : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1746 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1747 void l1dtpu_serv_tx_ra(UWORD16 radio_freq, UWORD32 offset_serv, UWORD8 txpwr, UWORD8 adc_active) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1748 { |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1749 WORD32 time; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1750 UWORD32 offset_tx; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1751 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1752 // Compute offset value for TX. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1753 // Rem: Timing Advance is always 0 for a RA. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1754 // PRG_TX has become variable, no longer contained in TIME_OFFSET_TX ! |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1755 offset_tx = (offset_serv + TIME_OFFSET_TX-l1_config.params.prg_tx_gsm); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1756 if (offset_tx >= TPU_CLOCK_RANGE) offset_tx -= TPU_CLOCK_RANGE; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1757 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1758 // Check that RX controle has been already installed. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1759 // Offset for TX must be set an immediately if RX is there else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1760 // it must be performed EPSILON_SYNC before current offset time. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1761 if( l1s.tpu_ctrl_reg & CTRL_RX ) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1762 time = l1_config.params.tx_change_offset_time - l1_config.params.prg_tx_gsm; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1763 else |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1764 time = TPU_CLOCK_RANGE - EPSILON_SYNC; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1765 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1766 l1dmacro_offset (offset_tx, time); // load OFFSET for TX before each burst. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1767 #if L2_L3_SIMUL |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1768 #if (DEBUG_TRACE == BUFFER_TRACE_OFFSET) |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1769 buffer_trace(2, offset_tx,l1s.actual_time.fn,0,0); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1770 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1771 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1772 l1dmacro_tx_synth(radio_freq); // load SYNTH. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1773 l1dmacro_tx_ra (radio_freq, txpwr,adc_active); // TX window for RA. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1774 l1dmacro_offset (offset_serv, IMM); // Restore offset with serving value. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1775 #if L2_L3_SIMUL |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1776 #if (DEBUG_TRACE == BUFFER_TRACE_OFFSET) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1777 buffer_trace(2, offset_serv,l1s.actual_time.fn,0,0); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1778 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1779 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1780 } |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1781 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1782 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1783 /* l1dtpu_end_scenario() */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1784 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1785 /* Parameters : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1786 /* Return : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1787 /* Functionality : */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1788 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1789 void l1dtpu_end_scenario(void) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1790 { |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1791 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1792 // write IDLE at end of TPU page |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1793 // TPU_ENB and TPU_PAG are set in L1DMACRO_IDLE(). The TPU change |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1794 // is executed by the TPU itself and the TPU pointer is reset to |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1795 // start of page by l1dmacro_idle(); |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1796 l1dmacro_idle(); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1797 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1798 #if (CODE_VERSION == SIMULATION) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1799 #if LOGTPU_TRACE |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1800 log_macro(); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1801 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1802 #endif |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1803 // init pointer within new TPU page at 1st line |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1804 #if (CODE_VERSION == SIMULATION) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1805 // set TPU_ENB, TPU_PAG for communication interrupt |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1806 l1s_tpu_com.reg_cmd->tpu_pag_bit = l1s_tpu_com.tpu_w_page; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1807 l1s_tpu_com.reg_cmd->tpu_enb_bit = ON; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1808 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1809 // change TPU and DSP page pointer for next control |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1810 l1s_tpu_com.tpu_w_page ^= 1; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1811 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1812 // points on new "write TPU page"... |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1813 l1s_tpu_com.tpu_page_ptr=&(tpu.buf[l1s_tpu_com.tpu_w_page].line[0]); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1814 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1815 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1816 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1817 } |
50a15a54801e
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parents:
diff
changeset
|
1818 |
50a15a54801e
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parents:
diff
changeset
|
1819 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1820 /* l1d_reset_hw() */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1821 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
1822 /* Parameters : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1823 /* Return : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1824 /* Functionality : */ |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1825 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1826 void l1d_reset_hw(UWORD32 offset_value) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1827 { |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1828 #if (CODE_VERSION == SIMULATION) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1829 // Reset DSP write/read page, Reset TPU write page, reset "used" flag. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1830 l1s_dsp_com.dsp_w_page = 0; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1831 l1s_dsp_com.dsp_r_page = 0; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1832 l1s_tpu_com.tpu_w_page = 0; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1833 l1s_dsp_com.dsp_r_page_used = 0; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1834 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1835 // Reset communication pointers. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1836 l1s_dsp_com.dsp_ndb_ptr = &(buf.ndb); // MCU<->DSP comm. read/write (Non Double Buffered comm. memory). |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1837 l1s_dsp_com.dsp_db_r_ptr = &(buf.mcu_rd[l1s_dsp_com.dsp_r_page]); // MCU<->DSP comm. read page (Double Buffered comm. memory). |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1838 l1s_dsp_com.dsp_db_w_ptr = &(buf.mcu_wr[l1s_dsp_com.dsp_w_page]); // MCU<->DSP comm. write page (Double Buffered comm. memory). |
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parents:
diff
changeset
|
1839 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1840 // Reset task commands. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1841 l1s_dsp_com.dsp_db_w_ptr->d_task_d = NO_DSP_TASK; // Init. RX task to NO TASK. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1842 l1s_dsp_com.dsp_db_w_ptr->d_task_u = NO_DSP_TASK; // Init. TX task to NO TASK. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1843 l1s_dsp_com.dsp_db_w_ptr->d_task_ra = NO_DSP_TASK; // Init. RA task to NO TASK. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1844 l1s_dsp_com.dsp_db_w_ptr->d_task_md = NO_DSP_TASK; // Init. MONITORING task to NO TASK. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1845 |
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parents:
diff
changeset
|
1846 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1847 //Reset the TCH channel description |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1848 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_tch = 0; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1849 |
50a15a54801e
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parents:
diff
changeset
|
1850 #if (L1_GPRS) |
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parents:
diff
changeset
|
1851 // Reset communication pointers. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1852 l1ps_dsp_com.pdsp_db_r_ptr = &(buf.mcu_rd_gprs[l1s_dsp_com.dsp_r_page]); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1853 l1ps_dsp_com.pdsp_db_w_ptr = &(buf.mcu_wr_gprs[l1s_dsp_com.dsp_w_page]); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1854 |
50a15a54801e
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parents:
diff
changeset
|
1855 // Reset MCU->DSP page. |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1856 l1ps_reset_db_mcu_to_dsp(l1ps_dsp_com.pdsp_db_w_ptr); |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1857 #endif // L1_GPRS |
50a15a54801e
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parents:
diff
changeset
|
1858 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1859 // Direct access to TPU_RESET_BIT. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1860 l1s_tpu_com.reg_cmd->tpu_reset_bit = ON; // Reset TPU. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1861 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1862 // Reset TPU_ENB, DSP_ENB and TPU_PAG, DSP_PAG for communication interrupt |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1863 l1s_tpu_com.reg_cmd->tpu_pag_bit = 0; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1864 l1s_tpu_com.reg_cmd->dsp_pag_bit = 0; |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1865 l1s_tpu_com.reg_cmd->tpu_enb_bit = OFF; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1866 l1s_tpu_com.reg_cmd->dsp_enb_bit = OFF; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1867 |
50a15a54801e
src/cs/layer1: import from tcs211-l1-reconst project
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parents:
diff
changeset
|
1868 // Init pointer within TPU page 0 at 1st line |
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parents:
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1869 l1s_tpu_com.tpu_page_ptr = &(tpu.buf[0].line[0]); |
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parents:
diff
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|
1870 |
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parents:
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changeset
|
1871 // Load offset register according to serving cell. |
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parents:
diff
changeset
|
1872 l1dmacro_offset(offset_value, IMM); |
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parents:
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|
1873 |
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1874 #else // NOT_SIMULATION |
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parents:
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|
1875 |
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parents:
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changeset
|
1876 // Reset DSP write/read page, Reset TPU write page, reset "used" flag. |
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parents:
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|
1877 l1s_dsp_com.dsp_w_page = 0; |
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parents:
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|
1878 l1s_dsp_com.dsp_r_page = 0; |
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parents:
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|
1879 l1s_tpu_com.tpu_w_page = 0; |
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parents:
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|
1880 l1s_dsp_com.dsp_r_page_used = 0; |
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parents:
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|
1881 |
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parents:
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|
1882 // Reset communication pointers. |
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parents:
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1883 l1s_dsp_com.dsp_ndb_ptr = (T_NDB_MCU_DSP *) NDB_ADR; // MCU<->DSP comm. read/write (Non Double Buffered comm. memory). |
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parents:
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|
1884 l1s_dsp_com.dsp_db_r_ptr = (T_DB_DSP_TO_MCU *) DB_R_PAGE_0; // MCU<->DSP comm. read page (Double Buffered comm. memory). |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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changeset
|
1885 l1s_dsp_com.dsp_db_w_ptr = (T_DB_MCU_TO_DSP *) DB_W_PAGE_0; // MCU<->DSP comm. write page (Double Buffered comm. memory). |
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parents:
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|
1886 l1s_dsp_com.dsp_param_ptr= (T_PARAM_MCU_DSP *) PARAM_ADR; |
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parents:
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changeset
|
1887 |
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parents:
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changeset
|
1888 #if (DSP == 38) || (DSP == 39) |
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parents:
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changeset
|
1889 l1s_dsp_com.dsp_db_common_w_ptr = (T_DB_COMMON_MCU_TO_DSP *) DB_COMMON_W_PAGE_0; |
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parents:
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1890 #endif |
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parents:
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|
1891 |
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parents:
diff
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|
1892 // Reset task commands. |
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parents:
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|
1893 l1s_dsp_com.dsp_db_w_ptr->d_task_d = NO_DSP_TASK; // Init. RX task to NO TASK. |
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parents:
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|
1894 l1s_dsp_com.dsp_db_w_ptr->d_task_u = NO_DSP_TASK; // Init. TX task to NO TASK. |
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parents:
diff
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|
1895 l1s_dsp_com.dsp_db_w_ptr->d_task_ra = NO_DSP_TASK; // Init. RA task to NO TASK. |
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parents:
diff
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|
1896 l1s_dsp_com.dsp_db_w_ptr->d_task_md = NO_DSP_TASK; // Init. MONITORING task to NO TASK. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1897 |
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parents:
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changeset
|
1898 //Reset the TCH channel description |
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parents:
diff
changeset
|
1899 l1s_dsp_com.dsp_db_w_ptr->d_ctrl_tch = 0; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1900 |
50a15a54801e
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parents:
diff
changeset
|
1901 // Clear DSP_PAG bit |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1902 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1903 l1s_dsp_com.dsp_ndb_ptr->d_dsp_page = 0; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1904 #else |
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parents:
diff
changeset
|
1905 l1s_dsp_com.dsp_param_ptr->d_dsp_page = 0; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1906 #endif |
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parents:
diff
changeset
|
1907 |
50a15a54801e
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parents:
diff
changeset
|
1908 #if (L1_GPRS) |
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parents:
diff
changeset
|
1909 // Reset communication pointers. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1910 l1ps_dsp_com.pdsp_ndb_ptr = (T_NDB_MCU_DSP_GPRS *) NDB_ADR_GPRS; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1911 l1ps_dsp_com.pdsp_db_r_ptr = (T_DB_DSP_TO_MCU_GPRS *) DB_R_PAGE_0_GPRS; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1912 l1ps_dsp_com.pdsp_db_w_ptr = (T_DB_MCU_TO_DSP_GPRS *) DB_W_PAGE_0_GPRS; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1913 l1ps_dsp_com.pdsp_param_ptr= (T_PARAM_MCU_DSP_GPRS *) PARAM_ADR_GPRS; |
50a15a54801e
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parents:
diff
changeset
|
1914 |
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parents:
diff
changeset
|
1915 // Reset MCU->DSP page. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1916 l1ps_reset_db_mcu_to_dsp(l1ps_dsp_com.pdsp_db_w_ptr); |
50a15a54801e
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parents:
diff
changeset
|
1917 #endif // L1_GPRS |
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parents:
diff
changeset
|
1918 |
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parents:
diff
changeset
|
1919 #if (DSP_DEBUG_TRACE_ENABLE == 1) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1920 l1s_dsp_com.dsp_db2_current_r_ptr = (T_DB2_DSP_TO_MCU *) DB2_R_PAGE_0; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1921 l1s_dsp_com.dsp_db2_other_r_ptr = (T_DB2_DSP_TO_MCU *) DB2_R_PAGE_1; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1922 #endif |
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parents:
diff
changeset
|
1923 |
50a15a54801e
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parents:
diff
changeset
|
1924 // Reset TPU and Reload offset register with Serving value. |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1925 // Clear TPU_PAG |
50a15a54801e
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parents:
diff
changeset
|
1926 l1dmacro_reset_hw(offset_value); |
50a15a54801e
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parents:
diff
changeset
|
1927 #endif // NOT_SIMULATION |
50a15a54801e
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parents:
diff
changeset
|
1928 } |
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parents:
diff
changeset
|
1929 |
50a15a54801e
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changeset
|
1930 |
50a15a54801e
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parents:
diff
changeset
|
1931 #if(RF_FAM == 61) |
50a15a54801e
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parents:
diff
changeset
|
1932 |
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parents:
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changeset
|
1933 /*-------------------------------------------------------*/ |
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parents:
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changeset
|
1934 /* l1apc_init_ramp_tables() */ |
50a15a54801e
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parents:
diff
changeset
|
1935 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
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changeset
|
1936 /* Parameters : void */ |
50a15a54801e
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parents:
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changeset
|
1937 /* Return : void */ |
50a15a54801e
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parents:
diff
changeset
|
1938 /* Functionality : This would copy the Ramp table */ |
50a15a54801e
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parents:
diff
changeset
|
1939 /* values to the MCU DSP API */ |
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parents:
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changeset
|
1940 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
1941 void l1dapc_init_ramp_tables(void) |
50a15a54801e
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parents:
diff
changeset
|
1942 { |
50a15a54801e
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parents:
diff
changeset
|
1943 |
50a15a54801e
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parents:
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changeset
|
1944 #if (CODE_VERSION == SIMULATION) |
50a15a54801e
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parents:
diff
changeset
|
1945 // Do Nothing there is no APC task |
50a15a54801e
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parents:
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changeset
|
1946 #else |
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parents:
diff
changeset
|
1947 #if ( DSP == 38) || (DSP == 39) |
50a15a54801e
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parents:
diff
changeset
|
1948 // Load RAMP up/down in NDB memory... |
50a15a54801e
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parents:
diff
changeset
|
1949 if (l1_config.tx_pwr_code == 0) |
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parents:
diff
changeset
|
1950 { |
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parents:
diff
changeset
|
1951 Cust_get_ramp_tab( l1s_dsp_com.dsp_ndb_ptr->a_drp_ramp, |
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parents:
diff
changeset
|
1952 0 /* not used */, |
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parents:
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changeset
|
1953 0 /* not used */, |
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parents:
diff
changeset
|
1954 1 /* arbitrary value for arfcn*/); |
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parents:
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changeset
|
1955 |
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changeset
|
1956 } |
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changeset
|
1957 else |
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parents:
diff
changeset
|
1958 { |
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diff
changeset
|
1959 Cust_get_ramp_tab( l1s_dsp_com.dsp_ndb_ptr->a_drp_ramp, |
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parents:
diff
changeset
|
1960 5 /* arbitrary value working in any case */, |
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parents:
diff
changeset
|
1961 5 /* arbitrary value working in any case */, |
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parents:
diff
changeset
|
1962 1 /* arbitrary value for arfcn*/); |
50a15a54801e
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parents:
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changeset
|
1963 } |
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parents:
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changeset
|
1964 #endif |
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parents:
diff
changeset
|
1965 // Is it required to load ramptables for GPRS a_drp2_ramp_gprs |
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parents:
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changeset
|
1966 |
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changeset
|
1967 #endif |
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changeset
|
1968 |
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|
1969 } |
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|
1970 |
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1971 |
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1972 |
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parents:
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changeset
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1973 /*-------------------------------------------------------*/ |
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parents:
diff
changeset
|
1974 /* l1ddsp_apc_load_apcctrl2 */ |
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parents:
diff
changeset
|
1975 /*-------------------------------------------------------*/ |
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parents:
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|
1976 /* Parameters : void */ |
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parents:
diff
changeset
|
1977 /* Return : void */ |
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parents:
diff
changeset
|
1978 /* Functionality : This would copy the Ramp table */ |
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parents:
diff
changeset
|
1979 /* values to the MCU DSP API */ |
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parents:
diff
changeset
|
1980 /*-------------------------------------------------------*/ |
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parents:
diff
changeset
|
1981 void l1ddsp_apc_load_apcctrl2(UWORD16 apcctrl2) |
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parents:
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changeset
|
1982 { |
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parents:
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changeset
|
1983 l1s_dsp_com.dsp_ndb_ptr->d_apcctrl2 = ((apcctrl2) | (0x8000)); |
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parents:
diff
changeset
|
1984 } |
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parents:
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changeset
|
1985 |
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parents:
diff
changeset
|
1986 /*-------------------------------------------------------*/ |
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parents:
diff
changeset
|
1987 /* l1ddsp_apc_set_manual_mode */ |
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parents:
diff
changeset
|
1988 /*-------------------------------------------------------*/ |
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parents:
diff
changeset
|
1989 /* Parameters : void */ |
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parents:
diff
changeset
|
1990 /* Return : void */ |
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parents:
diff
changeset
|
1991 /* Functionality : This would set the APC in manual */ |
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parents:
diff
changeset
|
1992 /* OR external trigger mode */ |
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parents:
diff
changeset
|
1993 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
1994 void l1ddsp_apc_set_manual_mode(void) |
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parents:
diff
changeset
|
1995 { |
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parents:
diff
changeset
|
1996 l1s_dsp_com.dsp_ndb_ptr->d_apcctrl2 |= ((APC_APC_MODE) | (0x8000)); |
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parents:
diff
changeset
|
1997 } |
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parents:
diff
changeset
|
1998 |
50a15a54801e
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parents:
diff
changeset
|
1999 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
2000 /* l1ddsp_apc_set_automatic_mode */ |
50a15a54801e
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parents:
diff
changeset
|
2001 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
2002 /* Parameters : void */ |
50a15a54801e
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parents:
diff
changeset
|
2003 /* Return : void */ |
50a15a54801e
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parents:
diff
changeset
|
2004 /* Functionality : This would set APC in automatic */ |
50a15a54801e
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parents:
diff
changeset
|
2005 /* OR internal sequencer mode */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2006 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
2007 void l1ddsp_apc_set_automatic_mode(void) |
50a15a54801e
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parents:
diff
changeset
|
2008 { |
50a15a54801e
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parents:
diff
changeset
|
2009 l1s_dsp_com.dsp_ndb_ptr->d_apcctrl2 &= ~(APC_APC_MODE); |
50a15a54801e
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parents:
diff
changeset
|
2010 l1s_dsp_com.dsp_ndb_ptr->d_apcctrl2 |= (0x8000); |
50a15a54801e
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parents:
diff
changeset
|
2011 } |
50a15a54801e
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parents:
diff
changeset
|
2012 |
50a15a54801e
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parents:
diff
changeset
|
2013 #ifdef TESTMODE |
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parents:
diff
changeset
|
2014 |
50a15a54801e
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parents:
diff
changeset
|
2015 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
2016 /* l1ddsp_apc_load_apclev */ |
50a15a54801e
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parents:
diff
changeset
|
2017 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
2018 /* Parameters : void */ |
50a15a54801e
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parents:
diff
changeset
|
2019 /* Return : void */ |
50a15a54801e
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parents:
diff
changeset
|
2020 /* Functionality : This function writes the apclev */ |
50a15a54801e
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parents:
diff
changeset
|
2021 /* val into the APCLEV register via DSP */ |
50a15a54801e
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parents:
diff
changeset
|
2022 /* NOTE: Used only in TESTMODE and only when */ |
50a15a54801e
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parents:
diff
changeset
|
2023 /* l1_config.tmode.rf_params.down_up == TMODE_UPLINK; */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2024 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
2025 void l1ddsp_apc_load_apclev(UWORD16 apclev) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2026 { |
50a15a54801e
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parents:
diff
changeset
|
2027 l1s_dsp_com.dsp_ndb_ptr->d_apclev = ((apclev) | (0x8000)); |
50a15a54801e
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parents:
diff
changeset
|
2028 } |
50a15a54801e
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parents:
diff
changeset
|
2029 |
50a15a54801e
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parents:
diff
changeset
|
2030 |
50a15a54801e
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parents:
diff
changeset
|
2031 #endif // TESTMODE |
50a15a54801e
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parents:
diff
changeset
|
2032 |
50a15a54801e
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parents:
diff
changeset
|
2033 #endif |
50a15a54801e
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parents:
diff
changeset
|
2034 #if FF_L1_IT_DSP_DTX |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2035 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
2036 /* l1ddsp_dtx_interrupt_pending() */ |
50a15a54801e
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parents:
diff
changeset
|
2037 /*-------------------------------------------------------*/ |
50a15a54801e
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parents:
diff
changeset
|
2038 /* Parameters : */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2039 /* Return : DTX interrupt status */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2040 /* Functionality : Test and clear the DTX IT pending */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2041 /* flag for DSP ISR screening purpose */ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2042 /*-------------------------------------------------------*/ |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2043 BOOL l1ddsp_dtx_interrupt_pending(void) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2044 { |
50a15a54801e
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parents:
diff
changeset
|
2045 if (l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag & (2 << B_DTX_HINT_ISSUED)) |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2046 { |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2047 // Flag HISR to be scheduled |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2048 l1a_apihisr_com.dtx.pending = TRUE; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2049 // Clear API ISR condition |
50a15a54801e
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parents:
diff
changeset
|
2050 l1s_dsp_com.dsp_ndb_ptr->d_dsp_hint_flag &= ~(2 << B_DTX_HINT_ISSUED); |
50a15a54801e
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parents:
diff
changeset
|
2051 return TRUE; |
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parents:
diff
changeset
|
2052 } |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2053 else |
50a15a54801e
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parents:
diff
changeset
|
2054 return FALSE; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2055 } |
50a15a54801e
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parents:
diff
changeset
|
2056 #endif |
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parents:
diff
changeset
|
2057 |
50a15a54801e
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parents:
diff
changeset
|
2058 |
50a15a54801e
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parents:
diff
changeset
|
2059 #define L1_DEBUG_IQ_DUMP 0 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2060 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2061 #if (L1_DEBUG_IQ_DUMP == 1) |
50a15a54801e
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parents:
diff
changeset
|
2062 |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2063 #define IQ_DUMP_MAX_LOG_SIZE (400) /* i.e. 200 I-Q Sample Pair */ |
50a15a54801e
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parents:
diff
changeset
|
2064 #define IQ_DUMP_BUFFER_SIZE (1280) |
50a15a54801e
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diff
changeset
|
2065 #define L1_DSP_DUMP_IQ_BUFFER_PAGE0 (0xFFD00000 + ((0x2000 - 0x800)*2)) |
50a15a54801e
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parents:
diff
changeset
|
2066 #define L1_DSP_DUMP_IQ_BUFFER_PAGE1 (0xFFD00000 + ((0x2190 - 0x800)*2)) |
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parents:
diff
changeset
|
2067 |
50a15a54801e
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parents:
diff
changeset
|
2068 typedef struct |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2069 { |
50a15a54801e
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parents:
diff
changeset
|
2070 UWORD8 task; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2071 UWORD8 hole; |
50a15a54801e
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parents:
diff
changeset
|
2072 UWORD16 size; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2073 UWORD16 fn_mod42432; |
50a15a54801e
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2074 UWORD16 iq_sample[IQ_DUMP_MAX_LOG_SIZE]; |
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2075 }T_IQ_LOG_BUFFER; |
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2076 |
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2077 #pragma DATA_SECTION(iq_dump_buffer,".debug_data"); |
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2078 T_IQ_LOG_BUFFER iq_dump_buffer[IQ_DUMP_BUFFER_SIZE]; |
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2079 |
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2080 UWORD32 iq_dump_buffer_log_index = 0; |
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2081 UWORD32 iq_overflow_ind=0; |
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2082 |
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2083 void l1ddsp_read_iq_dump(UWORD8 task) |
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2084 { |
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2085 UWORD16 *p_dsp_iq_buffer_ptr; |
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2086 UWORD16 size; |
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2087 int i; |
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2088 |
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2089 /* get the page logic*/ |
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2090 p_dsp_iq_buffer_ptr = (UWORD16 *)(L1_DSP_DUMP_IQ_BUFFER_PAGE0); |
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2091 if(l1s_dsp_com.dsp_r_page){ |
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2092 p_dsp_iq_buffer_ptr = (UWORD16 *)(L1_DSP_DUMP_IQ_BUFFER_PAGE1); |
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2093 } |
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2094 |
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2095 /* */ |
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2096 size = *p_dsp_iq_buffer_ptr; |
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2097 |
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2098 if(size == 0) |
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2099 return; |
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2100 |
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2101 /* size given by DSP is in units of I-Q sample pair */ |
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2102 if(size > (IQ_DUMP_MAX_LOG_SIZE /2)){ |
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2103 size = (IQ_DUMP_MAX_LOG_SIZE/2); |
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2104 } |
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2105 |
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2106 /* make size as zero again */ |
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2107 *p_dsp_iq_buffer_ptr++ = 0; |
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2108 |
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2109 if(iq_dump_buffer_log_index >= IQ_DUMP_BUFFER_SIZE){ |
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2110 iq_overflow_ind=1; |
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2111 iq_dump_buffer_log_index = 0; |
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2112 } |
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2113 |
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2114 iq_dump_buffer[iq_dump_buffer_log_index].task = task; |
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2115 iq_dump_buffer[iq_dump_buffer_log_index].hole = 0; |
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2116 iq_dump_buffer[iq_dump_buffer_log_index].size = size; |
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2117 iq_dump_buffer[iq_dump_buffer_log_index].fn_mod42432 = l1s.actual_time.fn_mod42432; |
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2118 |
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2119 memcpy(&iq_dump_buffer[iq_dump_buffer_log_index].iq_sample[0], |
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2120 p_dsp_iq_buffer_ptr, |
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2121 size*2*2); /* size * 2 (as size is in IQsample pair) * 2 (to convert to bytes) */ |
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2122 |
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2123 iq_dump_buffer_log_index = iq_dump_buffer_log_index + 1; |
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2124 } |
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2125 #endif |