annotate src/cs/drivers/drv_app/uart/serialswitch.h @ 657:b36733f14177

aci3 for MMI != 0: same R2D check as in aci2
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 08 May 2020 00:58:42 +0000
parents 945cf7f506b2
children
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1 /*******************************************************************************
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2 *
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3 * SERIALSWITCH.H
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4 *
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5 * This module allows managing the use of the serial ports of TI GSM Evaluation
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6 * Boards.
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7 * An application may have to send several serial data flows. The board on which
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8 * the application is running may have one or several devices. The purpose of
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9 * this module is to establish connections between the serial data flows and the
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10 * serial devices at runtime, when the application is started.
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11 *
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12 * (C) Texas Instruments 1999 - 2003
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13 *
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14 ******************************************************************************/
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15
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16 #ifndef __SERIALSWITCH_H__
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17 #define __SERIALSWITCH_H__
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18
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19 #ifndef _WINDOWS
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20 #include "l1sw.cfg"
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21 #include "swconfig.cfg"
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22 #if (!OP_L1_STANDALONE)
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23 #include "rv.cfg"
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24 #endif
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25 #include "chipset.cfg"
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26 #endif
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27
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28 #ifndef __MONITOR__
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29 #include "main/sys_types.h"
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30 #include "uart/traceswitch.h"
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31 #include "faxdata.h"
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32 #endif /* __MONITOR__ */
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33
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34 #ifdef BTEMOBILE
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35 #include "hci_ser.h"
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36 #endif
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37
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38 #ifndef C_EXTERN
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39 #if (OP_L1_STANDALONE)
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40 #define C_EXTERN extern
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41 #else
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42 #define C_EXTERN
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43 #endif
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44 #endif
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45
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46 /*
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47 * Constants used to identify the serial data flows.
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48 */
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49
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50 #define SER_FLOW_1 (0)
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51 #define SER_FLOW_2 (1)
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52 #define SER_FLOW_3 (2)
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53 #define SER_FLOW_4 (3)
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54
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55 #define SER_PROTOCOL_STACK (SER_FLOW_1)
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56 #define SER_LAYER_1 (SER_FLOW_2)
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57 #define SER_FAX_DATA (SER_FLOW_3)
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58 #define SER_BLUETOOTH_HCI (SER_FLOW_4)
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59
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60 #define SER_HWTEST (SER_FLOW_1)
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61 #define SER_SERIAL_TEST_1 (SER_FLOW_3)
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62
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63
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64 #define SER_MAX_NUMBER_OF_FLOWS (4)
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65
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66 #define SER_MAX_NUMBER_OF_CFG (16)
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67
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68 /*
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69 * Type used to define the various drivers configuration
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70 * available, according to the UART devices.
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71 */
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72
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73 typedef enum {
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74 /* Trace Flow */
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75 DUMMY_TRACE, /* = 0 */
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76 UART_IRDA_TRACE, /* = 1 */
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77 UART_MODEM_TRACE, /* = 2 */
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78 #if (CHIPSET == 12)
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79 UART_MODEM2_TRACE, /* = 3 */
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80 #endif
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81 /* AT-Commands/Fax & Data Flow */
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82 DUMMY_FAX_DATA = 4, /* = 4 */
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83 /* UART IrDA F&D Driver, not supported - should be = 5 */
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84 UART_MODEM_FAX_DATA = 6, /* = 6 */
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85 #if (CHIPSET == 12)
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86 /* UART Modem2 F&D Driver, not supported - should be = 7 */
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87 #endif
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88 /* Bluetooth HCI Flow */
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89 DUMMY_BT_HCI = 8, /* = 8 */
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90 UART_IRDA_BT_HCI, /* = 9 */
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91 UART_MODEM_BT_HCI /* = A */
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92 #if (CHIPSET == 12)
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93 , UART_MODEM2_BT_HCI /* = B */
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94 #endif
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95 } T_SerialDriver;
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96
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97 /*
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98 * Type used to describe a defined serial configuration;
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99 * Each field is a 4 bits field representing one serial flow.
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100 *
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101 * T_DefinedSerialConfig : [ flow_1 | flow_2 | flow_3 | flow_4 ]
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102 * 15 12 11 8 7 4 3 0
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103 */
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104
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105 typedef struct {
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106
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107 unsigned int flow_4 :4;
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108 unsigned int flow_3 :4;
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109 unsigned int flow_2 :4;
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110 unsigned int flow_1 :4;
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111
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112 } T_DefinedSerialConfig;
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113
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114
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115 /*
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116 * Type used to describe all serial configuration informations
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117 * of a defined application:
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118 * - the default configuration to set up, if the current one is
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119 * not valid,
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120 * - the number of allowed serial configurations,
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121 * - the entire allowed serial configurations.
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122 */
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123
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124 typedef struct {
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125
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126 T_DefinedSerialConfig default_config;
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127 SYS_UWORD8 num_config;
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128 T_DefinedSerialConfig allowed_config[SER_MAX_NUMBER_OF_CFG];
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129
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130 } T_AppliSerialInfo;
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131
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132
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133 /*
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134 * Functions prototypes.
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135 */
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136
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137 #ifndef __MONITOR__
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138
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139 #if (DP==1)
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140 void SER_InitSerialConfig (int application_id);
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141 #else
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142 C_EXTERN void SER_InitSerialConfig (T_AppliSerialInfo *serial_info);
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143 #endif //DP
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144
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145 C_EXTERN SYS_BOOL SER_UartSleepStatus (void);
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146
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147 C_EXTERN void SER_WakeUpUarts (void);
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148
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149 void SER_restart_uart_sleep_timer (void);
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150
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151 void SER_activate_timer_hisr (void);
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152
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153 #if (DP==1)
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154 void SER_tr_Init (int serial_data_flow,
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155 int baudrate,
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156 void (callback_function (void)));
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157 #else
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158 C_EXTERN void SER_tr_Init (int serial_data_flow,
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159 T_tr_Baudrate baudrate,
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160 void (callback_function (void)));
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161 #endif //DP
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162
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163 C_EXTERN SYS_UWORD32 SER_tr_ReadNChars (int serial_data_flow,
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164 char *buffer,
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165 SYS_UWORD32 chars_to_read);
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166
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167 C_EXTERN SYS_UWORD32 SER_tr_ReadNBytes (int serial_data_flow,
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168 char *buffer,
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169 SYS_UWORD32 chars_to_read,
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170 SYS_BOOL *eof_detected);
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171
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172 C_EXTERN SYS_UWORD32 SER_tr_WriteNChars (int serial_data_flow,
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173 char *buffer,
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174 SYS_UWORD32 chars_to_write);
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175
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176 C_EXTERN SYS_UWORD32 SER_tr_EncapsulateNChars (int serial_data_flow,
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177 char *buffer,
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178 SYS_UWORD32 chars_to_write);
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179
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180 C_EXTERN SYS_UWORD32 SER_tr_WriteNBytes (int serial_data_flow,
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181 SYS_UWORD8 *buffer,
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182 SYS_UWORD32 chars_to_write);
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183
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184 C_EXTERN void SER_tr_WriteChar (int serial_data_flow,
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185 char character);
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186
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187 C_EXTERN SYS_BOOL SER_tr_EnterSleep (int serial_data_flow);
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188
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189 C_EXTERN void SER_tr_WakeUp (int serial_data_flow);
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190
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191 C_EXTERN void SER_tr_WriteString (int serial_data_flow,
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192 char *buffer);
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193
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194 #define T_UFRET T_FDRET
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195
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196 #define UF_DEVICE_0 (0)
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197
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198 #define UF_OK FD_OK
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199 #define UF_SUSPENDED FD_SUSPENDED
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200 #define UF_NOT_SUPPORTED FD_NOT_SUPPORTED
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201 #define UF_NOT_READY FD_NOT_READY
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202 #define UF_INTERNAL_ERROR FD_INTERNAL_ERR
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203
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204 #define UF_LINE_ON FD_LINE_ON
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205 #define UF_LINE_OFF FD_LINE_OFF
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206
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207 #define UF_MAX_BUFFER_SIZE FD_MAX_BUFFER_SIZE
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208
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209 #define UF_BAUD_AUTO FD_BAUD_AUTO
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210 #define UF_BAUD_75 FD_BAUD_75
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211 #define UF_BAUD_150 FD_BAUD_150
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212 #define UF_BAUD_300 FD_BAUD_300
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213 #define UF_BAUD_600 FD_BAUD_600
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214 #define UF_BAUD_1200 FD_BAUD_1200
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215 #define UF_BAUD_2400 FD_BAUD_2400
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216 #define UF_BAUD_4800 FD_BAUD_4800
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217 #define UF_BAUD_7200 FD_BAUD_7200
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218 #define UF_BAUD_9600 FD_BAUD_9600
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219 #define UF_BAUD_14400 FD_BAUD_14400
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220 #define UF_BAUD_19200 FD_BAUD_19200
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221 #define UF_BAUD_28800 FD_BAUD_28800
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222 #define UF_BAUD_33900 FD_BAUD_33900
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223 #define UF_BAUD_38400 FD_BAUD_38400
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224 #define UF_BAUD_57600 FD_BAUD_57600
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225 #define UF_BAUD_115200 FD_BAUD_115200
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226 #define UF_BAUD_203125 FD_BAUD_203125
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227 #define UF_BAUD_406250 FD_BAUD_406250
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228 #define UF_BAUD_812500 FD_BAUD_812500
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229
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230 C_EXTERN T_FDRET SER_fd_Init (void);
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231
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232 #if (DP==0)
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233 C_EXTERN T_FDRET SER_fd_Initialize (void);
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234 #endif
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235
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236 C_EXTERN T_FDRET SER_fd_Enable (SYS_BOOL enable);
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237
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238 C_EXTERN T_FDRET SER_fd_SetComPar (T_baudrate baudrate,
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239 T_bitsPerCharacter bpc,
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240 T_stopBits sb,
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241 T_parity parity);
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242
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243 C_EXTERN T_FDRET SER_fd_SetBuffer (SYS_UWORD16 bufSize,
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244 SYS_UWORD16 rxThreshold,
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245 SYS_UWORD16 txThreshold);
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246
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247 C_EXTERN T_FDRET SER_fd_SetFlowCtrl (T_flowCtrlMode fcMode,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248 SYS_UWORD8 XON,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff changeset
249 SYS_UWORD8 XOFF);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 C_EXTERN T_FDRET SER_fd_SetEscape (char escChar,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 SYS_UWORD16 guardPeriod);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 C_EXTERN T_FDRET SER_fd_InpAvail (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 C_EXTERN T_FDRET SER_fd_OutpAvail (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 C_EXTERN T_FDRET SER_fd_EnterSleep (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260 C_EXTERN T_FDRET SER_fd_WakeUp (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 C_EXTERN T_FDRET SER_fd_ReadData (T_suspendMode suspend,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263 void (readOutFunc (SYS_BOOL cldFromIrq,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 T_reInstMode *reInstall,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
265 SYS_UWORD8 nsource,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266 SYS_UWORD8 *source[],
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 SYS_UWORD16 size[],
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
268 SYS_UWORD32 state)));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
269
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270 C_EXTERN T_FDRET SER_fd_WriteData (T_suspendMode suspend,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 void (writeInFunc (SYS_BOOL cldFromIrq,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 T_reInstMode *reInstall,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273 SYS_UWORD8 ndest,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274 SYS_UWORD8 *dest[],
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
275 SYS_UWORD16 size[])));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
276
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
277 C_EXTERN T_FDRET SER_fd_StopRec (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
278
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279 C_EXTERN T_FDRET SER_fd_StartRec (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281 C_EXTERN T_FDRET SER_fd_GetLineState (SYS_UWORD32 *state);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283 C_EXTERN T_FDRET SER_fd_SetLineState (SYS_UWORD32 state,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284 SYS_UWORD32 mask);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
286 #if (DP==0)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
287 C_EXTERN T_FDRET SER_fd_CheckXEmpty (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
288 #endif
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
289
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 #ifdef BTEMOBILE
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291 C_EXTERN T_HCI_RET SER_bt_Init (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 C_EXTERN T_HCI_RET SER_bt_Start (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
295 C_EXTERN T_HCI_RET SER_bt_Stop (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
297 C_EXTERN T_HCI_RET SER_bt_Kill (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
298
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
299 C_EXTERN T_HCI_RET SER_bt_SetBaudrate (UINT8 baudrate);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
300
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
301 C_EXTERN T_HCI_RET SER_bt_TransmitPacket (void *uart_sco_tx_buffer);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
302
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
303 C_EXTERN SYS_BOOL SER_bt_EnterSleep (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
304
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
305 C_EXTERN void SER_bt_WakeUp (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
306 #endif
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
307
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
308 #if ((CHIPSET == 2) || (CHIPSET == 3))
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
309 C_EXTERN void SER_uart_handler (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
310 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
311 C_EXTERN void SER_uart_modem_handler (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
312 C_EXTERN void SER_uart_irda_handler (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
313 #endif
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
314 #if (CHIPSET == 12)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
315 C_EXTERN void SER_uart_modem2_handler (void);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
316 #endif
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
317
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
318 #if (DP==1)
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
319 T_FDRET UF_Init (int serial_data_flow);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
320 T_FDRET UF_Enable (int serial_data_flow,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
321 SYS_BOOL enable);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
322 T_FDRET UF_SetComPar (int serial_data_flow,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
323 T_baudrate baudrate,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
324 T_bitsPerCharacter bpc,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
325 T_stopBits sb,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
326 T_parity parity);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
327 T_FDRET UF_SetBuffer (int serial_data_flow,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
328 SYS_UWORD16 bufSize,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
329 SYS_UWORD16 rxThreshold,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
330 SYS_UWORD16 txThreshold);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
331 T_FDRET UF_SetFlowCtrl (int serial_data_flow,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
332 T_flowCtrlMode fcMode,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
333 SYS_UWORD8 XON,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
334 SYS_UWORD8 XOFF);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
335 T_FDRET UF_SetEscape (int serial_data_flow,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
336 char escChar,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
337 SYS_UWORD16 guardPeriod);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
338 T_FDRET UF_InpAvail (int serial_data_flow);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
339 T_FDRET UF_OutpAvail (int serial_data_flow);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
340 T_FDRET UF_ReadData (int serial_data_flow,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
341 T_suspendMode suspend,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
342 void (readOutFunc (SYS_BOOL cldFromIrq,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
343 T_reInstMode *reInstall,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
344 SYS_UWORD8 nsource,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
345 SYS_UWORD8 *source[],
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
346 SYS_UWORD16 size[],
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
347 SYS_UWORD32 state)));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
348 T_FDRET UF_WriteData (int uartNo,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
349 T_suspendMode suspend,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
350 void (writeInFunc (SYS_BOOL cldFromIrq,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
351 T_reInstMode *reInstall,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
352 SYS_UWORD8 ndest,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
353 SYS_UWORD8 *dest[],
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
354 SYS_UWORD16 size[])));
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
355 T_FDRET UF_StopRec (int serial_data_flow);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
356 T_FDRET UF_StartRec (int serial_data_flow);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
357 T_FDRET UF_GetLineState (int serial_data_flow,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
358 SYS_UWORD32 *state);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
359 T_FDRET UF_SetLineState (int serial_data_flow,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
360 SYS_UWORD32 state,
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
361 SYS_UWORD32 mask);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
362 T_FDRET UF_CheckXEmpty (int serial_data_flow);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363 T_FDRET UF_EnterSleep (int serial_data_flow);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 T_FDRET UF_WakeUp (int serial_data_flow);
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
365 #endif //DP
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
366
945cf7f506b2 src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
367 /*
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368 * Functions used for Dynamic Switch.
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369 */
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370
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371 SYS_BOOL SER_WriteConfig (char *new_config,
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372 SYS_BOOL write_to_flash);
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373
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374 SYS_BOOL SER_ImmediateSwitch (void);
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375
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376 /*
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377 * Constants and macros used by Condat.
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378 * Condat uses a serial device for the protocol stack trace.
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379 */
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380
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381 #ifndef __SERIALSWITCH_C__
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382
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383 #define UT_DEVICE_0 (0)
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384
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385 #define UT_BAUD_406250 TR_BAUD_406250
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386 #define UT_BAUD_115200 TR_BAUD_115200
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387 #define UT_BAUD_57600 TR_BAUD_57600
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388 #define UT_BAUD_38400 TR_BAUD_38400
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389 #define UT_BAUD_33900 TR_BAUD_33900
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390 #define UT_BAUD_28800 TR_BAUD_28800
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391 #define UT_BAUD_19200 TR_BAUD_19200
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392 #define UT_BAUD_14400 TR_BAUD_14400
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393 #define UT_BAUD_9600 TR_BAUD_9600
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394 #define UT_BAUD_4800 TR_BAUD_4800
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395 #define UT_BAUD_2400 TR_BAUD_2400
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396 #define UT_BAUD_1200 TR_BAUD_1200
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397 #define UT_BAUD_600 TR_BAUD_600
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398 #define UT_BAUD_300 TR_BAUD_300
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399 #define UT_BAUD_150 TR_BAUD_150
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400 #define UT_BAUD_75 TR_BAUD_75
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401
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402 #define UT_Init(A,B,C) SER_tr_Init (SER_PROTOCOL_STACK, B, C)
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403
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404 #define UT_ReadNChars(A,B,C) SER_tr_ReadNChars (SER_PROTOCOL_STACK, B, C)
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405
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406 #define UT_WriteNChars(A,B,C) SER_tr_WriteNChars (SER_PROTOCOL_STACK, B, C)
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407
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408 #define UT_WriteChar(A,B) SER_tr_WriteChar (SER_PROTOCOL_STACK, B)
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409
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410 #define UT_WriteString(A,B) SER_tr_WriteString (SER_PROTOCOL_STACK, B)
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411
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412 #if (DP==0)
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413 #define UF_Init(A) SER_fd_Init ()
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414
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415 #define UF_Enable(A,B) SER_fd_Enable (B)
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416
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417 #define UF_SetComPar(A,B,C,D,E) SER_fd_SetComPar (B, C, D, E)
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418
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419 #define UF_SetBuffer(A,B,C,D) SER_fd_SetBuffer (B, C, D)
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420
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421 #define UF_SetFlowCtrl(A,B,C,D) SER_fd_SetFlowCtrl (B, C, D)
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422
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423 #define UF_SetEscape(A,B,C) SER_fd_SetEscape (B, C)
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424
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425 #define UF_InpAvail(A) SER_fd_InpAvail ()
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426
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427 #define UF_OutpAvail(A) SER_fd_OutpAvail ()
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428
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429 #define UF_ReadData(A,B,C) SER_fd_ReadData (B, C)
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430
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431 #define UF_WriteData(A,B,C) SER_fd_WriteData (B, C)
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432
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433 #define UF_StopRec(A) SER_fd_StopRec()
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434
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435 #define UF_StartRec(A) SER_fd_StartRec ()
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436
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437 #define UF_GetLineState(A,B) SER_fd_GetLineState (B)
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438
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439 #define UF_SetLineState(A,B,C) SER_fd_SetLineState (B, C)
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440
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441 #define UF_CheckXEmpty(A) SER_fd_CheckXEmpty ()
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442 #endif //DP
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443
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444 #endif /* __SERIALSWITCH_C__ */
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445
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446 #endif /* __MONITOR__ */
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447
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448 #undef C_EXTERN
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449
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450 #endif /* __SERIALSWITCH_H__ */