FreeCalypso > hg > fc-magnetite
annotate src/cs/layer1/include/l1_defty.h @ 657:b36733f14177
aci3 for MMI != 0: same R2D check as in aci2
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 08 May 2020 00:58:42 +0000 |
parents | 945cf7f506b2 |
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rev | line source |
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1 /************* Revision Controle System Header ************* |
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2 * GSM Layer 1 software |
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3 * L1_DEFTY.H |
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4 * |
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5 * Filename l1_defty.h |
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6 * Copyright 2003 (C) Texas Instruments |
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7 * |
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8 ************* Revision Controle System Header *************/ |
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9 #if(L1_DYN_DSP_DWNLD == 1) |
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10 #include "l1_dyn_dwl_defty.h" |
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11 #endif |
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12 |
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13 typedef struct |
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14 { |
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15 UWORD16 modulus; |
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16 UWORD16 relative_position; |
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17 } |
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18 T_BCCHS_SCHEDULE; |
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19 |
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20 typedef struct |
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21 { |
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22 UWORD8 schedule_array_size; |
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23 T_BCCHS_SCHEDULE schedule_array[10]; |
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24 } |
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25 T_BCCHS; |
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26 |
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27 typedef struct |
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28 { |
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29 BOOL status; |
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30 UWORD16 radio_freq; |
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31 UWORD32 fn_offset; |
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32 UWORD32 time_alignmt; |
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33 UWORD8 sb26_attempt; |
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34 UWORD8 tsc; |
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35 UWORD16 bcch_blks_req; |
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36 UWORD8 timing_validity; |
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37 UWORD8 search_mode; |
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38 UWORD8 gprs_priority; |
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39 UWORD8 sb26_offset; // Set to 1 when SB26 RX win is entirely in frame 25. |
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40 #if (L1_12NEIGH ==1) |
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41 UWORD32 fn_offset_mem; |
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42 UWORD32 time_alignmt_mem; |
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43 #endif |
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44 } |
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45 T_NCELL_SINGLE; |
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46 |
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47 typedef struct |
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48 { |
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49 UWORD8 active_neigh_id_norm; |
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50 UWORD8 active_neigh_tc_norm; |
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51 UWORD8 active_neigh_id_top; |
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52 UWORD8 active_neigh_tc_top; |
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53 UWORD8 current_list_size; |
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54 T_NCELL_SINGLE list[6]; |
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55 } |
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56 T_BCCHN_LIST; |
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57 |
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58 typedef struct |
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59 { |
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60 UWORD8 active_fb_id; |
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61 UWORD8 active_sbconf_id; |
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62 UWORD8 active_sb_id; |
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63 UWORD8 current_list_size; |
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64 UWORD8 first_in_list; //point at oldest element in list. Used when parsing the list. |
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65 #if (L1_EOTD==1) |
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66 #if L1_EOTD_QBIT_ACC |
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67 // Store serving fn_offset and time_alignmt, so that they can be tracked |
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68 // independently. |
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69 UWORD32 serv_fn_offset; |
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70 UWORD32 serv_time_alignmt; |
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71 #endif |
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72 // Need to track any TOA updates in dedicated mode else |
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73 // QB errors are introduced in the results... |
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74 |
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75 UWORD8 eotd_toa_phase; |
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76 WORD32 eotd_toa_tracking; |
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77 WORD32 eotd_cache_toa_tracking; |
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78 |
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79 UWORD8 eotd_meas_session; |
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80 UWORD32 fn_sb_serv; // for methods 1 & 2 |
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81 UWORD32 ta_sb_serv; // for methods 1 & 2 |
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82 WORD32 teotdS; // for method 2 only |
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83 UWORD32 fn_offset_serv; // for method 2 only |
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84 #endif |
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85 #if (L1_12NEIGH==1) |
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86 T_NCELL_SINGLE list[NBR_NEIGHBOURS+1]; // 1 place (13th) for S.C in EOTD. |
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87 #else |
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88 T_NCELL_SINGLE list[6]; |
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89 #endif |
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90 } |
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91 T_NSYNC_LIST; |
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92 |
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93 typedef struct |
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94 { |
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95 UWORD8 cbch_state; |
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96 UWORD32 starting_fn; |
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97 UWORD32 first_block[48]; |
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98 UWORD8 cbch_num; |
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99 UWORD8 schedule_length; |
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100 UWORD8 next; |
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101 WORD32 start_continuous_fn; |
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102 } |
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103 T_CBCH_HEAD_SCHEDULE; |
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104 |
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105 typedef struct |
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106 { |
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107 UWORD8 cbch_num; |
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108 UWORD8 next; |
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109 UWORD32 start_fn[6]; |
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110 } |
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111 T_CBCH_INFO_SCHEDULE; |
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112 |
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113 /*=========================================================================*/ |
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114 /* Moved type definitions from Debis files. */ |
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115 /*=========================================================================*/ |
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116 #if (AMR == 1) |
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117 // AMR ver 1.0 parameters |
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118 typedef struct |
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119 { |
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120 BOOL noise_suppression_bit; |
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121 BOOL initial_codec_mode_indicator; |
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122 UWORD8 initial_codec_mode; |
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123 UWORD8 active_codec_set; |
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124 UWORD8 threshold[3]; |
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125 UWORD8 hysteresis[3]; |
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126 } |
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127 T_AMR_CONFIGURATION; |
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128 #endif |
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129 |
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130 typedef struct |
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131 { |
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132 UWORD8 A[7+1]; |
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133 } |
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134 T_ENCRYPTION_KEY; |
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135 |
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136 typedef struct |
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137 { |
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138 UWORD8 A[22+1]; |
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139 } |
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140 T_RADIO_FRAME; |
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141 |
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142 typedef struct |
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143 { |
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144 UWORD8 n32; |
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145 UWORD8 n51; |
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146 UWORD8 n26; |
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147 } |
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148 T_SHORT_FRAME_NUMBER; |
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149 |
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150 typedef struct |
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151 { |
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152 UWORD16 A[31+1]; |
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153 } |
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154 T_CHAN_LIST; |
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155 |
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156 typedef struct |
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157 { |
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158 UWORD16 num_of_chans; |
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159 T_CHAN_LIST chan_number; |
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160 } |
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161 T_BCCH_LIST; |
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162 |
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163 typedef struct |
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164 { |
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165 UWORD16 rf_chan_num; |
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166 UWORD8 l2_channel_type; |
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167 UWORD8 error_cause; |
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168 T_RADIO_FRAME l2_frame; |
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169 UWORD8 bsic; |
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170 UWORD8 tc; |
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171 } |
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172 T_PH_DATA_IND; |
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173 |
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174 typedef struct |
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175 { |
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176 UWORD16 A[63+1]; |
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177 } |
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178 T_MA_FIELD; |
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179 |
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180 typedef struct |
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181 { |
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182 UWORD16 rf_chan_cnt; |
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183 T_MA_FIELD rf_chan_no; |
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184 } |
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185 T_MOBILE_ALLOCATION; |
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186 |
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187 typedef struct |
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188 { |
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189 BOOL start_time_present; |
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190 T_SHORT_FRAME_NUMBER start_time; |
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191 } |
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192 T_STARTING_TIME; |
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193 |
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194 typedef struct |
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195 { |
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196 UWORD16 radio_freq_no; |
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197 WORD8 rxlev; |
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198 } |
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199 T_RXLEV_MEAS; |
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200 |
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201 typedef struct |
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202 { |
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203 UWORD8 maio; |
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204 UWORD8 hsn; |
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205 } |
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206 T_HOPPING_RF; |
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207 |
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208 typedef struct |
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209 { |
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210 UWORD16 radio_freq; |
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211 } |
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212 T_SINGLE_RF; |
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213 |
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214 typedef union |
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215 { |
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216 T_SINGLE_RF single_rf; |
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217 T_HOPPING_RF hopping_rf; |
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218 } |
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219 T_CHN_SEL_CHOICE; |
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220 |
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221 typedef struct |
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222 { |
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223 BOOL h; |
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224 T_CHN_SEL_CHOICE rf_channel; |
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225 } |
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226 T_CHN_SEL; |
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227 |
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228 typedef struct |
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229 { |
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230 T_CHN_SEL chan_sel; |
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231 UWORD8 channel_type; |
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232 UWORD8 subchannel; |
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233 UWORD8 timeslot_no; |
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234 UWORD8 tsc; |
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235 } |
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236 T_CHANNEL_DESCRIPTION; |
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237 |
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238 typedef struct |
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239 { |
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240 UWORD8 ncc; |
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241 UWORD8 bcc; |
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242 UWORD16 bcch_carrier; |
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243 } |
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244 T_CELL_DESC; |
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245 |
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246 typedef struct |
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247 { |
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248 T_CELL_DESC cell_description; |
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249 T_CHANNEL_DESCRIPTION channel_desc_1; |
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250 UWORD8 channel_mode_1; |
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251 T_STARTING_TIME starting_time; |
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252 UWORD8 ho_acc; |
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253 UWORD8 txpwr; |
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254 BOOL report_time_diff; |
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255 T_MOBILE_ALLOCATION frequency_list; |
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256 T_CHANNEL_DESCRIPTION channel_desc_2; |
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257 UWORD8 channel_mode_2; |
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258 T_MOBILE_ALLOCATION frequency_list_bef_sti; |
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259 T_CHANNEL_DESCRIPTION channel_desc_1_bef_sti; |
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260 T_CHANNEL_DESCRIPTION channel_desc_2_bef_sti; |
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261 BOOL cipher_mode; |
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262 UWORD8 a5_algorithm; |
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263 } |
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264 T_HO_PARAMS; |
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265 |
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266 typedef struct |
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267 { |
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268 T_CHANNEL_DESCRIPTION channel_desc; |
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269 T_MOBILE_ALLOCATION frequency_list; |
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270 T_STARTING_TIME starting_time; |
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271 } |
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272 T_MPHC_CHANGE_FREQUENCY; |
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273 |
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274 typedef struct |
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275 { |
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276 UWORD8 subchannel; |
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277 UWORD8 channel_mode; |
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278 #if (AMR == 1) |
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279 T_AMR_CONFIGURATION amr_configuration; |
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280 #endif |
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281 } |
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282 T_MPHC_CHANNEL_MODE_MODIFY_REQ; |
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283 |
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284 typedef struct |
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285 { |
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286 UWORD8 cipher_mode; |
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287 UWORD8 a5_algorithm; |
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288 T_ENCRYPTION_KEY new_ciph_param; |
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289 } |
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290 T_MPHC_SET_CIPHERING_REQ; |
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291 |
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292 typedef struct |
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293 { |
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294 UWORD8 sub_channel; |
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295 UWORD8 frame_erasure; |
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296 } |
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297 T_OML1_CLOSE_TCH_LOOP_REQ; |
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298 |
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299 typedef struct |
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300 { |
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301 #if (defined _WINDOWS && (OP_RIV_AUDIO == 1)) |
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302 T_RV_HDR header; |
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303 #endif |
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304 UWORD8 tested_device; |
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305 } |
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306 T_OML1_START_DAI_TEST_REQ; |
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307 |
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308 /***********************************************************/ |
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309 /* Type definitions for DEBUG... */ |
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310 /***********************************************************/ |
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311 typedef struct // translate string in int and int in string |
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312 { |
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313 CHAR *message; |
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314 WORD32 SignalCode; |
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315 WORD32 size; |
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316 } |
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317 MSG_DEBUG; |
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318 |
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319 typedef struct // translate string in int and int in string |
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320 { |
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321 CHAR *name; |
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322 } |
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323 TASK_TRACE; |
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324 |
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325 /***********************************************************/ |
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326 /* Type definitions for data structures used for MFTAB */ |
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327 /* managment... */ |
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328 /***********************************************************/ |
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329 typedef struct |
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330 { |
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331 void (*fct_ptr)(UWORD8,UWORD8); |
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332 CHAR param1; |
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333 CHAR param2; |
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334 } |
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335 T_FCT; |
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336 |
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337 typedef struct |
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338 { |
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339 T_FCT fct[L1_MAX_FCT]; |
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340 } |
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341 T_FRM; |
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342 |
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343 typedef struct |
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344 { |
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345 T_FRM frmlst[MFTAB_SIZE]; |
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346 } |
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347 T_MFTAB; |
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348 |
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349 typedef struct |
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350 { |
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351 const T_FCT *address; |
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352 UWORD8 size; |
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353 } |
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354 T_TASK_MFTAB; |
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355 |
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356 /***********************************************************/ |
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357 /* TPU controle register components definition. */ |
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358 /***********************************************************/ |
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359 |
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360 #if (CODE_VERSION==SIMULATION) |
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361 typedef struct // contents of REG_CMD register |
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362 { |
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363 unsigned int tpu_reset_bit : 1; // TPU_RESET bit : ON (reset TPU) |
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364 unsigned int tpu_pag_bit : 1; // TPU_PAG bit : 0 (page 0) |
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365 unsigned int tpu_enb_bit : 1; // TPU_ENB bit : ON (TPU commun.int.) |
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366 unsigned int dsp_pag_bit : 1; // DSP_PAG bit : 0 (page 0) |
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367 unsigned int dsp_enb_bit : 1; // DSP_ENB bit : ON (DSP commun.int.) |
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368 unsigned int tpu_stat_bit : 1; // TPU_STAT bit : ON (if TPU active) OFF (if TPU in IDLE) |
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369 unsigned int tpu_idle_bit : 1; // TPU_IDLE bit : ON (force IDLE mode) |
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370 } |
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371 T_reg_cmd; // Rem: we must keep "unsigned int" type for bitmap. |
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372 #else |
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373 typedef struct // contents of REG_CMD register |
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374 { |
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375 unsigned int tpu_reset_bit : 1; // TPU_RESET bit : ON (reset TPU) |
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376 unsigned int tpu_pag_bit : 1; // TPU_PAG bit : 0 (page 0) |
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377 unsigned int tpu_enb_bit : 1; // TPU_ENB bit : ON (TPU commun.int.) |
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378 unsigned int unused_1 : 1; // |
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379 unsigned int dsp_enb_bit : 1; // DSP_ENB bit : ON (DSP commun.int.) |
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380 unsigned int unused_2 : 1; // |
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381 unsigned int unused_3 : 1; // |
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382 unsigned int tsp_reset_bit : 1; // TSP_RESET bit : ON (reset TSP) |
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383 unsigned int tpu_idle_bit : 1; // TPU_IDLE bit : ON (force IDLE mode) |
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384 unsigned int tup_wait_bit : 1; // TPU_WAIT bit : ON (TPU ready) |
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385 unsigned int tpu_ck_enb_bit: 1; // TPU_CLK bit : ON (TPU clock on) |
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386 } |
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387 T_reg_cmd; |
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388 #endif |
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389 /***********************************************************/ |
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390 /* */ |
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391 /* Data structure for global info components. */ |
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392 /* */ |
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393 /***********************************************************/ |
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394 |
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395 typedef struct |
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396 { |
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397 API d_task_d; // (0) Downlink task command. |
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398 API d_burst_d; // (1) Downlink burst identifier. |
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399 API d_task_u; // (2) Uplink task command. |
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400 API d_burst_u; // (3) Uplink burst identifier. |
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401 API d_task_md; // (4) Downlink Monitoring (FB/SB) command. |
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402 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
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403 API d_background; // (5) Background tasks |
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404 #else |
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405 API d_reserved; // (5) Reserved |
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406 #endif |
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407 API d_debug; // (6) Debug/Acknowledge/general purpose word. |
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408 API d_task_ra; // (7) RA task command. |
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409 API d_fn; // (8) FN, in Rep. period and FN%104, used for TRAFFIC/TCH only. |
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410 // bit [0..7] -> b_fn_report, FN in the normalized reporting period. |
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411 // bit [8..15] -> b_fn_sid, FN % 104, used for SID positionning. |
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412 API d_ctrl_tch; // (9) Tch channel description. |
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413 // bit [0..3] -> b_chan_mode, channel mode. |
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414 // bit [4..5] -> b_chan_type, channel type. |
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415 // bit [6] -> reset SACCH |
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416 // bit [7] -> vocoder ON |
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417 // bit [8] -> b_sync_tch_ul, synchro. TCH/UL. |
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418 // bit [9] -> b_sync_tch_dl, synchro. TCH/DL. |
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419 // bit [10] -> b_stop_tch_ul, stop TCH/UL. |
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420 // bit [11] -> b_stop_tch_dl, stop TCH/DL. |
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421 // bit [12.13] -> b_tch_loop, tch loops A/B/C. |
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422 API hole; // (10) unused hole. |
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423 |
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424 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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425 API d_ctrl_abb; // (11) Bit field indicating the analog baseband register to send. |
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426 // bit [0] -> b_ramp: the ramp information(a_ramp[]) is located in NDB |
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427 // bit [1.2] -> unused |
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428 // bit [3] -> b_apcdel: delays-register in NDB |
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429 // bit [4] -> b_afc: freq control register in DB |
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430 // bit [5..15] -> unused |
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431 #endif |
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432 API a_a5fn[2]; // (12..13) Encryption Frame number. |
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433 // word 0, bit [0..4] -> T2. |
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434 // word 0, bit [5..10] -> T3. |
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435 // word 1, bit [0..11] -> T1. |
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436 API d_power_ctl; // (14) Power level control. |
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437 API d_afc; // (15) AFC value (enabled by "b_afc" in "d_ctrl_TCM4400 or in d_ctrl_abb"). |
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438 API d_ctrl_system; // (16) Controle Register for RESET/RESUME. |
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439 // bit [0..2] -> b_tsq, training sequence. |
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440 // bit [3] -> b_bcch_freq_ind, BCCH frequency indication. |
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441 // bit [15] -> b_task_abort, DSP task abort command. |
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442 } |
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443 T_DB_MCU_TO_DSP; |
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444 |
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445 typedef struct |
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446 { |
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447 API d_task_d; // (0) Downlink task command. |
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448 API d_burst_d; // (1) Downlink burst identifier. |
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449 API d_task_u; // (2) Uplink task command. |
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450 API d_burst_u; // (3) Uplink burst identifier. |
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451 API d_task_md; // (4) Downlink Monitoring (FB/SB) task command. |
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452 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
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453 API d_background; // (5) Background tasks |
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454 #else |
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455 API d_reserved; // (5) Reserved |
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456 #endif |
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457 API d_debug; // (6) Debug/Acknowledge/general purpose word. |
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458 API d_task_ra; // (7) RA task command. |
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459 |
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460 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) |
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461 API a_serv_demod[4]; // ( 8..11) Serv. cell demod. result, array of 4 words (D_TOA,D_PM,D_ANGLE,D_SNR). |
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462 API a_pm[3]; // (12..14) Power measurement results, array of 3 words. |
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463 API a_sch[5]; // (15..19) Header + SB information, array of 5 words. |
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464 #else |
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465 API a_pm[3]; // ( 8..10) Power measurement results, array of 3 words. |
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466 API a_serv_demod[4]; // (11..14) Serv. cell demod. result, array of 4 words (D_TOA,D_PM,D_ANGLE,D_SNR). |
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467 API a_sch[5]; // (15..19) Header + SB information, array of 5 words. |
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468 #endif |
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469 } |
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470 T_DB_DSP_TO_MCU; |
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471 |
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472 #if (DSP == 34) || (DSP == 35) || (DSP == 36) // NDB GSM |
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473 typedef struct |
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474 { |
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475 // MISC Tasks |
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476 API d_dsp_page; |
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477 |
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478 // DSP status returned (DSP --> MCU). |
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479 API d_error_status; |
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480 |
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481 // RIF control (MCU -> DSP). |
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482 API d_spcx_rif; |
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483 |
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484 API d_tch_mode; // TCH mode register. |
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485 // bit [0..1] -> b_dai_mode. |
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486 // bit [2] -> b_dtx. |
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487 |
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488 API d_debug1; // bit 0 at 1 enable dsp f_tx delay for Omega |
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489 |
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490 API d_dsp_test; |
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491 |
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492 // Words dedicated to Software version (DSP code + Patch) |
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493 API d_version_number1; |
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494 API d_version_number2; |
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495 |
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496 API d_debug_ptr; |
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497 API d_debug_bk; |
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498 |
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499 API d_pll_config; |
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500 |
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501 // GSM/GPRS DSP Debug trace support |
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502 API p_debug_buffer; |
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503 API d_debug_buffer_size; |
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504 API d_debug_trace_type; |
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505 |
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506 #if (W_A_DSP_IDLE3 == 1) |
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507 // DSP report its state: 0 run, 1 Idle1, 2 Idle2, 3 Idle3. |
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508 API d_dsp_state; |
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509 // 5 words are reserved for any possible mapping modification |
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510 API d_hole1_ndb[2]; |
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511 #else |
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512 // 6 words are reserved for any possible mapping modification |
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513 API d_hole1_ndb[3]; |
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514 #endif |
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515 |
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516 #if (AMR == 1) |
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517 API p_debug_amr; |
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518 #else |
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519 API d_hole_debug_amr; |
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520 #endif |
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521 |
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522 #if (CHIPSET == 12) |
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523 #if (DSP == 35) || (DSP == 36) |
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524 API d_hole2_ndb[1]; |
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525 API d_mcsi_select; |
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526 #else |
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527 API d_hole2_ndb[2]; |
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528 #endif |
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529 #else |
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530 API d_hole2_ndb[2]; |
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531 #endif |
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532 |
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533 // New words APCDEL1 and APCDEL2 for 2TX: TX/PRACH combinations |
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534 API d_apcdel1_bis; |
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535 API d_apcdel2_bis; |
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536 |
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537 |
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538 // New registers due to IOTA analog base band |
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539 API d_apcdel2; |
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540 API d_vbctrl2; |
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541 API d_bulgcal; |
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542 |
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543 // Analog Based Band |
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544 API d_afcctladd; |
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545 |
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546 API d_vbuctrl; |
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547 API d_vbdctrl; |
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548 API d_apcdel1; |
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549 API d_apcoff; |
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550 API d_bulioff; |
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551 API d_bulqoff; |
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552 API d_dai_onoff; |
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553 API d_auxdac; |
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554 |
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555 #if (ANLG_FAM == 1) |
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556 API d_vbctrl; |
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557 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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558 API d_vbctrl1; |
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559 #endif |
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560 |
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561 API d_bbctrl; |
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562 |
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563 // Monitoring tasks control (MCU <- DSP) |
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564 // FB task |
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565 API d_fb_det; // FB detection result. (1 for FOUND). |
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|
566 API d_fb_mode; // Mode for FB detection algorithm. |
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567 API a_sync_demod[4]; // FB/SB demod. result, (D_TOA,D_PM,D_ANGLE,D_SNR). |
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|
568 |
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569 // SB Task |
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diff
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570 API a_sch26[5]; // Header + SB information, array of 5 words. |
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571 |
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|
572 API d_audio_gain_ul; |
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diff
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|
573 API d_audio_gain_dl; |
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574 |
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575 // Controller of the melody E2 audio compressor |
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576 API d_audio_compressor_ctrl; |
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parents:
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|
577 |
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578 // AUDIO module |
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579 API d_audio_init; |
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580 API d_audio_status; |
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581 |
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582 // Audio tasks |
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583 // TONES (MCU -> DSP) |
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584 API d_toneskb_init; |
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585 API d_toneskb_status; |
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|
586 API d_k_x1_t0; |
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parents:
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|
587 API d_k_x1_t1; |
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parents:
diff
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|
588 API d_k_x1_t2; |
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589 API d_pe_rep; |
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|
590 API d_pe_off; |
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parents:
diff
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|
591 API d_se_off; |
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parents:
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592 API d_bu_off; |
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parents:
diff
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593 API d_t0_on; |
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594 API d_t0_off; |
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parents:
diff
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|
595 API d_t1_on; |
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parents:
diff
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|
596 API d_t1_off; |
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parents:
diff
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|
597 API d_t2_on; |
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|
598 API d_t2_off; |
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|
599 API d_k_x1_kt0; |
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parents:
diff
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|
600 API d_k_x1_kt1; |
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parents:
diff
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|
601 API d_dur_kb; |
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parents:
diff
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|
602 API d_shiftdl; |
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parents:
diff
changeset
|
603 API d_shiftul; |
945cf7f506b2
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diff
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|
604 |
945cf7f506b2
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parents:
diff
changeset
|
605 API d_aec_ctrl; |
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parents:
diff
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|
606 |
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parents:
diff
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|
607 API d_es_level_api; |
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diff
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|
608 API d_mu_api; |
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parents:
diff
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|
609 |
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|
610 // Melody Ringer module |
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parents:
diff
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|
611 API d_melo_osc_used; |
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parents:
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612 API d_melo_osc_active; |
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613 API a_melo_note0[4]; |
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diff
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|
614 API a_melo_note1[4]; |
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parents:
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615 API a_melo_note2[4]; |
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616 API a_melo_note3[4]; |
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617 API a_melo_note4[4]; |
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|
618 API a_melo_note5[4]; |
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619 API a_melo_note6[4]; |
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620 API a_melo_note7[4]; |
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|
621 |
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|
622 // selection of the melody format |
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623 API d_melody_selection; |
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624 |
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625 // Holes due to the format melody E1 |
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|
626 API a_melo_holes[3]; |
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diff
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|
627 |
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|
628 // Speech Recognition module |
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629 API d_sr_status; // status of the DSP speech reco task |
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630 API d_sr_param; // paramters for the DSP speech reco task: OOV threshold. |
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631 API d_sr_bit_exact_test; // bit exact test |
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632 API d_sr_nb_words; // number of words used in the speech recognition task |
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|
633 API d_sr_db_level; // estimate voice level in dB |
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634 API d_sr_db_noise; // estimate noise in dB |
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635 API d_sr_mod_size; // size of the model |
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|
636 API a_n_best_words[4]; // array of the 4 best words |
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637 API a_n_best_score[8]; // array of the 4 best scores (each score is 32 bits length) |
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|
638 |
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|
639 // Audio buffer |
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diff
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|
640 API a_dd_1[22]; // Header + DATA traffic downlink information, sub. chan. 1. |
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|
641 API a_du_1[22]; // Header + DATA traffic uplink information, sub. chan. 1. |
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|
642 |
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|
643 // V42bis module |
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diff
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|
644 API d_v42b_nego0; |
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|
645 API d_v42b_nego1; |
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diff
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|
646 API d_v42b_control; |
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parents:
diff
changeset
|
647 API d_v42b_ratio_ind; |
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|
648 API d_mcu_control; |
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|
649 API d_mcu_control_sema; |
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|
650 |
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|
651 // Background tasks |
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diff
changeset
|
652 API d_background_enable; |
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parents:
diff
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|
653 API d_background_abort; |
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diff
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|
654 API d_background_state; |
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diff
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|
655 API d_max_background; |
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parents:
diff
changeset
|
656 API a_background_tasks[16]; |
945cf7f506b2
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parents:
diff
changeset
|
657 API a_back_task_io[16]; |
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parents:
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|
658 |
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|
659 // GEA module defined in l1p_deft.h (the following section is overlaid with GPRS NDB memory) |
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parents:
diff
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|
660 API d_gea_mode_ovly; |
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diff
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|
661 API a_gea_kc_ovly[4]; |
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|
662 |
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|
663 #if (ANLG_FAM == 3) |
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|
664 // SYREN specific registers |
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parents:
diff
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|
665 API d_vbpop; |
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parents:
diff
changeset
|
666 API d_vau_delay_init; |
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parents:
diff
changeset
|
667 API d_vaud_cfg; |
945cf7f506b2
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parents:
diff
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|
668 API d_vauo_onoff; |
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diff
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|
669 API d_vaus_vol; |
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changeset
|
670 API d_vaud_pll; |
945cf7f506b2
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parents:
diff
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|
671 API d_hole3_ndb[1]; |
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parents:
diff
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|
672 #elif ((ANLG_FAM == 1) || (ANLG_FAM == 2)) |
945cf7f506b2
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parents:
diff
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|
673 |
945cf7f506b2
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parents:
diff
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|
674 API d_hole3_ndb[7]; |
945cf7f506b2
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parents:
diff
changeset
|
675 |
945cf7f506b2
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parents:
diff
changeset
|
676 #endif |
945cf7f506b2
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parents:
diff
changeset
|
677 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
678 // word used for the init of USF threshold |
945cf7f506b2
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parents:
diff
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|
679 API d_thr_usf_detect; |
945cf7f506b2
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parents:
diff
changeset
|
680 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
681 // Encryption module |
945cf7f506b2
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parents:
diff
changeset
|
682 API d_a5mode; // Encryption Mode. |
945cf7f506b2
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parents:
diff
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|
683 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
684 API d_sched_mode_gprs_ovly; |
945cf7f506b2
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parents:
diff
changeset
|
685 |
945cf7f506b2
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parents:
diff
changeset
|
686 // 7 words are reserved for any possible mapping modification |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
687 API d_hole4_ndb[5]; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
688 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
689 // Ramp definition for Omega device |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
690 API a_ramp[16]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
691 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
692 // CCCH/SACCH downlink information...(!!) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
693 API a_cd[15]; // Header + CCCH/SACCH downlink information. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
694 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
695 // FACCH downlink information........(!!) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
696 API a_fd[15]; // Header + FACCH downlink information. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
697 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
698 // Traffic downlink data frames......(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
699 API a_dd_0[22]; // Header + DATA traffic downlink information, sub. chan. 0. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
700 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
701 // CCCH/SACCH uplink information.....(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
702 API a_cu[15]; // Header + CCCH/SACCH uplink information. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
703 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
704 // FACCH downlink information........(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
705 API a_fu[15]; // Header + FACCH uplink information |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
706 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
707 // Traffic downlink data frames......(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
708 API a_du_0[22]; // Header + DATA traffic uplink information, sub. chan. 0. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
709 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
710 // Random access.....................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
711 API d_rach; // RACH information. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
712 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
713 //...................................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
714 API a_kc[4]; // Encryption Key Code. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
715 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
716 // Integrated Data Services module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
717 API d_ra_conf; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
718 API d_ra_act; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
719 API d_ra_test; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
720 API d_ra_statu; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
721 API d_ra_statd; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
722 API d_fax; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
723 API a_data_buf_ul[21]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
724 API a_data_buf_dl[37]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
725 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
726 // GTT API mapping for DSP code 34 (for test only) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
727 #if (L1_GTT == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
728 API d_tty_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
729 API d_tty_detect_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
730 API d_ctm_detect_shift; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
731 API d_tty_fa_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
732 API d_tty_mod_norm; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
733 API d_tty_reset_buffer_ul; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
734 API d_tty_loop_ctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
735 API p_tty_loop_buffer; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
736 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
737 API a_tty_holes[8]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
738 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
739 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
740 API a_sr_holes0[414]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
741 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
742 #if (L1_NEW_AEC) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
743 // new AEC |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
744 API d_cont_filter; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
745 API d_granularity_att; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
746 API d_coef_smooth; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
747 API d_es_level_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
748 API d_fact_vad; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
749 API d_thrs_abs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
750 API d_fact_asd_fil; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
751 API d_fact_asd_mut; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
752 API d_far_end_pow_h; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
753 API d_far_end_pow_l; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
754 API d_far_end_noise_h; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
755 API d_far_end_noise_l; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
756 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
757 API a_new_aec_holes[12]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
758 #endif // L1_NEW_AEC |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
759 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
760 // Speech recognition model |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
761 API a_sr_holes1[145]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
762 API d_cport_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
763 API d_cport_ctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
764 API a_cport_cfr[2]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
765 API d_cport_tcl_tadt; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
766 API d_cport_tdat; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
767 API d_cport_tvs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
768 API d_cport_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
769 API d_cport_reg_value; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
770 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
771 API a_cport_holes[1011]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
772 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
773 API a_model[1041]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
774 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
775 // EOTD buffer |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
776 #if (L1_EOTD==1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
777 API d_eotd_first; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
778 API d_eotd_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
779 API d_eotd_nrj_high; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
780 API d_eotd_nrj_low; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
781 API a_eotd_crosscor[18]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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|
782 #else |
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parents:
diff
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|
783 API a_eotd_holes[22]; |
945cf7f506b2
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parents:
diff
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|
784 #endif |
945cf7f506b2
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parents:
diff
changeset
|
785 // AMR ver 1.0 buffers |
945cf7f506b2
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parents:
diff
changeset
|
786 API a_amr_config[4]; |
945cf7f506b2
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parents:
diff
changeset
|
787 API a_ratscch_ul[6]; |
945cf7f506b2
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parents:
diff
changeset
|
788 API a_ratscch_dl[6]; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
789 API d_amr_snr_est; // estimation of the SNR of the AMR speech block |
945cf7f506b2
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parents:
diff
changeset
|
790 #if (L1_VOICE_MEMO_AMR) |
945cf7f506b2
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parents:
diff
changeset
|
791 API d_amms_ul_voc; |
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parents:
diff
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|
792 #else |
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parents:
diff
changeset
|
793 API a_voice_memo_amr_holes[1]; |
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parents:
diff
changeset
|
794 #endif |
945cf7f506b2
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parents:
diff
changeset
|
795 API d_thr_onset_afs; // thresh detection ONSET AFS |
945cf7f506b2
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parents:
diff
changeset
|
796 API d_thr_sid_first_afs; // thresh detection SID_FIRST AFS |
945cf7f506b2
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parents:
diff
changeset
|
797 API d_thr_ratscch_afs; // thresh detection RATSCCH AFS |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
798 API d_thr_update_afs; // thresh detection SID_UPDATE AFS |
945cf7f506b2
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parents:
diff
changeset
|
799 API d_thr_onset_ahs; // thresh detection ONSET AHS |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
800 API d_thr_sid_ahs; // thresh detection SID frames AHS |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
801 API d_thr_ratscch_marker;// thresh detection RATSCCH MARKER |
945cf7f506b2
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parents:
diff
changeset
|
802 API d_thr_sp_dgr; // thresh detection SPEECH DEGRADED/NO_DATA |
945cf7f506b2
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parents:
diff
changeset
|
803 API d_thr_soft_bits; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
804 #if (MELODY_E2) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
805 API d_melody_e2_osc_stop; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
806 API d_melody_e2_osc_active; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
807 API d_melody_e2_semaphore; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
808 API a_melody_e2_osc[16][3]; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
809 API d_melody_e2_globaltimefactor; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
810 API a_melody_e2_instrument_ptr[8]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
811 API d_melody_e2_deltatime; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
812 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
813 #if (AMR_THRESHOLDS_WORKAROUND) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
814 API a_d_macc_thr_afs[8]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
815 API a_d_macc_thr_ahs[6]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
816 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
817 API a_melody_e2_holes0[14]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
818 #endif |
945cf7f506b2
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parents:
diff
changeset
|
819 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
820 API a_melody_e2_holes1[693]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
821 API a_dsp_trace[SC_AUDIO_MELODY_E2_MAX_SIZE_OF_DSP_TRACE]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
822 API a_melody_e2_instrument_wave[SC_AUDIO_MELODY_E2_MAX_SIZE_OF_INSTRUMENT]; |
945cf7f506b2
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parents:
diff
changeset
|
823 #else |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
824 API d_holes[61]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
825 #if (AMR_THRESHOLDS_WORKAROUND) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
826 API a_d_macc_thr_afs[8]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
827 API a_d_macc_thr_ahs[6]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
828 #endif |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
829 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
830 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
831 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
832 T_NDB_MCU_DSP; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
833 #elif (DSP == 33) // NDB GSM |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
834 typedef struct |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
835 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
836 // MISC Tasks |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
837 API d_dsp_page; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
838 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
839 // DSP status returned (DSP --> MCU). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
840 API d_error_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
841 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
842 // RIF control (MCU -> DSP). |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
843 API d_spcx_rif; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
844 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
845 API d_tch_mode; // TCH mode register. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
846 // bit [0..1] -> b_dai_mode. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
847 // bit [2] -> b_dtx. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
848 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
849 API d_debug1; // bit 0 at 1 enable dsp f_tx delay for Omega |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
850 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
851 API d_dsp_test; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
852 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
853 // Words dedicated to Software version (DSP code + Patch) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
854 API d_version_number1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
855 API d_version_number2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
856 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
857 API d_debug_ptr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
858 API d_debug_bk; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
859 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
860 API d_pll_config; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
861 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
862 // GSM/GPRS DSP Debug trace support |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
863 API p_debug_buffer; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
864 API d_debug_buffer_size; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
865 API d_debug_trace_type; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
866 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
867 #if (W_A_DSP_IDLE3 == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
868 // DSP report its state: 0 run, 1 Idle1, 2 Idle2, 3 Idle3. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
869 API d_dsp_state; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
870 // 10 words are reserved for any possible mapping modification |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
871 API d_hole1_ndb[5]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
872 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
873 // 11 words are reserved for any possible mapping modification |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
874 API d_hole1_ndb[6]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
875 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
876 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
877 // New words APCDEL1 and APCDEL2 for 2TX: TX/PRACH combinations |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
878 API d_apcdel1_bis; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
879 API d_apcdel2_bis; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
880 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
881 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
882 // New registers due to IOTA analog base band |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
883 API d_apcdel2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
884 API d_vbctrl2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
885 API d_bulgcal; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
886 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
887 // Analog Based Band |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
888 API d_afcctladd; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
889 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
890 API d_vbuctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
891 API d_vbdctrl; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
892 API d_apcdel1; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
893 API d_apcoff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
894 API d_bulioff; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
895 API d_bulqoff; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
896 API d_dai_onoff; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
897 API d_auxdac; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
898 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
899 #if (ANLG_FAM == 1) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
900 API d_vbctrl; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
901 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
902 API d_vbctrl1; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
903 #endif |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
904 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
905 API d_bbctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
906 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
907 // Monitoring tasks control (MCU <- DSP) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
908 // FB task |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
909 API d_fb_det; // FB detection result. (1 for FOUND). |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
910 API d_fb_mode; // Mode for FB detection algorithm. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
911 API a_sync_demod[4]; // FB/SB demod. result, (D_TOA,D_PM,D_ANGLE,D_SNR). |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
912 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
913 // SB Task |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
914 API a_sch26[5]; // Header + SB information, array of 5 words. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
915 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
916 API d_audio_gain_ul; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
917 API d_audio_gain_dl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
918 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
919 // Controller of the melody E2 audio compressor |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
920 API d_audio_compressor_ctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
921 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
922 // AUDIO module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
923 API d_audio_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
924 API d_audio_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
925 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
926 // Audio tasks |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
927 // TONES (MCU -> DSP) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
928 API d_toneskb_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
929 API d_toneskb_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
930 API d_k_x1_t0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
931 API d_k_x1_t1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
932 API d_k_x1_t2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
933 API d_pe_rep; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
934 API d_pe_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
935 API d_se_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
936 API d_bu_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
937 API d_t0_on; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
938 API d_t0_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
939 API d_t1_on; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
940 API d_t1_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
941 API d_t2_on; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
942 API d_t2_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
943 API d_k_x1_kt0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
944 API d_k_x1_kt1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
945 API d_dur_kb; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
946 API d_shiftdl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
947 API d_shiftul; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
948 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
949 API d_aec_ctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
950 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
951 API d_es_level_api; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
952 API d_mu_api; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
953 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
954 // Melody Ringer module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
955 API d_melo_osc_used; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
956 API d_melo_osc_active; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
957 API a_melo_note0[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
958 API a_melo_note1[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
959 API a_melo_note2[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
960 API a_melo_note3[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
961 API a_melo_note4[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
962 API a_melo_note5[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
963 API a_melo_note6[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
964 API a_melo_note7[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
965 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
966 // selection of the melody format |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
967 API d_melody_selection; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
968 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
969 // Holes due to the format melody E1 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
970 API a_melo_holes[3]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
971 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
972 // Speech Recognition module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
973 API d_sr_status; // status of the DSP speech reco task |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
974 API d_sr_param; // paramters for the DSP speech reco task: OOV threshold. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
975 API d_sr_bit_exact_test; // bit exact test |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
976 API d_sr_nb_words; // number of words used in the speech recognition task |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
977 API d_sr_db_level; // estimate voice level in dB |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
978 API d_sr_db_noise; // estimate noise in dB |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
979 API d_sr_mod_size; // size of the model |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
980 API a_n_best_words[4]; // array of the 4 best words |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
981 API a_n_best_score[8]; // array of the 4 best scores (each score is 32 bits length) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
982 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
983 // Audio buffer |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
984 API a_dd_1[22]; // Header + DATA traffic downlink information, sub. chan. 1. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
985 API a_du_1[22]; // Header + DATA traffic uplink information, sub. chan. 1. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
986 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
987 // V42bis module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
988 API d_v42b_nego0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
989 API d_v42b_nego1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
990 API d_v42b_control; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
991 API d_v42b_ratio_ind; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
992 API d_mcu_control; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
993 API d_mcu_control_sema; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
994 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
995 // Background tasks |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
996 API d_background_enable; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
997 API d_background_abort; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
998 API d_background_state; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
999 API d_max_background; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1000 API a_background_tasks[16]; |
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|
1001 API a_back_task_io[16]; |
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1002 |
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1003 // GEA module defined in l1p_deft.h (the following section is overlaid with GPRS NDB memory) |
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|
1004 API d_gea_mode_ovly; |
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diff
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|
1005 API a_gea_kc_ovly[4]; |
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1006 |
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|
1007 API d_hole3_ndb[8]; |
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|
1008 |
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|
1009 // Encryption module |
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|
1010 API d_a5mode; // Encryption Mode. |
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|
1011 |
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diff
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|
1012 API d_sched_mode_gprs_ovly; |
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|
1013 |
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|
1014 // 7 words are reserved for any possible mapping modification |
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diff
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|
1015 API d_hole4_ndb[5]; |
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parents:
diff
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|
1016 |
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parents:
diff
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|
1017 // Ramp definition for Omega device |
945cf7f506b2
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parents:
diff
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|
1018 API a_ramp[16]; |
945cf7f506b2
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diff
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|
1019 |
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diff
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|
1020 // CCCH/SACCH downlink information...(!!) |
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parents:
diff
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|
1021 API a_cd[15]; // Header + CCCH/SACCH downlink information. |
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parents:
diff
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|
1022 |
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parents:
diff
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|
1023 // FACCH downlink information........(!!) |
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parents:
diff
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|
1024 API a_fd[15]; // Header + FACCH downlink information. |
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parents:
diff
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|
1025 |
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parents:
diff
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|
1026 // Traffic downlink data frames......(!!) |
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parents:
diff
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|
1027 API a_dd_0[22]; // Header + DATA traffic downlink information, sub. chan. 0. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1028 |
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parents:
diff
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|
1029 // CCCH/SACCH uplink information.....(!!) |
945cf7f506b2
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parents:
diff
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|
1030 API a_cu[15]; // Header + CCCH/SACCH uplink information. |
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parents:
diff
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|
1031 |
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parents:
diff
changeset
|
1032 // FACCH downlink information........(!!) |
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parents:
diff
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|
1033 API a_fu[15]; // Header + FACCH uplink information |
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parents:
diff
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|
1034 |
945cf7f506b2
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parents:
diff
changeset
|
1035 // Traffic downlink data frames......(!!) |
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parents:
diff
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|
1036 API a_du_0[22]; // Header + DATA traffic uplink information, sub. chan. 0. |
945cf7f506b2
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parents:
diff
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|
1037 |
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parents:
diff
changeset
|
1038 // Random access.....................(MCU -> DSP). |
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parents:
diff
changeset
|
1039 API d_rach; // RACH information. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1040 |
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parents:
diff
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|
1041 //...................................(MCU -> DSP). |
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parents:
diff
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|
1042 API a_kc[4]; // Encryption Key Code. |
945cf7f506b2
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parents:
diff
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|
1043 |
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parents:
diff
changeset
|
1044 // Integrated Data Services module |
945cf7f506b2
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parents:
diff
changeset
|
1045 API d_ra_conf; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1046 API d_ra_act; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1047 API d_ra_test; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1048 API d_ra_statu; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1049 API d_ra_statd; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1050 API d_fax; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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parents:
diff
changeset
|
1051 API a_data_buf_ul[21]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1052 API a_data_buf_dl[37]; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1053 |
945cf7f506b2
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parents:
diff
changeset
|
1054 #if (L1_NEW_AEC) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1055 // new AEC |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1056 API a_new_aec_holes[422]; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1057 API d_cont_filter; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1058 API d_granularity_att; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1059 API d_coef_smooth; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1060 API d_es_level_max; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1061 API d_fact_vad; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1062 API d_thrs_abs; |
945cf7f506b2
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parents:
diff
changeset
|
1063 API d_fact_asd_fil; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1064 API d_fact_asd_mut; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1065 API d_far_end_pow_h; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1066 API d_far_end_pow_l; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1067 API d_far_end_noise_h; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1068 API d_far_end_noise_l; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1069 #endif |
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parents:
diff
changeset
|
1070 |
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parents:
diff
changeset
|
1071 // Speech recognition model |
945cf7f506b2
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parents:
diff
changeset
|
1072 #if (L1_NEW_AEC) |
945cf7f506b2
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parents:
diff
changeset
|
1073 API a_sr_holes[1165]; |
945cf7f506b2
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parents:
diff
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|
1074 #else |
945cf7f506b2
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parents:
diff
changeset
|
1075 API a_sr_holes[1599]; |
945cf7f506b2
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parents:
diff
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|
1076 #endif // L1_NEW_AEC |
945cf7f506b2
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parents:
diff
changeset
|
1077 API a_model[1041]; |
945cf7f506b2
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parents:
diff
changeset
|
1078 |
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parents:
diff
changeset
|
1079 // EOTD buffer |
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parents:
diff
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|
1080 #if (L1_EOTD==1) |
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parents:
diff
changeset
|
1081 API d_eotd_first; |
945cf7f506b2
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parents:
diff
changeset
|
1082 API d_eotd_max; |
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parents:
diff
changeset
|
1083 API d_eotd_nrj_high; |
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parents:
diff
changeset
|
1084 API d_eotd_nrj_low; |
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parents:
diff
changeset
|
1085 API a_eotd_crosscor[18]; |
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parents:
diff
changeset
|
1086 #else |
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parents:
diff
changeset
|
1087 API a_eotd_holes[22]; |
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parents:
diff
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|
1088 #endif |
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parents:
diff
changeset
|
1089 |
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parents:
diff
changeset
|
1090 #if (MELODY_E2) |
945cf7f506b2
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parents:
diff
changeset
|
1091 API a_melody_e2_holes0[27]; |
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parents:
diff
changeset
|
1092 API d_melody_e2_osc_used; |
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parents:
diff
changeset
|
1093 API d_melody_e2_osc_active; |
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parents:
diff
changeset
|
1094 API d_melody_e2_semaphore; |
945cf7f506b2
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parents:
diff
changeset
|
1095 API a_melody_e2_osc[16][3]; |
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parents:
diff
changeset
|
1096 API d_melody_e2_globaltimefactor; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1097 API a_melody_e2_instrument_ptr[8]; |
945cf7f506b2
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parents:
diff
changeset
|
1098 API a_melody_e2_holes1[708]; |
945cf7f506b2
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parents:
diff
changeset
|
1099 API a_dsp_trace[SC_AUDIO_MELODY_E2_MAX_SIZE_OF_DSP_TRACE]; |
945cf7f506b2
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parents:
diff
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|
1100 API a_melody_e2_instrument_wave[SC_AUDIO_MELODY_E2_MAX_SIZE_OF_INSTRUMENT]; |
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diff
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|
1101 #endif |
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parents:
diff
changeset
|
1102 } |
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parents:
diff
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|
1103 T_NDB_MCU_DSP; |
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parents:
diff
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|
1104 |
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parents:
diff
changeset
|
1105 #elif ((DSP == 32) || (DSP == 31)) |
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parents:
diff
changeset
|
1106 typedef struct |
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parents:
diff
changeset
|
1107 { |
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parents:
diff
changeset
|
1108 // Monitoring tasks control..........(MCU <- DSP) |
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parents:
diff
changeset
|
1109 API d_fb_det; // FB detection result. (1 for FOUND). |
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diff
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|
1110 API d_fb_mode; // Mode for FB detection algorithm. |
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parents:
diff
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|
1111 API a_sync_demod[4]; // FB/SB demod. result, (D_TOA,D_PM,D_ANGLE,D_SNR). |
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|
1112 |
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diff
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|
1113 // CCCH/SACCH downlink information...(!!) |
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parents:
diff
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|
1114 API a_cd[15]; // Header + CCCH/SACCH downlink information. |
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diff
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|
1115 |
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parents:
diff
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|
1116 // FACCH downlink information........(!!) |
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parents:
diff
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|
1117 API a_fd[15]; // Header + FACCH downlink information. |
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diff
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|
1118 |
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parents:
diff
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|
1119 // Traffic downlink data frames......(!!) |
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parents:
diff
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|
1120 API a_dd_0[22]; // Header + DATA traffic downlink information, sub. chan. 0. |
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parents:
diff
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|
1121 API a_dd_1[22]; // Header + DATA traffic downlink information, sub. chan. 1. |
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parents:
diff
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|
1122 |
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diff
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|
1123 // CCCH/SACCH uplink information.....(!!) |
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diff
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|
1124 API a_cu[15]; // Header + CCCH/SACCH uplink information. |
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parents:
diff
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|
1125 |
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parents:
diff
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|
1126 #if (SPEECH_RECO) |
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parents:
diff
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|
1127 // FACCH downlink information........(!!) |
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parents:
diff
changeset
|
1128 API a_fu[3]; // Header + FACCH uplink information |
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parents:
diff
changeset
|
1129 // The size of this buffer is 15 word but some speech reco words |
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parents:
diff
changeset
|
1130 // are overlayer with this buffer. This is the reason why the size is 3 instead of 15. |
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parents:
diff
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|
1131 API d_sr_status; // status of the DSP speech reco task |
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parents:
diff
changeset
|
1132 API d_sr_param; // paramters for the DSP speech reco task: OOV threshold. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1133 API sr_hole1; // hole |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1134 API d_sr_bit_exact_test; // bit exact test |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1135 API d_sr_nb_words; // number of words used in the speech recognition task |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1136 API d_sr_db_level; // estimate voice level in dB |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1137 API d_sr_db_noise; // estimate noise in dB |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1138 API d_sr_mod_size; // size of the model |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1139 API sr_holes_1[4]; // hole |
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parents:
diff
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|
1140 #else |
945cf7f506b2
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parents:
diff
changeset
|
1141 // FACCH downlink information........(!!) |
945cf7f506b2
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parents:
diff
changeset
|
1142 API a_fu[15]; // Header + FACCH uplink information |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1143 #endif |
945cf7f506b2
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parents:
diff
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|
1144 |
945cf7f506b2
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parents:
diff
changeset
|
1145 // Traffic uplink data frames........(!!) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1146 API a_du_0[22]; // Header + DATA traffic uplink information, sub. chan. 0. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1147 API a_du_1[22]; // Header + DATA traffic uplink information, sub. chan. 1. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1148 |
945cf7f506b2
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parents:
diff
changeset
|
1149 // Random access.....................(MCU -> DSP). |
945cf7f506b2
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parents:
diff
changeset
|
1150 API d_rach; // RACH information. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1151 |
945cf7f506b2
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parents:
diff
changeset
|
1152 //...................................(MCU -> DSP). |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1153 API d_a5mode; // Encryption Mode. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1154 API a_kc[4]; // Encryption Key Code. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1155 API d_tch_mode; // TCH mode register. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1156 // bit [0..1] -> b_dai_mode. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1157 // bit [2] -> b_dtx. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
1158 |
945cf7f506b2
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parents:
diff
changeset
|
1159 // OMEGA...........................(MCU -> DSP). |
945cf7f506b2
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parents:
diff
changeset
|
1160 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2)) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1161 API a_ramp[16]; |
945cf7f506b2
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parents:
diff
changeset
|
1162 #if (MELODY_E1) |
945cf7f506b2
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parents:
diff
changeset
|
1163 API d_melo_osc_used; |
945cf7f506b2
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parents:
diff
changeset
|
1164 API d_melo_osc_active; |
945cf7f506b2
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parents:
diff
changeset
|
1165 API a_melo_note0[4]; |
945cf7f506b2
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parents:
diff
changeset
|
1166 API a_melo_note1[4]; |
945cf7f506b2
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parents:
diff
changeset
|
1167 API a_melo_note2[4]; |
945cf7f506b2
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parents:
diff
changeset
|
1168 API a_melo_note3[4]; |
945cf7f506b2
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parents:
diff
changeset
|
1169 API a_melo_note4[4]; |
945cf7f506b2
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parents:
diff
changeset
|
1170 API a_melo_note5[4]; |
945cf7f506b2
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parents:
diff
changeset
|
1171 API a_melo_note6[4]; |
945cf7f506b2
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parents:
diff
changeset
|
1172 API a_melo_note7[4]; |
945cf7f506b2
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parents:
diff
changeset
|
1173 #if (DSP==31) |
945cf7f506b2
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parents:
diff
changeset
|
1174 // selection of the melody format |
945cf7f506b2
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parents:
diff
changeset
|
1175 API d_melody_selection; |
945cf7f506b2
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parents:
diff
changeset
|
1176 API holes[9]; |
945cf7f506b2
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parents:
diff
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|
1177 #else // DSP==32 |
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parents:
diff
changeset
|
1178 API d_dco_type; // Tide |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1179 API p_start_IQ; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1180 API d_level_off; |
945cf7f506b2
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parents:
diff
changeset
|
1181 API d_dco_dbg; |
945cf7f506b2
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parents:
diff
changeset
|
1182 API d_tide_resa; |
945cf7f506b2
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parents:
diff
changeset
|
1183 API d_asynch_margin; // Perseus Asynch Audio Workaround |
945cf7f506b2
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parents:
diff
changeset
|
1184 API hole[4]; |
945cf7f506b2
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parents:
diff
changeset
|
1185 #endif // DSP 32 |
945cf7f506b2
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parents:
diff
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|
1186 |
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parents:
diff
changeset
|
1187 #else // NO MELODY E1 |
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parents:
diff
changeset
|
1188 #if (DSP==31) |
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parents:
diff
changeset
|
1189 // selection of the melody format |
945cf7f506b2
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parents:
diff
changeset
|
1190 API d_melody_selection; |
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parents:
diff
changeset
|
1191 API holes[43]; // 43 unused holes. |
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parents:
diff
changeset
|
1192 #else // DSP==32 |
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parents:
diff
changeset
|
1193 API holes[34]; // 34 unused holes. |
945cf7f506b2
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parents:
diff
changeset
|
1194 API d_dco_type; // Tide |
945cf7f506b2
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parents:
diff
changeset
|
1195 API p_start_IQ; |
945cf7f506b2
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parents:
diff
changeset
|
1196 API d_level_off; |
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parents:
diff
changeset
|
1197 API d_dco_dbg; |
945cf7f506b2
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parents:
diff
changeset
|
1198 API d_tide_resa; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1199 API d_asynch_margin; // Perseus Asynch Audio Workaround |
945cf7f506b2
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parents:
diff
changeset
|
1200 API hole[4]; |
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parents:
diff
changeset
|
1201 #endif //DSP == 32 |
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parents:
diff
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|
1202 #endif // NO MELODY E1 |
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parents:
diff
changeset
|
1203 |
945cf7f506b2
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parents:
diff
changeset
|
1204 API d_debug3; |
945cf7f506b2
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parents:
diff
changeset
|
1205 API d_debug2; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1206 API d_debug1; // bit 0 at 1 enable dsp f_tx delay for Omega |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1207 API d_afcctladd; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1208 API d_vbuctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1209 API d_vbdctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1210 API d_apcdel1; |
945cf7f506b2
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parents:
diff
changeset
|
1211 API d_aec_ctrl; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1212 API d_apcoff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1213 API d_bulioff; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1214 API d_bulqoff; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1215 API d_dai_onoff; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1216 API d_auxdac; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1217 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1218 #if (ANLG_FAM == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1219 API d_vbctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1220 #elif (ANLG_FAM == 2) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1221 API d_vbctrl1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1222 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1223 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1224 API d_bbctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1225 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1226 #error DSPCODE not supported with given ANALOG |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1227 #endif //(ANALOG)1, 2 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1228 //...................................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1229 API a_sch26[5]; // Header + SB information, array of 5 words. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1230 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1231 // TONES.............................(MCU -> DSP) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1232 API d_toneskb_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1233 API d_toneskb_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1234 API d_k_x1_t0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1235 API d_k_x1_t1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1236 API d_k_x1_t2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1237 API d_pe_rep; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1238 API d_pe_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1239 API d_se_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1240 API d_bu_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1241 API d_t0_on; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1242 API d_t0_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1243 API d_t1_on; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1244 API d_t1_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1245 API d_t2_on; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1246 API d_t2_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1247 API d_k_x1_kt0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1248 API d_k_x1_kt1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1249 API d_dur_kb; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1250 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1251 // PLL...............................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1252 API d_pll_clkmod1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1253 API d_pll_clkmod2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1254 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1255 // DSP status returned..........(DSP --> MCU). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1256 API d_error_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1257 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1258 // RIF control.......................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1259 API d_spcx_rif; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1260 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1261 API d_shiftdl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1262 API d_shiftul; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1263 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1264 API p_saec_prog; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1265 API p_aec_prog; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1266 API p_spenh_prog; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1267 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1268 API a_ovly[75]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1269 API d_ra_conf; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1270 API d_ra_act; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1271 API d_ra_test; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1272 API d_ra_statu; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1273 API d_ra_statd; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1274 API d_fax; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1275 #if (SPEECH_RECO) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1276 API a_data_buf_ul[3]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1277 API a_n_best_words[4]; // array of the 4 best words |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1278 API a_n_best_score[8]; // array of the 4 best scores (each score is 32 bits length) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1279 API sr_holes_2[6]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1280 API a_data_buf_dl[37]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1281 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1282 API a_hole[24]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1283 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1284 API d_sched_mode_gprs_ovly; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1285 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1286 API fir_holes1[384]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1287 API a_fir31_uplink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1288 API a_fir31_downlink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1289 API d_audio_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1290 API d_audio_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1291 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1292 API a_model[1041]; // array of the speech reco model |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1293 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1294 API a_data_buf_ul[21]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1295 API a_data_buf_dl[37]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1296 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1297 API a_hole[24]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1298 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1299 API d_sched_mode_gprs_ovly; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1300 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1301 API fir_holes1[384]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1302 API a_fir31_uplink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1303 API a_fir31_downlink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1304 API d_audio_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1305 API d_audio_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1306 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1307 #if (L1_EOTD ==1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1308 API a_eotd_hole[369]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1309 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1310 API d_eotd_first; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1311 API d_eotd_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1312 API d_eotd_nrj_high; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1313 API d_eotd_nrj_low; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1314 API a_eotd_crosscor[18]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1315 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1316 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1317 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1318 T_NDB_MCU_DSP; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1319 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1320 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1321 #else // OTHER DSP CODE like 17 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1322 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1323 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1324 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1325 // Monitoring tasks control..........(MCU <- DSP) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1326 API d_fb_det; // FB detection result. (1 for FOUND). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1327 API d_fb_mode; // Mode for FB detection algorithm. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1328 API a_sync_demod[4]; // FB/SB demod. result, (D_TOA,D_PM,D_ANGLE,D_SNR). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1329 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1330 // CCCH/SACCH downlink information...(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1331 API a_cd[15]; // Header + CCCH/SACCH downlink information. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1332 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1333 // FACCH downlink information........(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1334 API a_fd[15]; // Header + FACCH downlink information. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1335 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1336 // Traffic downlink data frames......(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1337 #if (DATA14_4 == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1338 API a_dd_0[20]; // Header + DATA traffic downlink information, sub. chan. 0. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1339 API a_dd_1[20]; // Header + DATA traffic downlink information, sub. chan. 1. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1340 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1341 #if (DATA14_4 == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1342 API a_dd_0[22]; // Header + DATA traffic downlink information, sub. chan. 0. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1343 API a_dd_1[22]; // Header + DATA traffic downlink information, sub. chan. 1. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1344 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1345 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1346 // CCCH/SACCH uplink information.....(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1347 API a_cu[15]; // Header + CCCH/SACCH uplink information. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1348 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1349 #if (SPEECH_RECO) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1350 // FACCH downlink information........(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1351 API a_fu[3]; // Header + FACCH uplink information |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1352 // The size of this buffer is 15 word but some speech reco words |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1353 // are overlayer with this buffer. This is the reason why the size is 3 instead of 15. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1354 API d_sr_status; // status of the DSP speech reco task |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1355 API d_sr_param; // paramters for the DSP speech reco task: OOV threshold. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1356 API sr_hole1; // hole |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1357 API d_sr_bit_exact_test; // bit exact test |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1358 API d_sr_nb_words; // number of words used in the speech recognition task |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1359 API d_sr_db_level; // estimate voice level in dB |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1360 API d_sr_db_noise; // estimate noise in dB |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1361 API d_sr_mod_size; // size of the model |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1362 API sr_holes_1[4]; // hole |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1363 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1364 // FACCH downlink information........(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1365 API a_fu[15]; // Header + FACCH uplink information |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1366 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1367 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1368 // Traffic uplink data frames........(!!) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1369 #if (DATA14_4 == 0) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1370 API a_du_0[20]; // Header + DATA traffic uplink information, sub. chan. 0. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1371 API a_du_1[20]; // Header + DATA traffic uplink information, sub. chan. 1. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1372 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1373 #if (DATA14_4 == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1374 API a_du_0[22]; // Header + DATA traffic uplink information, sub. chan. 0. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1375 API a_du_1[22]; // Header + DATA traffic uplink information, sub. chan. 1. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1376 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1377 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1378 // Random access.....................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1379 API d_rach; // RACH information. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1380 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1381 //...................................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1382 API d_a5mode; // Encryption Mode. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1383 API a_kc[4]; // Encryption Key Code. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1384 API d_tch_mode; // TCH mode register. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1385 // bit [0..1] -> b_dai_mode. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1386 // bit [2] -> b_dtx. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1387 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1388 // OMEGA...........................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1389 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1390 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2)) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1391 API a_ramp[16]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1392 #if (MELODY_E1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1393 API d_melo_osc_used; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1394 API d_melo_osc_active; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1395 API a_melo_note0[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1396 API a_melo_note1[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1397 API a_melo_note2[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1398 API a_melo_note3[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1399 API a_melo_note4[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1400 API a_melo_note5[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1401 API a_melo_note6[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1402 API a_melo_note7[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1403 #if (DSP == 17) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1404 // selection of the melody format |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1405 API d_dco_type; // Tide |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1406 API p_start_IQ; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1407 API d_level_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1408 API d_dco_dbg; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1409 API d_tide_resa; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1410 API d_asynch_margin; // Perseus Asynch Audio Workaround |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1411 API hole[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1412 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1413 API d_melody_selection; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1414 API holes[9]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1415 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1416 #else // NO MELODY E1 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1417 // selection of the melody format |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1418 #if (DSP == 17) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1419 API holes[34]; // 34 unused holes. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1420 API d_dco_type; // Tide |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1421 API p_start_IQ; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1422 API d_level_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1423 API d_dco_dbg; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1424 API d_tide_resa; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1425 API d_asynch_margin; // Perseus Asynch Audio Workaround |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1426 API hole[4] |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1427 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1428 // selection of the melody format |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1429 API d_melody_selection; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1430 API holes[43]; // 43 unused holes. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1431 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1432 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1433 API d_debug3; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1434 API d_debug2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1435 API d_debug1; // bit 0 at 1 enable dsp f_tx delay for Omega |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1436 API d_afcctladd; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1437 API d_vbuctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1438 API d_vbdctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1439 API d_apcdel1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1440 API d_aec_ctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1441 API d_apcoff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1442 API d_bulioff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1443 API d_bulqoff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1444 API d_dai_onoff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1445 API d_auxdac; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1446 #if (ANLG_FAM == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1447 API d_vbctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1448 #elif (ANLG_FAM == 2) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1449 API d_vbctrl1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1450 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1451 API d_bbctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1452 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1453 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1454 #error DSPCODE not supported with given ANALOG |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1455 #endif //(ANALOG)1, 2 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1456 //...................................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1457 API a_sch26[5]; // Header + SB information, array of 5 words. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1458 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1459 // TONES.............................(MCU -> DSP) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1460 API d_toneskb_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1461 API d_toneskb_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1462 API d_k_x1_t0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1463 API d_k_x1_t1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1464 API d_k_x1_t2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1465 API d_pe_rep; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1466 API d_pe_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1467 API d_se_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1468 API d_bu_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1469 API d_t0_on; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1470 API d_t0_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1471 API d_t1_on; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1472 API d_t1_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1473 API d_t2_on; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1474 API d_t2_off; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1475 API d_k_x1_kt0; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1476 API d_k_x1_kt1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1477 API d_dur_kb; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1478 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1479 // PLL...............................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1480 API d_pll_clkmod1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1481 API d_pll_clkmod2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1482 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1483 // DSP status returned..........(DSP --> MCU). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1484 API d_error_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1485 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1486 // RIF control.......................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1487 API d_spcx_rif; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1488 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1489 API d_shiftdl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1490 API d_shiftul; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1491 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1492 #if (AEC == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1493 // AEC control.......................(MCU -> DSP). |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1494 #if (VOC == FR_EFR) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1495 API p_aec_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1496 API p_aec_prog; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1497 API p_spenh_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1498 API p_spenh_prog; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1499 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1500 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1501 #if (VOC == FR_HR_EFR) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1502 API p_saec_prog; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1503 API p_aec_prog; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1504 API p_spenh_prog; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1505 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1506 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1507 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1508 API a_ovly[75]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1509 API d_ra_conf; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1510 API d_ra_act; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1511 API d_ra_test; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1512 API d_ra_statu; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1513 API d_ra_statd; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1514 API d_fax; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1515 #if (SPEECH_RECO) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1516 API a_data_buf_ul[3]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1517 API a_n_best_words[4]; // array of the 4 best words |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1518 API a_n_best_score[8]; // array of the 4 best scores (each score is 32 bits length) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1519 API sr_holes_2[6]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1520 API a_data_buf_dl[37]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1521 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1522 API fir_holes1[409]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1523 API a_fir31_uplink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1524 API a_fir31_downlink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1525 API d_audio_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1526 API d_audio_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1527 API a_model[1041]; // array of the speech reco model |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1528 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1529 API a_data_buf_ul[21]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1530 API a_data_buf_dl[37]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1531 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1532 API fir_holes1[409]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1533 API a_fir31_uplink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1534 API a_fir31_downlink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1535 API d_audio_init; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1536 API d_audio_status; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1537 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1538 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1539 T_NDB_MCU_DSP; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1540 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1541 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1542 #if (DSP == 34) || (DSP == 35) || (DSP == 36) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1543 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1544 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1545 API_SIGNED d_transfer_rate; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1546 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1547 // Common GSM/GPRS |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1548 // These words specified the latencies to applies on some peripherics |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1549 API_SIGNED d_lat_mcu_bridge; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1550 API_SIGNED d_lat_mcu_hom2sam; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1551 API_SIGNED d_lat_mcu_bef_fast_access; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1552 API_SIGNED d_lat_dsp_after_sam; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1553 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1554 // DSP Start address |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1555 API_SIGNED d_gprs_install_address; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1556 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1557 API_SIGNED d_misc_config; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1558 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1559 API_SIGNED d_cn_sw_workaround; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1560 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1561 API_SIGNED d_hole2_param[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1562 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1563 //...................................Frequency Burst. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1564 API_SIGNED d_fb_margin_beg; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1565 API_SIGNED d_fb_margin_end; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1566 API_SIGNED d_nsubb_idle; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1567 API_SIGNED d_nsubb_dedic; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1568 API_SIGNED d_fb_thr_det_iacq; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1569 API_SIGNED d_fb_thr_det_track; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1570 //...................................Demodulation. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1571 API_SIGNED d_dc_off_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1572 API_SIGNED d_dummy_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1573 API_SIGNED d_dem_pond_gewl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1574 API_SIGNED d_dem_pond_red; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1575 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1576 //...................................TCH Full Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1577 API_SIGNED d_maccthresh1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1578 API_SIGNED d_mldt; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1579 API_SIGNED d_maccthresh; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1580 API_SIGNED d_gu; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1581 API_SIGNED d_go; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1582 API_SIGNED d_attmax; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1583 API_SIGNED d_sm; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1584 API_SIGNED d_b; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1585 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1586 // V42Bis module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1587 API_SIGNED d_v42b_switch_hyst; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1588 API_SIGNED d_v42b_switch_min; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1589 API_SIGNED d_v42b_switch_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1590 API_SIGNED d_v42b_reset_delay; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1591 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1592 //...................................TCH Half Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1593 API_SIGNED d_ldT_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1594 API_SIGNED d_maccthresh_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1595 API_SIGNED d_maccthresh1_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1596 API_SIGNED d_gu_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1597 API_SIGNED d_go_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1598 API_SIGNED d_b_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1599 API_SIGNED d_sm_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1600 API_SIGNED d_attmax_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1601 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1602 //...................................TCH Enhanced FR Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1603 API_SIGNED c_mldt_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1604 API_SIGNED c_maccthresh_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1605 API_SIGNED c_maccthresh1_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1606 API_SIGNED c_gu_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1607 API_SIGNED c_go_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1608 API_SIGNED c_b_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1609 API_SIGNED c_sm_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1610 API_SIGNED c_attmax_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1611 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1612 //...................................CHED |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1613 API_SIGNED d_sd_min_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1614 API_SIGNED d_ma_min_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1615 API_SIGNED d_md_max_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1616 API_SIGNED d_md1_max_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1617 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1618 API_SIGNED d_sd_min_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1619 API_SIGNED d_ma_min_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1620 API_SIGNED d_sd_av_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1621 API_SIGNED d_md_max_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1622 API_SIGNED d_md1_max_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1623 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1624 API_SIGNED d_sd_min_thr_tchefs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1625 API_SIGNED d_ma_min_thr_tchefs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1626 API_SIGNED d_md_max_thr_tchefs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1627 API_SIGNED d_md1_max_thr_tchefs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1628 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1629 API_SIGNED d_wed_fil_ini; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1630 API_SIGNED d_wed_fil_tc; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1631 API_SIGNED d_x_min; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1632 API_SIGNED d_x_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1633 API_SIGNED d_slope; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1634 API_SIGNED d_y_min; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1635 API_SIGNED d_y_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1636 API_SIGNED d_wed_diff_threshold; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1637 API_SIGNED d_mabfi_min_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1638 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1639 // FACCH module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1640 API_SIGNED d_facch_thr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1641 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1642 // IDS module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1643 API_SIGNED d_max_ovsp_ul; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1644 API_SIGNED d_sync_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1645 API_SIGNED d_idle_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1646 API_SIGNED d_m1_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1647 API_SIGNED d_max_ovsp_dl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1648 API_SIGNED d_gsm_bgd_mgt; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1649 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1650 // FIR coefficients |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1651 API a_fir_holes[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1652 API a_fir31_uplink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1653 API a_fir31_downlink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1654 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1655 T_PARAM_MCU_DSP; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1656 #elif (DSP == 33) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1657 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1658 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1659 API_SIGNED d_transfer_rate; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1660 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1661 // Common GSM/GPRS |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1662 // These words specified the latencies to applies on some peripherics |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1663 API_SIGNED d_lat_mcu_bridge; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1664 API_SIGNED d_lat_mcu_hom2sam; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1665 API_SIGNED d_lat_mcu_bef_fast_access; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1666 API_SIGNED d_lat_dsp_after_sam; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1667 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1668 // DSP Start address |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1669 API_SIGNED d_gprs_install_address; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1670 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1671 API_SIGNED d_misc_config; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1672 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1673 API_SIGNED d_cn_sw_workaround; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1674 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1675 #if DCO_ALGO |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1676 API_SIGNED d_cn_dco_param; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1677 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1678 API_SIGNED d_hole2_param[3]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1679 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1680 API_SIGNED d_hole2_param[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1681 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1682 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1683 //...................................Frequency Burst. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1684 API_SIGNED d_fb_margin_beg; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1685 API_SIGNED d_fb_margin_end; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1686 API_SIGNED d_nsubb_idle; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1687 API_SIGNED d_nsubb_dedic; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1688 API_SIGNED d_fb_thr_det_iacq; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1689 API_SIGNED d_fb_thr_det_track; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1690 //...................................Demodulation. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1691 API_SIGNED d_dc_off_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1692 API_SIGNED d_dummy_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1693 API_SIGNED d_dem_pond_gewl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1694 API_SIGNED d_dem_pond_red; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1695 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1696 //...................................TCH Full Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1697 API_SIGNED d_maccthresh1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1698 API_SIGNED d_mldt; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1699 API_SIGNED d_maccthresh; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1700 API_SIGNED d_gu; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1701 API_SIGNED d_go; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1702 API_SIGNED d_attmax; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1703 API_SIGNED d_sm; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1704 API_SIGNED d_b; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1705 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1706 // V42Bis module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1707 API_SIGNED d_v42b_switch_hyst; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1708 API_SIGNED d_v42b_switch_min; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1709 API_SIGNED d_v42b_switch_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1710 API_SIGNED d_v42b_reset_delay; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1711 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1712 //...................................TCH Half Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1713 API_SIGNED d_ldT_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1714 API_SIGNED d_maccthresh_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1715 API_SIGNED d_maccthresh1_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1716 API_SIGNED d_gu_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1717 API_SIGNED d_go_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1718 API_SIGNED d_b_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1719 API_SIGNED d_sm_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1720 API_SIGNED d_attmax_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1721 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1722 //...................................TCH Enhanced FR Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1723 API_SIGNED c_mldt_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1724 API_SIGNED c_maccthresh_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1725 API_SIGNED c_maccthresh1_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1726 API_SIGNED c_gu_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1727 API_SIGNED c_go_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1728 API_SIGNED c_b_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1729 API_SIGNED c_sm_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1730 API_SIGNED c_attmax_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1731 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1732 //...................................CHED |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1733 API_SIGNED d_sd_min_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1734 API_SIGNED d_ma_min_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1735 API_SIGNED d_md_max_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1736 API_SIGNED d_md1_max_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1737 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1738 API_SIGNED d_sd_min_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1739 API_SIGNED d_ma_min_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1740 API_SIGNED d_sd_av_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1741 API_SIGNED d_md_max_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1742 API_SIGNED d_md1_max_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1743 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1744 API_SIGNED d_sd_min_thr_tchefs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1745 API_SIGNED d_ma_min_thr_tchefs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1746 API_SIGNED d_md_max_thr_tchefs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1747 API_SIGNED d_md1_max_thr_tchefs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1748 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1749 API_SIGNED d_wed_fil_ini; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1750 API_SIGNED d_wed_fil_tc; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1751 API_SIGNED d_x_min; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1752 API_SIGNED d_x_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1753 API_SIGNED d_slope; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1754 API_SIGNED d_y_min; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1755 API_SIGNED d_y_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1756 API_SIGNED d_wed_diff_threshold; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1757 API_SIGNED d_mabfi_min_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1758 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1759 // FACCH module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1760 API_SIGNED d_facch_thr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1761 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1762 // IDS module |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1763 API_SIGNED d_max_ovsp_ul; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1764 API_SIGNED d_sync_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1765 API_SIGNED d_idle_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1766 API_SIGNED d_m1_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1767 API_SIGNED d_max_ovsp_dl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1768 API_SIGNED d_gsm_bgd_mgt; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1769 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1770 // FIR coefficients |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1771 API a_fir_holes[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1772 API a_fir31_uplink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1773 API a_fir31_downlink[31]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1774 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1775 T_PARAM_MCU_DSP; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1776 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1777 #else |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1778 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1779 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1780 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1781 //...................................Frequency Burst. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1782 API_SIGNED d_nsubb_idle; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1783 API_SIGNED d_nsubb_dedic; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1784 API_SIGNED d_fb_thr_det_iacq; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1785 API_SIGNED d_fb_thr_det_track; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1786 //...................................Demodulation. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1787 API_SIGNED d_dc_off_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1788 API_SIGNED d_dummy_thres; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1789 API_SIGNED d_dem_pond_gewl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1790 API_SIGNED d_dem_pond_red; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1791 API_SIGNED hole[1]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1792 API_SIGNED d_transfer_rate; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1793 //...................................TCH Full Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1794 API_SIGNED d_maccthresh1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1795 API_SIGNED d_mldt; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1796 API_SIGNED d_maccthresh; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1797 API_SIGNED d_gu; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1798 API_SIGNED d_go; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1799 API_SIGNED d_attmax; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1800 API_SIGNED d_sm; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1801 API_SIGNED d_b; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1802 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1803 #if (VOC == FR_HR) || (VOC == FR_HR_EFR) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1804 //...................................TCH Half Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1805 API_SIGNED d_ldT_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1806 API_SIGNED d_maccthresh_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1807 API_SIGNED d_maccthresh1_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1808 API_SIGNED d_gu_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1809 API_SIGNED d_go_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1810 API_SIGNED d_b_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1811 API_SIGNED d_sm_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1812 API_SIGNED d_attmax_hr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1813 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1814 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1815 #if (VOC == FR_EFR) || (VOC == FR_HR_EFR) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1816 //...................................TCH Enhanced FR Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1817 API_SIGNED c_mldt_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1818 API_SIGNED c_maccthresh_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1819 API_SIGNED c_maccthresh1_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1820 API_SIGNED c_gu_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1821 API_SIGNED c_go_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1822 API_SIGNED c_b_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1823 API_SIGNED c_sm_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1824 API_SIGNED c_attmax_efr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1825 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1826 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1827 //...................................TCH Full Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1828 API_SIGNED d_sd_min_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1829 API_SIGNED d_ma_min_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1830 API_SIGNED d_md_max_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1831 API_SIGNED d_md1_max_thr_tchfs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1832 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1833 #if (VOC == FR) || (VOC == FR_HR) || (VOC == FR_HR_EFR) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1834 //...................................TCH Half Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1835 API_SIGNED d_sd_min_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1836 API_SIGNED d_ma_min_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1837 API_SIGNED d_sd_av_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1838 API_SIGNED d_md_max_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1839 API_SIGNED d_md1_max_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1840 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1841 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1842 #if (VOC == FR_EFR) || (VOC == FR_HR_EFR) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1843 //...................................TCH Enhanced FR Speech. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1844 API_SIGNED d_sd_min_thr_tchefs; //(24L *C_POND_RED) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1845 API_SIGNED d_ma_min_thr_tchefs; //(1200L *C_POND_RED) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1846 API_SIGNED d_md_max_thr_tchefs; //(2000L *C_POND_RED) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1847 API_SIGNED d_md1_max_thr_tchefs; //(160L *C_POND_RED) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1848 API_SIGNED d_hole1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1849 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1850 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1851 API_SIGNED d_wed_fil_ini; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1852 API_SIGNED d_wed_fil_tc; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1853 API_SIGNED d_x_min; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1854 API_SIGNED d_x_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1855 API_SIGNED d_slope; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1856 API_SIGNED d_y_min; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1857 API_SIGNED d_y_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1858 API_SIGNED d_wed_diff_threshold; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1859 API_SIGNED d_mabfi_min_thr_tchhs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1860 API_SIGNED d_facch_thr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1861 API_SIGNED d_dsp_test; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1862 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1863 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1864 #if (DATA14_4 == 0 ) || (VOC == FR_HR_EFR) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1865 API_SIGNED d_patch_addr1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
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1866 API_SIGNED d_patch_data1; |
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|
1867 API_SIGNED d_patch_addr2; |
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|
1868 API_SIGNED d_patch_data2; |
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1869 API_SIGNED d_patch_addr3; |
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|
1870 API_SIGNED d_patch_data3; |
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1871 API_SIGNED d_patch_addr4; |
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1872 API_SIGNED d_patch_data4; |
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1873 #endif |
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1874 |
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1875 //................................... |
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1876 API_SIGNED d_version_number; // DSP patch version |
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1877 API_SIGNED d_ti_version; // customer number. No more used since 1.5 |
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1878 |
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1879 API_SIGNED d_dsp_page; |
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1880 |
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1881 #if IDS |
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1882 API_SIGNED d_max_ovsp_ul; |
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1883 API_SIGNED d_sync_thres; |
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1884 API_SIGNED d_idle_thres; |
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1885 API_SIGNED d_m1_thres; |
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1886 API_SIGNED d_max_ovsp_dl; |
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1887 #endif |
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1888 |
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1889 |
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1890 } |
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1891 T_PARAM_MCU_DSP; |
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1892 #endif |
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1893 |
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1894 #if (DSP_DEBUG_TRACE_ENABLE == 1) |
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1895 typedef struct |
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1896 { |
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1897 API d_debug_ptr_begin; |
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1898 API d_debug_ptr_end; |
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1899 } |
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1900 T_DB2_DSP_TO_MCU; |
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1901 #endif |
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1902 |
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1903 /*************************************************************/ |
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1904 /* Time informations... */ |
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1905 /*************************************************************/ |
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1906 /* */ |
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1907 /*************************************************************/ |
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1908 typedef struct |
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1909 { |
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1910 UWORD32 fn; // FN count |
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1911 UWORD16 t1; // FN div (26*51), (0..2047). |
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1912 UWORD8 t2; // FN modulo 26. |
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1913 UWORD8 t3; // FN modulo 51. |
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1914 UWORD8 tc; // Scell: TC |
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1915 UWORD8 fn_in_report; // FN modulo 102 or 104. |
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1916 UWORD16 fn_mod42432; // FN modulo 42432. |
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1917 UWORD8 fn_mod13; // FN modulo 13. |
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1918 #if L1_GPRS |
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1919 UWORD8 fn_mod52; // FN modulo 52. |
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1920 UWORD8 fn_mod104; // FN modulo 104. |
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1921 UWORD8 fn_mod13_mod4; // FN modulo 13 modulo 4. |
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1922 UWORD32 block_id; // Block ID |
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1923 #endif |
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1924 } |
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1925 T_TIME_INFO; |
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1926 |
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1927 /*************************************************************/ |
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1928 /* Idle mode tasks information... */ |
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1929 /*************************************************************/ |
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1930 /* must be filled according to Idle parameters... */ |
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1931 /* ... */ |
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1932 /*************************************************************/ |
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1933 typedef struct |
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1934 { |
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1935 UWORD8 pg_position; // Paging block starting frame. |
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1936 UWORD8 extpg_position; // Extended Paging block starting frame. |
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1937 } |
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1938 T_IDLE_TASK_INFO; |
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1939 |
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1940 /*************************************************************/ |
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1941 /* SDCCH information structure. */ |
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1942 /*************************************************************/ |
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1943 /* */ |
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1944 /* */ |
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1945 /*************************************************************/ |
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1946 typedef struct |
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1947 { |
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1948 UWORD8 dl_sdcch_position; |
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1949 UWORD8 dl_sacch_position; |
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1950 UWORD8 ul_sdcch_position; |
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1951 UWORD8 ul_sacch_position; |
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1952 UWORD8 mon_area_position; |
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1953 } |
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1954 T_SDCCH_DESC; |
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1955 |
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1956 /*************************************************************/ |
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1957 /* Random Access Task information structure. */ |
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1958 /*************************************************************/ |
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1959 /* */ |
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1960 /* */ |
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1961 /*************************************************************/ |
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1962 typedef struct |
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1963 { |
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1964 WORD32 rand; // 16 bit signed !! |
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1965 UWORD8 channel_request; |
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1966 UWORD8 ra_to_ctrl; |
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1967 UWORD8 ra_num; |
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|
1968 } |
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1969 T_RA_TASK_INFO; |
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|
1970 |
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|
1971 /***************************************************************************************/ |
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1972 /* Measurement info element for last input level table */ |
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|
1973 /***************************************************************************************/ |
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|
1974 typedef struct |
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|
1975 { |
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|
1976 UWORD8 lna_off; // 1 if lna switch is off. |
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1977 UWORD8 input_level; // last measured input level in dbm. |
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|
1978 } |
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1979 T_INPUT_LEVEL; |
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1980 |
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1981 /***************************************************************************************/ |
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1982 /* Measurement info element for Neighbor cell lists. */ |
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1983 /***************************************************************************************/ |
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1984 typedef struct |
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1985 { |
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1986 UWORD16 radio_freq; // carrier id. |
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1987 WORD32 acc; // Accumulation of measurements already performed. |
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1988 UWORD8 nbr_meas; |
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1989 } |
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1990 T_MEAS_INFO; |
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1991 |
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1992 typedef struct |
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1993 { |
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1994 UWORD16 bcch_freq; |
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1995 WORD16 rxlev_acc; |
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1996 UWORD8 rxlev_nbr_meas; |
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1997 } |
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1998 T5_CELL_MEAS; |
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1999 |
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2000 typedef struct |
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2001 { |
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2002 T5_CELL_MEAS A[33]; |
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2003 } |
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2004 T5_NCELL_MEAS; |
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2005 |
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2006 /***************************************************************************************/ |
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2007 /* Measurement info element serving cell in dedicated mode */ |
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2008 /***************************************************************************************/ |
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|
2009 typedef struct |
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|
2010 { |
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|
2011 WORD32 acc_sub; // Subset: accu. rxlev meas. |
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2012 UWORD32 nbr_meas_sub; // Subset: nbr meas. of rxlev. |
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2013 UWORD32 qual_acc_full; // Fullset: accu. rxqual meas. |
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|
2014 UWORD32 qual_acc_sub; // Subset: accu. rxqual meas. |
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2015 UWORD32 qual_nbr_meas_full; // Fullset: nbr meas. of rxqual. |
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|
2016 UWORD32 qual_nbr_meas_sub; // Subset: nbr meas. of rxqual. |
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|
2017 UWORD8 dtx_used; // Set when DTX as been used in current reporting period. |
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|
2018 } |
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|
2019 T_SMEAS; |
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|
2020 |
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|
2021 /***************************************************************************************/ |
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|
2022 /* */ |
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|
2023 /***************************************************************************************/ |
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|
2024 typedef struct |
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|
2025 { |
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|
2026 UWORD8 new_status; |
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|
2027 UWORD8 current_status; |
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|
2028 WORD32 time_to_exec; |
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|
2029 } |
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parents:
diff
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|
2030 T_TASK_STATUS; |
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|
2031 |
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|
2032 /***************************************************************************************/ |
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|
2033 /* Cell/Carrier info: identity, RX level measurement, time info, gain controle info. */ |
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|
2034 /***************************************************************************************/ |
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|
2035 typedef struct |
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Mychaela Falconia <falcon@freecalypso.org>
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|
2036 { |
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Mychaela Falconia <falcon@freecalypso.org>
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|
2037 // Carrier/Cell Identity. |
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diff
changeset
|
2038 UWORD16 radio_freq; // carrier id. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2039 WORD32 bsic; // BSIC. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2040 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2041 // Time difference information. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2042 UWORD32 fn_offset; // offset between fn of this NCELL and the SCELL fn. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2043 UWORD32 time_alignmt; // time alignment. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2044 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2045 // Receive Level Measurement info. structure. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2046 T_MEAS_INFO meas; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2047 T_INPUT_LEVEL traffic_meas; |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2048 T_INPUT_LEVEL traffic_meas_beacon; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2049 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2050 // Beacon frequency FIFO |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2051 UWORD8 buff_beacon[4]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2052 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2053 #if L1_GPRS |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2054 // Receive Level measurements in packet transfer mode |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2055 // Daughter frequencies info. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2056 T_INPUT_LEVEL transfer_meas; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2057 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2058 // Power reduction on serving cell PCCCH / PBCCH |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2059 UWORD8 pb; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2060 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2061 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2062 // Number of unsuccessfull attempt on SB reading. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2063 UWORD8 attempt_count; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2064 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2065 // System information bitmap. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2066 UWORD32 si_bit_map; // System info. bitmap used for BCCH reading. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2067 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2068 T_CELL_INFO; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2069 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2070 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2071 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2072 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2073 UWORD16 A[32+1]; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2074 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2075 TC_CHAN_LIST; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2076 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2077 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2078 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2079 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2080 UWORD8 num_of_chans; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2081 TC_CHAN_LIST chan_list; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2082 BOOL pwrc; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2083 BOOL dtx_allowed; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2084 UWORD8 ba_id; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2085 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2086 T_NEW_BA_LIST; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2087 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2088 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2089 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2090 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2091 UWORD8 ba_id; // BA list identifier. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2092 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2093 UWORD32 nbr_carrier; // number of carriers in the BA list. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2094 UWORD8 np_ctrl; // Tels the meas_manager which PCH burst has been controled. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2095 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2096 UWORD8 first_index; // First BA index measured in current session. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2097 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2098 UWORD8 next_to_ctrl; // Carrier for next power measurement result. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2099 UWORD8 next_to_read; // Measurement session time spent. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2100 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2101 UWORD8 ms_ctrl; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2102 UWORD8 ms_ctrl_d; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2103 UWORD8 ms_ctrl_dd; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2104 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2105 UWORD8 used_il [2]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2106 UWORD8 used_il_d [2]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2107 UWORD8 used_il_dd[2]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2108 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2109 UWORD8 used_lna [2]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2110 UWORD8 used_lna_d [2]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2111 UWORD8 used_lna_dd[2]; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2112 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2113 T_MEAS_INFO A[32+1]; // list of 32 neighbors + 1 serving. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2114 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2115 BOOL new_list_present; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2116 T_NEW_BA_LIST new_list; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2117 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2118 T_BA_LIST; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2119 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2120 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2121 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2122 UWORD16 radio_freq; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2123 WORD16 accum_power_result; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2124 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2125 T_POWER_ARRAY; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2126 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2127 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2128 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2129 UWORD16 power_array_size; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2130 T_POWER_ARRAY power_array[NBMAX_CARRIER]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2131 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2132 T_FULL_LIST_MEAS; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2133 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2134 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2135 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2136 UWORD32 nbr_sat_carrier_ctrl; // Nb of saturated carriers after a pm session in ctrl. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2137 UWORD32 nbr_sat_carrier_read; // Nb of saturated carriers after a pm session in read. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2138 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2139 UWORD8 meas_1st_pass_ctrl; // flag for 1st pass during a pm session in ctrl. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2140 UWORD8 meas_1st_pass_read; // flag for 1st pass during a pm session in read. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2141 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2142 UWORD32 next_to_ctrl; // Carrier for next power measurement result. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2143 UWORD32 next_to_read; // Measurement session time spent. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2144 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2145 UWORD8 ms_ctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2146 UWORD8 ms_ctrl_d; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2147 UWORD8 ms_ctrl_dd; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2148 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2149 UWORD8 sat_flag[NBMAX_CARRIER]; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2150 // last measure was saturated, so not valid |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2151 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2152 T_FULL_LIST; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2153 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2154 /*************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2155 /* Dedicated channel information structure... */ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2156 /*************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2157 /* */ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2158 /*************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2159 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2160 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2161 T_CHANNEL_DESCRIPTION *desc_ptr; // Ptr to the Active channel description |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2162 T_CHANNEL_DESCRIPTION desc; // Channel description for AFTER STI. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2163 T_CHANNEL_DESCRIPTION desc_bef_sti; // Channel description for BEFORE STI. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2164 UWORD8 mode; // Channel mode. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2165 UWORD8 tch_loop; // TCH loop mode. |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2166 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2167 T_CHANNEL_INFO; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2168 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2169 /*************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2170 /* Mobile allocation information structure... */ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2171 /*************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2172 /* */ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2173 /*************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2174 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2175 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2176 T_MOBILE_ALLOCATION *alist_ptr; // Ptr to the Active frequency list |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2177 T_MOBILE_ALLOCATION freq_list; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2178 T_MOBILE_ALLOCATION freq_list_bef_sti; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2179 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2180 T_MA_INFO; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2181 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2182 /*************************************************************/ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2183 /* Dedicated channel parameter structure... */ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2184 /*************************************************************/ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2185 /* */ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2186 /*************************************************************/ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2187 typedef struct |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2188 { |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2189 T_CHANNEL_INFO *achan_ptr; // Ptr to the Active channel (chan1 or chan2) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2190 T_CHANNEL_INFO chan1; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2191 T_CHANNEL_INFO chan2; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2192 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2193 T_MA_INFO ma; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2194 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2195 WORD32 serv_sti_fn; // Chan. desc. change time, serving domain.(-1 for not in use). |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2196 WORD32 neig_sti_fn; // Chan. desc. change time, neighbor domain.(-1 for not in use). |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2197 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2198 // Frequency redefinition ongoing flag. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2199 //------------------------------------- |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2200 UWORD8 freq_redef_flag; // Set to TRUE when a Freq. Redef. must be confirmed. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2201 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2202 // Timing Advance management. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2203 //--------------------------- |
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2204 UWORD8 timing_advance; // Currently used TA. |
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2205 UWORD8 new_timing_advance; // New timing advance value to be used on 1st frame |
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2206 // of the next reporting period. |
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2207 // TXPWR management. |
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2208 //------------------- |
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2209 UWORD8 new_target_txpwr; // New Target value for TXPWR control algo. |
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2210 |
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|
2211 |
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2212 T_CELL_INFO cell_desc; // Ptr to the new serving cell to download. |
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2213 |
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2214 // DAI test mode... DTX allowed... |
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|
2215 UWORD8 dai_mode; // Dai test mode. |
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2216 BOOL dtx_allowed; // DTX allowed (flag). |
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2217 |
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2218 // Encryption... |
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2219 T_ENCRYPTION_KEY ciph_key; |
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2220 UWORD8 a5mode; |
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2221 |
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2222 // For handover... |
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2223 UWORD8 ho_acc; // Handover access (part of HO reference) |
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2224 WORD32 ho_acc_to_send; // Set to 4 for SYNC HO and to -1 for ASYNC HO. |
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2225 UWORD8 t3124; // Timer used in Async. Ho. |
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2226 |
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2227 // For DPAGC algorithms purpose |
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2228 UWORD8 G_all[DPAGC_FIFO_LEN]; |
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2229 UWORD8 G_DTX[DPAGC_FIFO_LEN]; |
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|
2230 #if (AMR == 1) |
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|
2231 UWORD8 G_amr[DPAGC_AMR_FIFO_LEN]; |
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2232 #endif |
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2233 |
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|
2234 #if IDS |
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|
2235 // IDS mode configuration |
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|
2236 UWORD8 ids_mode; // Information transfert capability coded on 2 bits |
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|
2237 // 0: speech |
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parents:
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|
2238 // 1: data service |
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|
2239 // 2: fax service |
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2240 #endif |
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|
2241 #if (AMR == 1) |
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|
2242 T_AMR_CONFIGURATION amr_configuration; |
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|
2243 UWORD8 cmip; |
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|
2244 #endif |
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|
2245 } |
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|
2246 T_DEDIC_SET; |
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|
2247 |
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|
2248 /*************************************************************/ |
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|
2249 /* Dedicated channel parameter structure... */ |
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|
2250 /*************************************************************/ |
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|
2251 /* */ |
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|
2252 /*************************************************************/ |
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|
2253 typedef struct |
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|
2254 { |
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|
2255 T_DEDIC_SET *aset; // Ptr to the Active parameter set |
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|
2256 T_DEDIC_SET *fset; // Ptr to the Free parameter set |
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|
2257 T_DEDIC_SET set[2]; // Table of parameter set |
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|
2258 |
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diff
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|
2259 T_MPHC_CHANNEL_MODE_MODIFY_REQ mode_modif; // New mode for a given subchannel. |
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|
2260 WORD32 SignalCode; // Message name, set when a new param. set is given |
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|
2261 |
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diff
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|
2262 #if (FF_L1_TCH_VOCODER_CONTROL == 1) |
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diff
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|
2263 UWORD8 reset_sacch; // Flag to control SACCH reset (set during CHAN ASSIGN and Hand-overs) |
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|
2264 UWORD8 vocoder_on; // Flag to control execution of vocoder |
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|
2265 UWORD8 start_vocoder; // Flag to trigger start of vocoder (vocoder must be started with a synchro start) |
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|
2266 #endif |
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|
2267 |
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diff
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|
2268 UWORD8 sync_tch; // Flag used to synchronize TCH/F or TCH/H. |
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|
2269 UWORD8 reset_facch; // Flag used to reset FACCH buffer header on new IAS/CAS/handover |
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Mychaela Falconia <falcon@freecalypso.org>
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|
2270 UWORD8 stop_tch; // Flag used to stop TCH/F or TCH/H (VEGA pwrdown). |
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|
2271 |
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|
2272 UWORD16 radio_freq; // ARFCN buffer (returned by hopping algo). |
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|
2273 UWORD16 radio_freq_d; // 1 frame delayed ARFCN. |
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diff
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|
2274 UWORD16 radio_freq_dd; // 2 frames delayed ARFCN. |
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|
2275 |
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|
2276 BOOL pwrc; // Flag used to reject serving pwr meas. on beacon. |
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|
2277 |
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diff
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|
2278 BOOL handover_fail_mode; // Flag used to indicate that the L1 wait for an handover fail request |
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|
2279 #if (AMR == 1) |
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|
2280 BOOL sync_amr; // Flag used to tell to the DSP that a new AMR paramters is ready in the NDB. |
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|
2281 #endif |
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|
2282 } |
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|
2283 T_DEDIC_PARAM; |
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|
2284 |
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|
2285 /*************************************************************/ |
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|
2286 /* Power Management structure... */ |
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|
2287 /*************************************************************/ |
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|
2288 typedef struct |
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|
2289 { |
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|
2290 // fields of TST_SLEEP_REQ primitive .... |
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|
2291 UWORD8 mode_authorized; // NONE,SMALL,BIG,DEEP,ALL |
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|
2292 UWORD32 clocks; // clocks disabled in Big sleep |
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|
2293 |
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|
2294 // 32 Khz gauging .... |
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|
2295 UWORD8 gauging_task; // ACTIVE, INACTIVE,WAIT-IQ |
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|
2296 UWORD8 gaug_duration; // gauging task duration |
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|
2297 UWORD8 gaug_count; // gauging task duration compteur |
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|
2298 UWORD32 histo[SIZE_HIST][2];// gauging histogram |
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|
2299 UWORD8 enough_gaug; // enough good gauging |
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|
2300 UWORD8 paging_scheduled; // first Paging Frame |
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|
2301 |
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|
2302 // flags and variables for wake-up .... |
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|
2303 UWORD8 Os_ticks_required; // TRUE : Os ticks to recover |
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|
2304 UWORD8 frame_adjust; // TRUE : adjust 1 frame |
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|
2305 UWORD32 sleep_duration; // sleep duration computed at wakeup |
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|
2306 |
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|
2307 // flag for sleep .... |
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|
2308 UWORD8 sleep_performed; // NONE,SMALL,BIG,DEEP,ALL |
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|
2309 |
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|
2310 // status of clocks modules .... |
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|
2311 UWORD32 modules_status; // modules clocks status |
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2312 |
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2313 // constantes for 32Khz filtering |
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2314 UWORD32 c_clk_min; // INIT state |
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2315 UWORD32 c_clk_init_min; // INIT state |
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2316 UWORD32 c_clk_max; // INIT state |
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|
2317 UWORD32 c_clk_init_max; // INIT state |
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2318 UWORD32 c_delta_hf_acquis; // ACQUIS state |
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2319 UWORD32 c_delta_hf_update; // UPDATE state |
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|
2320 |
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|
2321 // trace gauging parameters |
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2322 UWORD8 state; // state of the gauging |
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2323 UWORD32 lf; // Number of the 32KHz |
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2324 UWORD32 hf; // HF: nb_hf( Number of the 13MHz *6 ) |
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2325 UWORD32 root; // root & frac: the ratio of the HF & LF in each state. |
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2326 UWORD32 frac; |
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2327 |
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2328 } |
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2329 T_POWER_MNGT; |
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2330 |
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2331 /*************************************************************/ |
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2332 /* code version structure... */ |
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2333 /*************************************************************/ |
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2334 typedef struct |
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|
2335 { |
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2336 // DSP versions & checksum |
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|
2337 UWORD16 dsp_code_version; |
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|
2338 UWORD16 dsp_patch_version; |
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|
2339 UWORD16 dsp_checksum; // DSP checksum : patch+code |
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|
2340 |
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|
2341 // MCU versions |
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|
2342 UWORD16 mcu_tcs_program_release; |
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|
2343 UWORD16 mcu_tcs_official; |
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|
2344 UWORD16 mcu_tcs_internal; |
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|
2345 UWORD16 mcu_tm_version; |
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|
2346 } |
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|
2347 T_VERSION; |
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|
2348 |
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|
2349 #if L1_RECOVERY |
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|
2350 typedef struct |
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|
2351 { |
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|
2352 UWORD32 frame_count; |
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|
2353 } |
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|
2354 T_L1S_RECOVER; |
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2355 #endif |
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|
2356 |
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|
2357 /***************************************************************************************/ |
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|
2358 /* L1S global variable structure... */ |
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|
2359 /***************************************************************************************/ |
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|
2360 typedef struct |
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|
2361 { |
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|
2362 //++++++++++++++++++++ |
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|
2363 // Power Management... |
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|
2364 //++++++++++++++++++++ |
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|
2365 |
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|
2366 T_POWER_MNGT pw_mgr; // data base for power management |
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|
2367 |
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|
2368 // Time for debug & Simulation purpose... |
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|
2369 // -> used as base time for BTS simulation. |
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|
2370 //----------------------------------------- |
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|
2371 UWORD32 debug_time; // time counter used by L3 scenario... |
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|
2372 |
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|
2373 // L1S Tasks management... |
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|
2374 //----------------------------------------- |
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|
2375 T_TASK_STATUS task_status[NBR_DL_L1S_TASKS]; // ...in L1S, scheduler. |
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|
2376 UWORD8 frame_count; // ...nb frames to go. |
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|
2377 UWORD8 forbid_meas; // ...frames where meas. ctrl is not allowed. |
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|
2378 |
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|
2379 // MFTAB management variables... |
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|
2380 //----------------------------------------- |
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|
2381 UWORD8 afrm; // active frame ID. |
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|
2382 T_MFTAB FAR mftab; // Multiframe table. |
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|
2383 |
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|
2384 // Control parameters... |
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|
2385 //----------------------------------------- |
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|
2386 UWORD32 afc_frame_count; // AFC, Frame count between 2 calls to afc control function. |
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|
2387 WORD16 afc; // AFC, Common Frequency controle. |
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|
2388 WORD16 toa_shift; // TOA, value used to update the TOA |
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|
2389 UWORD8 toa_snr_mask; // TOA, mask counter to reject TOA/SNR results. |
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|
2390 |
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|
2391 UWORD16 toa_period_count; // TOA frame period used in PACKET TRANSFER MODE |
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|
2392 BOOL toa_update; // TOA, is set at the end of the update period, toa update occurs on next valid frame |
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2393 |
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|
2394 // Flag registers for RF task controle... |
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|
2395 //----------------------------------------- |
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|
2396 // Made these control registers short's as more than 8-bits required. |
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|
2397 UWORD16 tpu_ctrl_reg; // (x,x,x,x,SYNC,RX,TX,MS) RX/TX/MS/SYNC bit ON whenever an |
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|
2398 // according "controle" has been setup in the current frame. |
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|
2399 UWORD16 dsp_ctrl_reg; // (x,x,x,x,x,RX,TX,MS) RX/TX/MS bit ON whenever an |
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|
2400 // according "controle" has been setup in the current frame. |
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|
2401 |
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|
2402 //+++++++++++++++++++ |
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|
2403 // Serving... |
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|
2404 //+++++++++++++++++++ |
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|
2405 |
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|
2406 // Serving frame number management. |
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|
2407 //--------------------------------- |
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|
2408 T_TIME_INFO actual_time; // Time info: current FN, T1, T2, T3... |
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|
2409 T_TIME_INFO next_time; // Time info: next FN, T1, T2, T3... |
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|
2410 T_TIME_INFO next_plus_time; // Time info: next FN, T1, T2, T3... |
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|
2411 |
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|
2412 // TXPWR management. |
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|
2413 //------------------- |
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|
2414 UWORD8 reported_txpwr; // Reported value for TXPWR. |
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|
2415 UWORD8 applied_txpwr; // Current value for TXPWR. |
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|
2416 |
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|
2417 // Last RXQUAL value. |
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|
2418 //------------------- |
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|
2419 UWORD8 rxqual; // last rxqual value. |
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diff
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|
2420 |
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parents:
diff
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|
2421 // Hardware info. |
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parents:
diff
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|
2422 //--------------- |
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parents:
diff
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|
2423 UWORD32 tpu_offset; // Current TPU offset register value safeguard. |
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parents:
diff
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|
2424 UWORD32 tpu_offset_hw; // Current TPU offset register value copied in the TPU. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2425 UWORD16 tpu_win; // tpu window identifier inside a TDMA. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2426 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2427 // code versions |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2428 T_VERSION version; |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2429 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2430 #if (L1_GTT == 1) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2431 UWORD8 tty_state; // state for L1S GTT manager. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2432 #if L2_L3_SIMUL |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2433 // GTT test |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2434 T_GTT_TEST_L1S gtt_test; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2435 #endif |
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parents:
diff
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|
2436 #endif |
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parents:
diff
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|
2437 |
945cf7f506b2
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parents:
diff
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|
2438 #if (L1_DYN_DSP_DWNLD == 1) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2439 UWORD8 dyn_dwnld_state; // state for L1S DYN DWNLD manager |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2440 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2441 #if (AUDIO_TASK == 1) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2442 // Audio task. |
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parents:
diff
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|
2443 //----------------------------------------- |
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parents:
diff
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|
2444 BOOL l1_audio_it_com; // Flag to enable the ITCOM. |
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parents:
diff
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|
2445 UWORD8 audio_state[NBR_AUDIO_MANAGER]; // state for L1S audio manager. |
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parents:
diff
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|
2446 #if (MELODY_E1) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2447 T_L1S_MELODY_TASK melody0; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2448 T_L1S_MELODY_TASK melody1; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2449 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2450 #if (VOICE_MEMO) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2451 T_L1S_VM_TASK voicememo; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2452 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2453 #if (L1_VOICE_MEMO_AMR) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2454 T_L1S_VM_AMR_TASK voicememo_amr; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2455 #endif |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2456 #if (SPEECH_RECO) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2457 T_L1S_SR_TASK speechreco; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2458 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2459 #if (AEC) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2460 T_L1S_AEC_TASK aec; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2461 #endif |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2462 #if (MELODY_E2) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2463 T_L1S_MELODY_E2_COMMON_VAR melody_e2; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2464 T_L1S_MELODY_E2_TASK melody0_e2; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2465 T_L1S_MELODY_E2_TASK melody1_e2; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2466 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2467 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2468 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2469 UWORD8 last_used_txpwr; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2470 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2471 #if L1_GPRS |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2472 BOOL ctrl_synch_before; //control of synchro for CCCH reading en TN-2 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2473 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2474 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2475 #if L1_RECOVERY |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2476 T_L1S_RECOVER recovery; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2477 #endif |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2478 BOOL spurious_fb_detected; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2479 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2480 // Handling DTX mode |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2481 BOOL dtx_ul_on; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2482 WORD8 facch_bursts; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2483 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2484 // DTX mode in AMR |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2485 BOOL dtx_amr_dl_on; // set to TRUE when the AMR is in DTX mode in downlink |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2486 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2487 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2488 T_L1S_GLOBAL; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2489 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2490 /***************************************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2491 /* L1A global variable structure... */ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2492 /***************************************************************************************/ |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2493 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2494 { |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2495 // State for L1A state machines... |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2496 //----------------------------------------- |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2497 UWORD8 state[NBR_L1A_PROCESSES]; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2498 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2499 // Measurement tasks management... |
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parents:
diff
changeset
|
2500 //----------------------------------------- |
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parents:
diff
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|
2501 UWORD32 l1a_en_meas[NBR_L1A_PROCESSES]; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2502 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2503 // Flag for forward/delete message management. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2504 //--------------------------------------------- |
945cf7f506b2
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parents:
diff
changeset
|
2505 UWORD8 l1_msg_forwarded; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2506 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2507 #if (L1_DYN_DSP_DWNLD == 1) |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2508 // Dynamic donload global variables |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2509 T_L1A_DYN_DWNLD_GLOBAL dyn_dwnld; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2510 #endif |
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parents:
diff
changeset
|
2511 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2512 // signal code indicating the reason of L1C_DEDIC_DONE |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2513 UWORD32 confirm_SignalCode; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2514 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2515 // Trace the best frequencies reported in MPHC_RXLEV_IND |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2516 #if (L1_MPHC_RXLEV_IND_REPORT_SORT==1) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2517 UWORD16 tab_index[MAX_MEAS_RXLEV_IND_TRACE]; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2518 UWORD16 max_report; //max number of fq reported, can be < MAX_MEAS_RXLEV_IND_TRACE if list is smaller |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2519 #endif |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2520 } |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2521 T_L1A_GLOBAL; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2522 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
2523 /***************************************************************************************/ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2524 /* L1A -> L1S communication structure... */ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2525 /***************************************************************************************/ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2526 typedef struct |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2527 { |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2528 //+++++++++++++++++++ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2529 // Serving Cell... |
945cf7f506b2
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diff
changeset
|
2530 //+++++++++++++++++++ |
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diff
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|
2531 |
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diff
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|
2532 // Serving Cell identity and information. |
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diff
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|
2533 //--------------------------------------- |
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diff
changeset
|
2534 T_CELL_INFO Scell_info; |
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parents:
diff
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|
2535 T_SMEAS Smeas_dedic; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2536 |
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diff
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|
2537 UWORD8 Scell_IL_for_rxlev; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2538 T_INPUT_LEVEL Scell_used_IL; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2539 T_INPUT_LEVEL Scell_used_IL_d; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2540 T_INPUT_LEVEL Scell_used_IL_dd; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2541 |
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diff
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|
2542 T_BCCHS nbcchs; |
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diff
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|
2543 T_BCCHS ebcchs; |
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diff
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|
2544 |
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parents:
diff
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|
2545 // Synchro information. |
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parents:
diff
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|
2546 //--------------------------------------- |
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diff
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|
2547 WORD8 tn_difference; // Timeslot difference for next synchro. |
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parents:
diff
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|
2548 UWORD8 dl_tn; // Current timeslot for downlink stuffs. |
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parents:
diff
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|
2549 #if L1_GPRS |
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parents:
diff
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|
2550 UWORD8 dsp_scheduler_mode; // DSP Scheduler mode (GPRS or GSM). |
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|
2551 #endif |
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|
2552 |
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diff
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|
2553 // Idle parameters. |
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diff
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|
2554 //----------------- |
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diff
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|
2555 BOOL bcch_combined; // BS_CCCH_SDCCH_COMB flag. |
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diff
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|
2556 UWORD8 bs_pa_mfrms; // BS_PA_MFRMS parameter. |
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parents:
diff
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|
2557 UWORD8 bs_ag_blks_res; // BS_AG_BLKS_RES parameter. |
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diff
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|
2558 UWORD8 ccch_group; // CCCH_GROUP parameter. |
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parents:
diff
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|
2559 UWORD8 page_group; // PAGING_GROUP parameter. |
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parents:
diff
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|
2560 UWORD8 page_block_index; // Paging block index paramter. |
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diff
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|
2561 T_IDLE_TASK_INFO idle_task_info; // Idle task positions... |
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parents:
diff
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|
2562 UWORD8 nb_pch_per_mf51; // nbr paging blocks per mf51. |
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diff
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|
2563 |
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parents:
diff
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|
2564 // CBCH parameters. |
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diff
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|
2565 // ---------------- |
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parents:
diff
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|
2566 UWORD32 offset_tn0; // TPU offset for TN=0 (used for SMSCB only). |
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diff
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|
2567 T_CHANNEL_DESCRIPTION cbch_desc; // CBCH (SMSCB) channel description. |
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diff
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|
2568 T_MOBILE_ALLOCATION cbch_freq_list; // CBCH frequency list (hopping freq list). |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2569 UWORD32 mf51_fn; // Starting FN (for CBCH reading. |
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parents:
diff
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|
2570 UWORD8 cbch_start_in_mf51; // Starting position of CBCH in the MF51. |
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diff
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|
2571 T_CBCH_HEAD_SCHEDULE norm_cbch_schedule; // Normal CBCH scheduling structure. |
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parents:
diff
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|
2572 T_CBCH_HEAD_SCHEDULE ext_cbch_schedule; // Extended CBCH scheduling structure. |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2573 T_CBCH_INFO_SCHEDULE cbch_info_req; |
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parents:
diff
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|
2574 BOOL pre_scheduled_cbch; // CBCH task has to be scheduled 1 FN in advance |
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parents:
diff
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|
2575 BOOL change_synchro_cbch;// A Pseudo Synchro is needed to read CBCH block |
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parents:
diff
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|
2576 UWORD8 tn_smscb; // CBCH TN taking into account new Synchro |
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diff
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|
2577 |
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diff
changeset
|
2578 // Random Access information. |
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diff
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|
2579 // ---------------------------- |
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diff
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|
2580 T_RA_TASK_INFO ra_info; |
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diff
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|
2581 |
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diff
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|
2582 // ADC management. |
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diff
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|
2583 //------------------- |
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diff
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|
2584 UWORD16 adc_mode; |
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diff
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|
2585 UWORD8 adc_idle_period; |
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diff
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|
2586 UWORD8 adc_traffic_period; |
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parents:
diff
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|
2587 UWORD8 adc_cpt; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2588 |
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parents:
diff
changeset
|
2589 // TXPWR management. |
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parents:
diff
changeset
|
2590 //------------------- |
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diff
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|
2591 UWORD8 powerclass_band1; // Power class for the MS, given in ACCESS LINK mode (GSM Band). |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2592 UWORD8 powerclass_band2; // Power class for the MS, given in ACCESS LINK mode (DCS Band). |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2593 |
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parents:
diff
changeset
|
2594 // Dedicated parameters. |
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parents:
diff
changeset
|
2595 //---------------------- |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2596 T_DEDIC_PARAM dedic_set; // Dedicated channel parameters. |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2597 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2598 //+++++++++++++++++++ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2599 // Neighbour Cells... |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2600 //+++++++++++++++++++ |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2601 |
945cf7f506b2
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diff
changeset
|
2602 T_BCCHN_LIST bcchn; |
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diff
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|
2603 T_NSYNC_LIST nsync; |
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parents:
diff
changeset
|
2604 |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2605 // BA list / FULL list. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2606 //--------------------- |
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diff
changeset
|
2607 T_BA_LIST ba_list; |
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diff
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|
2608 T_FULL_LIST full_list; |
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diff
changeset
|
2609 T_FULL_LIST_MEAS *full_list_ptr; |
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diff
changeset
|
2610 |
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diff
changeset
|
2611 //+++++++++++++++++++ |
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diff
changeset
|
2612 // L1S scheduler... |
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diff
changeset
|
2613 //+++++++++++++++++++ |
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diff
changeset
|
2614 |
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diff
changeset
|
2615 // L1S tasks management... |
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diff
changeset
|
2616 //----------------------------------------- |
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diff
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|
2617 BOOL task_param[NBR_DL_L1S_TASKS]; // ...synchro semaphores. |
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diff
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|
2618 BOOL l1s_en_task[NBR_DL_L1S_TASKS]; // ...enable register. |
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diff
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|
2619 UWORD32 time_to_next_l1s_task; // time to wait to reach starting frame of next task. |
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diff
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|
2620 UWORD8 l1a_activity_flag; // Activity flag. |
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diff
changeset
|
2621 |
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diff
changeset
|
2622 // Measurement tasks management... |
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diff
changeset
|
2623 //----------------------------------------- |
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diff
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|
2624 UWORD32 meas_param; // Synchro semaphore bit register. |
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diff
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|
2625 UWORD32 l1s_en_meas; // Enable task bit register. |
945cf7f506b2
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diff
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|
2626 |
945cf7f506b2
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diff
changeset
|
2627 // L1 mode... |
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diff
changeset
|
2628 //----------------------------------------- |
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diff
changeset
|
2629 UWORD32 mode; // functional mode: CS_MODE, I_MODE... |
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diff
changeset
|
2630 |
945cf7f506b2
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diff
changeset
|
2631 //++++++++++++++++++++++++ |
945cf7f506b2
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diff
changeset
|
2632 // Controle parameters... |
945cf7f506b2
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parents:
diff
changeset
|
2633 //++++++++++++++++++++++++ |
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parents:
diff
changeset
|
2634 UWORD32 fb_mode; // Mode for fb detection algorithm. |
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parents:
diff
changeset
|
2635 UWORD8 toa_reset; // Flag for TOA algo. reset. |
945cf7f506b2
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parents:
diff
changeset
|
2636 |
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diff
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|
2637 // Input level memory for AGC management. |
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|
2638 //--------------------------------------- |
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diff
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|
2639 T_INPUT_LEVEL last_input_level[NBMAX_CARRIER+1]; |
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|
2640 |
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|
2641 BOOL recovery_flag; // in case of the system is down and needs to be recovered |
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|
2642 |
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|
2643 //++++++++++++++++++++++++ |
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|
2644 // Audio task... |
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|
2645 //++++++++++++++++++++++++ |
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|
2646 #if (AUDIO_TASK == 1) |
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|
2647 #if (KEYBEEP) |
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|
2648 T_KEYBEEP_TASK keybeep_task; |
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|
2649 #endif |
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|
2650 #if (TONE) |
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|
2651 T_TONE_TASK tone_task; |
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|
2652 #endif |
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|
2653 #if (MELODY_E1) |
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|
2654 T_MELODY_TASK melody0_task; |
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|
2655 T_MELODY_TASK melody1_task; |
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2656 #endif |
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|
2657 #if (VOICE_MEMO) |
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|
2658 T_VM_TASK voicememo_task; |
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2659 #endif |
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diff
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|
2660 #if (L1_VOICE_MEMO_AMR) |
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|
2661 T_VM_AMR_TASK voicememo_amr_task; |
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|
2662 #endif |
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|
2663 #if (SPEECH_RECO) |
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|
2664 T_SR_TASK speechreco_task; |
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|
2665 #endif |
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|
2666 #if (AEC) |
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|
2667 T_AEC_TASK aec_task; |
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|
2668 #endif |
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|
2669 #if (FIR) |
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|
2670 T_FIR_TASK fir_task; |
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|
2671 #endif |
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|
2672 #if (AUDIO_MODE) |
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|
2673 T_AUDIO_MODE_TASK audio_mode_task; |
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|
2674 #endif |
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|
2675 #if (MELODY_E2) |
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|
2676 T_MELODY_E2_TASK melody0_e2_task; |
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|
2677 T_MELODY_E2_TASK melody1_e2_task; |
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|
2678 #endif |
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diff
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|
2679 #if (L1_CPORT == 1) |
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parents:
diff
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|
2680 T_CPORT_TASK cport_task; |
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parents:
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|
2681 #endif |
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diff
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|
2682 #endif |
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|
2683 |
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|
2684 //+++++++++++++ |
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parents:
diff
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|
2685 // GTT task |
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parents:
diff
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|
2686 //+++++++++++++ |
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parents:
diff
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|
2687 |
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parents:
diff
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|
2688 #if (L1_GTT == 1) |
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parents:
diff
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|
2689 T_GTT_TASK gtt_task; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2690 #endif |
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diff
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|
2691 |
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parents:
diff
changeset
|
2692 // Dynamic DSP download task |
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parents:
diff
changeset
|
2693 #if (L1_DYN_DSP_DWNLD == 1) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2694 T_DYN_DWNLD_TASK_COMMAND dyn_dwnld_task; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2695 #endif |
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diff
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|
2696 |
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diff
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|
2697 } |
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parents:
diff
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|
2698 T_L1A_L1S_COM; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2699 |
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parents:
diff
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|
2700 /***************************************************************************************/ |
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diff
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|
2701 /* L1A -> DSP communication structure... */ |
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diff
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|
2702 /***************************************************************************************/ |
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diff
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|
2703 typedef struct |
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parents:
diff
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|
2704 { |
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diff
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|
2705 UWORD8 dsp_w_page; // Active page for ARM "writting" to DSP {0,1}. |
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diff
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|
2706 UWORD8 dsp_r_page; // Active page for ARM "reading" from DSP {0,1}. |
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diff
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|
2707 UWORD8 dsp_r_page_used; // Used in "l1_synch" to know if the read page must be chged. |
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|
2708 |
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parents:
diff
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|
2709 T_DB_DSP_TO_MCU *dsp_db_r_ptr; // MCU<->DSP comm. read page (Double Buffered comm. memory). |
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diff
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|
2710 T_DB_MCU_TO_DSP *dsp_db_w_ptr; // MCU<->DSP comm. write page (Double Buffered comm. memory). |
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parents:
diff
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|
2711 T_NDB_MCU_DSP *dsp_ndb_ptr; // MCU<->DSP comm. read/write (Non Double Buffered comm. memory). |
945cf7f506b2
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|
2712 |
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diff
changeset
|
2713 T_PARAM_MCU_DSP *dsp_param_ptr; // MCU<->DSP comm. read/write (Param comm. memory). |
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Mychaela Falconia <falcon@freecalypso.org>
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|
2714 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2715 #if (DSP_DEBUG_TRACE_ENABLE == 1) |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2716 T_DB2_DSP_TO_MCU *dsp_db2_current_r_ptr; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2717 T_DB2_DSP_TO_MCU *dsp_db2_other_r_ptr; |
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Mychaela Falconia <falcon@freecalypso.org>
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|
2718 #endif |
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diff
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|
2719 } |
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diff
changeset
|
2720 T_L1S_DSP_COM; |
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diff
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|
2721 |
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diff
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|
2722 /***************************************************************************************/ |
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|
2723 /* L1A -> TPU communication structure... */ |
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|
2724 /***************************************************************************************/ |
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|
2725 typedef struct |
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diff
changeset
|
2726 { |
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diff
changeset
|
2727 UWORD8 tpu_w_page; // Active page for ARM "writting" to TPU {0,1}. |
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|
2728 UWORD32 *tpu_page_ptr; // Current Pointer within the active "tpu_page". |
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diff
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|
2729 #if (CODE_VERSION == SIMULATION) |
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parents:
diff
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|
2730 T_reg_cmd *reg_cmd; // command register for TPU & DSP enabling and pages pgmation |
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Mychaela Falconia <falcon@freecalypso.org>
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|
2731 #else |
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diff
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|
2732 UWORD16 *reg_cmd; // command register for TPU & DSP enabling and pages pgmation |
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|
2733 #endif |
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diff
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|
2734 UWORD32 *reg_com_int; // communication int. register |
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diff
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|
2735 UWORD32 *offset; // offset register |
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diff
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|
2736 } |
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diff
changeset
|
2737 T_L1S_TPU_COM; |
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changeset
|
2738 |
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|
2739 /***************************************************************************************/ |
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diff
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|
2740 /* L1 configuration structure */ |
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|
2741 /***************************************************************************************/ |
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|
2742 |
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diff
changeset
|
2743 typedef struct |
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diff
changeset
|
2744 { |
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diff
changeset
|
2745 UWORD8 id; //standard identifier |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2746 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2747 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2748 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2749 UWORD16 radio_band_support; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2750 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2751 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2752 UWORD8 swap_iq_band1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2753 UWORD8 swap_iq_band2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2754 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2755 UWORD32 first_radio_freq; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2756 UWORD32 first_radio_freq_band2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2757 UWORD32 radio_freq_index_offset; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2758 UWORD32 nbmax_carrier; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2759 UWORD32 nbmeas; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2760 UWORD32 max_txpwr_band1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2761 UWORD32 max_txpwr_band2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2762 UWORD32 txpwr_turning_point; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2763 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2764 UWORD16 cal_freq1_band1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2765 UWORD16 cal_freq1_band2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2766 UWORD16 g_magic_band1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2767 UWORD16 g_magic_band2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2768 UWORD16 lna_att_band1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2769 UWORD16 lna_att_band2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2770 UWORD16 lna_switch_thr_low_band1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2771 UWORD16 lna_switch_thr_low_band2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2772 UWORD16 lna_switch_thr_high_band1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2773 UWORD16 lna_switch_thr_high_band2; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2774 } |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2775 T_L1_STD_CNFG; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2776 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2777 //RF dependent parameter definitions |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2778 typedef struct |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2779 { |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2780 UWORD16 rx_synth_setup_time; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2781 UWORD8 rx_synth_load_split; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2782 WORD16 rx_synth_start_time; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2783 WORD16 rx_change_offset_time; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2784 WORD16 rx_change_synchro_time; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2785 UWORD8 rx_tpu_scenario_ending; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2786 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2787 UWORD16 tx_synth_setup_time; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2788 UWORD8 tx_synth_load_split; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2789 WORD16 tx_synth_start_time; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2790 WORD16 tx_change_offset_time; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2791 WORD16 tx_nb_duration; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2792 WORD16 tx_ra_duration; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2793 UWORD8 tx_nb_load_split; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2794 UWORD8 tx_ra_load_split; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2795 UWORD8 tx_tpu_scenario_ending; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2796 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2797 WORD16 fb26_anchoring_time; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2798 WORD16 fb26_change_offset_time; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2799 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2800 UWORD32 prg_tx_gsm; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2801 UWORD32 prg_tx_dcs; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2802 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2803 UWORD16 low_agc_noise_thr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2804 UWORD16 high_agc_sat_thr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2805 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2806 UWORD16 low_agc; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2807 UWORD16 high_agc; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2808 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2809 UWORD16 il_min; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2810 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2811 UWORD16 fixed_txpwr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2812 WORD16 eeprom_afc; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2813 WORD8 setup_afc_and_rf; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2814 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2815 UWORD32 psi_sta_inv; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2816 UWORD32 psi_st; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2817 UWORD32 psi_st_32; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2818 UWORD32 psi_st_inv; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2819 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2820 #if (VCXO_ALGO==1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2821 WORD16 afc_dac_center; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2822 WORD16 afc_dac_min; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2823 WORD16 afc_dac_max; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2824 WORD16 afc_snr_thr; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2825 UWORD8 afc_algo; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2826 UWORD8 afc_win_avg_size_M; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2827 UWORD8 rgap_algo; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2828 UWORD8 rgap_bad_snr_count_B; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2829 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2830 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2831 UWORD8 guard_bits; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2832 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2833 #if DCO_ALGO |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2834 BOOL dco_enabled; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2835 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2836 |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2837 #if (ANLG_FAM == 1) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2838 UWORD16 debug1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2839 UWORD16 afcctladd; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2840 UWORD16 vbuctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2841 UWORD16 vbdctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2842 UWORD16 bbctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2843 UWORD16 apcoff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2844 UWORD16 bulioff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2845 UWORD16 bulqoff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2846 UWORD16 dai_onoff; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2847 UWORD16 auxdac; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2848 UWORD16 vbctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2849 UWORD16 apcdel1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2850 #endif |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2851 #if (ANLG_FAM == 2) |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2852 UWORD16 debug1; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2853 UWORD16 afcctladd; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2854 UWORD16 vbuctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2855 UWORD16 vbdctrl; |
945cf7f506b2
src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
2856 UWORD16 bbctrl; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2857 UWORD16 bulgcal; |
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src/cs: chipsetsw import from tcs211-fcmodem
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2858 UWORD16 apcoff; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2859 UWORD16 bulioff; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2860 UWORD16 bulqoff; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2861 UWORD16 dai_onoff; |
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diff
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|
2862 UWORD16 auxdac; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2863 UWORD16 vbctrl1; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2864 UWORD16 vbctrl2; |
945cf7f506b2
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2865 UWORD16 apcdel1; |
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diff
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|
2866 UWORD16 apcdel2; |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2867 #endif |
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diff
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|
2868 #if (ANLG_FAM == 3) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2869 UWORD16 debug1; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
2870 UWORD16 afcctladd; |
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parents:
diff
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|
2871 UWORD16 vbuctrl; |
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parents:
diff
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|
2872 UWORD16 vbdctrl; |
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diff
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|
2873 UWORD16 bbctrl; |
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|
2874 UWORD16 bulgcal; |
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|
2875 UWORD16 apcoff; |
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|
2876 UWORD16 bulioff; |
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diff
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|
2877 UWORD16 bulqoff; |
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diff
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|
2878 UWORD16 dai_onoff; |
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diff
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|
2879 UWORD16 auxdac; |
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diff
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|
2880 UWORD16 vbctrl1; |
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diff
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|
2881 UWORD16 vbctrl2; |
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diff
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|
2882 UWORD16 apcdel1; |
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diff
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|
2883 UWORD16 apcdel2; |
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diff
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|
2884 UWORD16 vbpop; |
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diff
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|
2885 UWORD16 vau_delay_init; |
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diff
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|
2886 UWORD16 vaud_cfg; |
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diff
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|
2887 UWORD16 vauo_onoff; |
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diff
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|
2888 UWORD16 vaus_vol; |
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diff
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|
2889 UWORD16 vaud_pll; |
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diff
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|
2890 #endif |
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diff
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|
2891 |
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diff
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|
2892 #if L1_GPRS |
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parents:
diff
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|
2893 UWORD16 toa_pm_thres; // PM threshold for TOA algorithm feeding in packet transfer mode |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2894 #endif |
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diff
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|
2895 } |
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diff
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|
2896 T_L1_PARAMS; |
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diff
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|
2897 |
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diff
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|
2898 typedef struct |
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|
2899 { |
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diff
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|
2900 T_L1_STD_CNFG std; //standard: GSM,GSM_E,GSM850,DCS,PCS,DUAL,DUALEXT |
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|
2901 UWORD8 pwr_mngt; //power management active |
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diff
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|
2902 UWORD8 tx_pwr_code; |
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diff
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|
2903 UWORD16 dwnld; |
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diff
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|
2904 T_L1_PARAMS params; |
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diff
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|
2905 double dpll; //dpll factor |
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|
2906 |
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|
2907 #if TESTMODE |
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|
2908 //Define the TestMode flag and TestMode parameters |
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|
2909 UWORD8 TestMode; |
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|
2910 |
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|
2911 UWORD8 agc_enable; |
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diff
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|
2912 UWORD8 afc_enable; |
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|
2913 UWORD8 adc_enable; |
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|
2914 |
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|
2915 T_TM_PARAMS tmode; //TestMode parameters structure |
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|
2916 #endif |
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|
2917 |
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|
2918 } |
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|
2919 T_L1_CONFIG; |
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|
2920 |
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2921 /***************************************************************************************/ |
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2922 /* API HISR -> L1A communication structure... Defined in case dynamic download is defined */ |
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|
2923 /***************************************************************************************/ |
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|
2924 /***************************************************************************************/ |
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|
2925 /* Global API HISR -Defined in case dynamic download is defined |
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|
2926 /***************************************************************************************/ |
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|
2927 |
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|
2928 |
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|
2929 #if(L1_DYN_DSP_DWNLD==1) |
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Mychaela Falconia <falcon@freecalypso.org>
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|
2930 typedef struct |
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|
2931 { |
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diff
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|
2932 T_L1A_DYN_DWNLD_HISR_COM dyn_dwnld; |
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Mychaela Falconia <falcon@freecalypso.org>
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|
2933 } T_L1A_API_HISR_COM; |
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|
2934 |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2935 typedef struct |
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|
2936 { |
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Mychaela Falconia <falcon@freecalypso.org>
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diff
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|
2937 T_L1_DYN_DWNLD_API_HISR dyn_dwnld; |
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Mychaela Falconia <falcon@freecalypso.org>
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|
2938 } T_L1_API_HISR; |
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|
2939 #endif |