FreeCalypso > hg > fc-magnetite
annotate cfg-headers/gprs/l1sw.cfg @ 635:baa0a02bc676
niq32.c DTR handling restored for targets that have it
TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample
and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a
fixed pull-down resistor on this GPIO line), and the code in niq32.c called
UAF_DTRInterruptHandler() (implemented in uartfax.c) from the
IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official
fw this GPIO is a floating input, all of the DTR handling code in uartfax.c
including the interrupt logic is still there, but the hobbled TCS211-20070608
semi-src delivery which OM got from TI contained a change in niq32.c (which
had been kept in FC until now) that removed the call to
UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test"
hacks.
The present change fixes this bug at a long last: if we are building fw for a
target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and
gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c,
whereas if we are building fw for a target that does not use this classic GPIO
arrangement, the code in niq32.c goes back to what we got from OM and all
DTR & DCD code in uartfax.c is conditioned out. This change also removes the
very last remaining bit of "CC test" bogosity from our FreeCalypso code base.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 19 Jan 2020 01:41:35 +0000 |
parents | fd8227e3047d |
children |
rev | line source |
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cfg-headers/2091: pdt_2091 config headers
Mychaela Falconia <falcon@freecalypso.org>
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1 #ifndef __L1SW_CFG__ |
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2 #define __L1SW_CFG__ |
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3 #define AMR 1 |
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4 #define CUST 0 |
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5 #define DCO_ALGO 0 |
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6 #define IDS 1 |
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Mychaela Falconia <falcon@freecalypso.org>
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7 #define L1_12NEIGH 1 |
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8 #define L1_EOTD 0 |
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Mychaela Falconia <falcon@freecalypso.org>
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9 #define L1_EOTD_QBIT_ACC 0 |
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Mychaela Falconia <falcon@freecalypso.org>
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10 #define L1_GPRS 1 |
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11 #define L1_GTT 0 |
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12 #define L1_MIDI 0 |
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13 #define L1_VOICE_MEMO_AMR 1 |
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14 #define MELODY_E2 1 |
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15 #define OP_L1_STANDALONE 0 |
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16 #define OP_RIV_AUDIO 1 |
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17 #define ORDER2_TX_TEMP_CAL 1 |
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18 #define RAZ_VULSWITCH_REGAUDIO 0 |
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19 #define SECURITY 0 |
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20 #define SPEECH_RECO 1 |
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21 #define TESTMODE 1 |
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22 #define TRACE_TYPE 4 |
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23 #define VCXO_ALGO 1 |
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24 #endif /* __L1SW_CFG__ */ |