FreeCalypso > hg > fc-magnetite
annotate components/l2r @ 635:baa0a02bc676
niq32.c DTR handling restored for targets that have it
TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample
and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a
fixed pull-down resistor on this GPIO line), and the code in niq32.c called
UAF_DTRInterruptHandler() (implemented in uartfax.c) from the
IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official
fw this GPIO is a floating input, all of the DTR handling code in uartfax.c
including the interrupt logic is still there, but the hobbled TCS211-20070608
semi-src delivery which OM got from TI contained a change in niq32.c (which
had been kept in FC until now) that removed the call to
UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test"
hacks.
The present change fixes this bug at a long last: if we are building fw for a
target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and
gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c,
whereas if we are building fw for a target that does not use this classic GPIO
arrangement, the code in niq32.c goes back to what we got from OM and all
DTR & DCD code in uartfax.c is conditioned out. This change also removes the
very last remaining bit of "CC test" bogosity from our FreeCalypso code base.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sun, 19 Jan 2020 01:41:35 +0000 |
parents | ad7f986afae3 |
children |
rev | line source |
---|---|
176 | 1 # Building l2r.lib from the TCS3.2 source |
2 | |
3 CFLAGS="-me -mt -o -pw2 -x -mw" | |
4 CPPFLAGS= | |
5 | |
6 make_version l2r | |
7 cfile_plain l2r_version.c | |
8 | |
9 # Defines | |
10 | |
11 CPPFLAGS=-DCCDTABLES_EXTERN | |
12 CPPFLAGS="$CPPFLAGS -DOPTION_MULTITHREAD" | |
13 CPPFLAGS="$CPPFLAGS -DNEW_FRAME" | |
14 CPPFLAGS="$CPPFLAGS -DNEW_ENTITY" | |
15 CPPFLAGS="$CPPFLAGS -D_TARGET_" | |
16 CPPFLAGS="$CPPFLAGS -DSHARED_VSI" | |
17 CPPFLAGS="$CPPFLAGS -DALR" | |
18 CPPFLAGS="$CPPFLAGS -DFF_HOMEZONE" | |
19 CPPFLAGS="$CPPFLAGS -DFF_MMI_SAT_ICON" | |
20 CPPFLAGS="$CPPFLAGS -DFF_MMI_SMS_DYNAMIC" | |
21 CPPFLAGS="$CPPFLAGS -DFF_CPHS" | |
22 CPPFLAGS="$CPPFLAGS -D_TMS470" | |
23 CPPFLAGS="$CPPFLAGS -DUART" | |
24 CPPFLAGS="$CPPFLAGS -DFF_ATI" | |
25 CPPFLAGS="$CPPFLAGS -DNWARN" | |
26 CPPFLAGS="$CPPFLAGS -DFF_EM_MODE" | |
27 CPPFLAGS="$CPPFLAGS -DPHONEBOOK_EXTENSION" | |
28 | |
29 if [ "$GPRS" = 1 ] | |
30 then | |
31 CPPFLAGS="$CPPFLAGS -DGPRS" | |
32 fi | |
33 | |
34 CPPFLAGS="$CPPFLAGS -DAT_INTERPRETER" | |
35 CPPFLAGS="$CPPFLAGS -DUSE_L1FD_FUNC_INTERFACE" | |
36 CPPFLAGS="$CPPFLAGS -DFAX_AND_DATA" | |
37 | |
38 if [ "$SRVC" = 1 ] | |
39 then | |
40 CPPFLAGS="$CPPFLAGS -DFF_FAX" | |
41 fi | |
42 | |
43 CPPFLAGS="$CPPFLAGS -DUSE_L2FD_FUNC_INTERFACE" | |
44 CPPFLAGS="$CPPFLAGS -DSRVC=$SRVC" | |
45 CPPFLAGS="$CPPFLAGS -DDTI2" | |
482
ad7f986afae3
pass -DCHIPSET and -DBOARD for all TCS3.2 components
Mychaela Falconia <falcon@freecalypso.org>
parents:
176
diff
changeset
|
46 CPPFLAGS="$CPPFLAGS -DCHIPSET=$CHIPSET" |
ad7f986afae3
pass -DCHIPSET and -DBOARD for all TCS3.2 components
Mychaela Falconia <falcon@freecalypso.org>
parents:
176
diff
changeset
|
47 CPPFLAGS="$CPPFLAGS -DBOARD=41" |
176 | 48 |
49 # Includes | |
50 | |
51 SRCDIR=$SRC/g23m-fad/l2r | |
52 | |
53 CPPFLAGS="$CPPFLAGS -I$SRC/$CONDAT/com/inc" | |
54 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc" | |
55 CPPFLAGS="$CPPFLAGS -I$SRC/$CONDAT/com/include" | |
56 CPPFLAGS="$CPPFLAGS -I../../$CDGINC" | |
57 CPPFLAGS="$CPPFLAGS -I$SRCDIR" | |
58 CPPFLAGS="$CPPFLAGS -I.." | |
59 CPPFLAGS="$CPPFLAGS -I../config" | |
60 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera" | |
61 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app" | |
62 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core" | |
63 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb" | |
64 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio" | |
65 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm" | |
66 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf" | |
67 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma" | |
68 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld" | |
69 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth" | |
70 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif" | |
71 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea" | |
72 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security" | |
73 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi" | |
74 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer" | |
75 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart" | |
76 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd" | |
77 CPPFLAGS="$CPPFLAGS -I$SRC/cs/system" | |
78 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/include" | |
79 CPPFLAGS="$CPPFLAGS -I$SRC/cs/services" | |
80 | |
81 # Source modules | |
82 | |
83 cfile_str2ind $SRCDIR/l2r_dnf.c | |
84 cfile_str2ind $SRCDIR/l2r_dnp.c | |
85 cfile_str2ind $SRCDIR/l2r_dns.c | |
86 cfile_str2ind $SRCDIR/l2r_mgtf.c | |
87 cfile_str2ind $SRCDIR/l2r_mgtp.c | |
88 cfile_str2ind $SRCDIR/l2r_mgts.c | |
89 cfile_str2ind $SRCDIR/l2r_pei.c | |
90 cfile_str2ind $SRCDIR/l2r_ups.c | |
91 cfile_str2ind $SRCDIR/l2r_tim.c | |
92 cfile_str2ind $SRCDIR/l2r_upf.c | |
93 cfile_str2ind $SRCDIR/l2r_upp.c | |
94 cfile_str2ind $SRCDIR/tra_mgts.c | |
95 cfile_str2ind $SRCDIR/tra_mgtf.c | |
96 cfile_str2ind $SRCDIR/tra_mgtp.c | |
97 cfile_str2ind $SRCDIR/tra_dns.c | |
98 cfile_str2ind $SRCDIR/tra_dnf.c | |
99 cfile_str2ind $SRCDIR/tra_dnp.c | |
100 cfile_str2ind $SRCDIR/tra_ups.c | |
101 cfile_str2ind $SRCDIR/tra_upf.c | |
102 cfile_str2ind $SRCDIR/tra_upp.c |