FreeCalypso > hg > fc-magnetite
annotate components/ppp_ir @ 635:baa0a02bc676
niq32.c DTR handling restored for targets that have it
TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample
and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a
fixed pull-down resistor on this GPIO line), and the code in niq32.c called
UAF_DTRInterruptHandler() (implemented in uartfax.c) from the
IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official
fw this GPIO is a floating input, all of the DTR handling code in uartfax.c
including the interrupt logic is still there, but the hobbled TCS211-20070608
semi-src delivery which OM got from TI contained a change in niq32.c (which
had been kept in FC until now) that removed the call to
UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test"
hacks.
The present change fixes this bug at a long last: if we are building fw for a
target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and
gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c,
whereas if we are building fw for a target that does not use this classic GPIO
arrangement, the code in niq32.c goes back to what we got from OM and all
DTR & DCD code in uartfax.c is conditioned out. This change also removes the
very last remaining bit of "CC test" bogosity from our FreeCalypso code base.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sun, 19 Jan 2020 01:41:35 +0000 |
parents | ad7f986afae3 |
children |
rev | line source |
---|---|
182 | 1 # Building ppp_ir.lib from the TCS3.2 source |
2 | |
3 CFLAGS="-me -mt -o -pw2 -x -mw" | |
4 | |
5 # Defines | |
6 | |
7 CPPFLAGS=-DCCDTABLES_EXTERN | |
8 CPPFLAGS="$CPPFLAGS -DOPTION_MULTITHREAD" | |
9 CPPFLAGS="$CPPFLAGS -DNEW_FRAME" | |
10 CPPFLAGS="$CPPFLAGS -DNEW_ENTITY" | |
11 CPPFLAGS="$CPPFLAGS -D_TARGET_" | |
12 CPPFLAGS="$CPPFLAGS -DSHARED_VSI" | |
13 CPPFLAGS="$CPPFLAGS -DALR" | |
14 CPPFLAGS="$CPPFLAGS -DFF_HOMEZONE" | |
15 CPPFLAGS="$CPPFLAGS -DFF_MMI_SAT_ICON" | |
16 CPPFLAGS="$CPPFLAGS -DFF_MMI_SMS_DYNAMIC" | |
17 CPPFLAGS="$CPPFLAGS -DFF_CPHS" | |
18 CPPFLAGS="$CPPFLAGS -D_TMS470" | |
19 CPPFLAGS="$CPPFLAGS -DUART" | |
20 CPPFLAGS="$CPPFLAGS -DFF_ATI" | |
21 CPPFLAGS="$CPPFLAGS -DNWARN" | |
22 CPPFLAGS="$CPPFLAGS -DFF_EM_MODE" | |
23 CPPFLAGS="$CPPFLAGS -DPHONEBOOK_EXTENSION" | |
24 | |
25 if [ "$GPRS" = 1 ] | |
26 then | |
27 CPPFLAGS="$CPPFLAGS -DGPRS" | |
28 fi | |
29 | |
30 CPPFLAGS="$CPPFLAGS -DAT_INTERPRETER" | |
31 CPPFLAGS="$CPPFLAGS -DUSE_L1FD_FUNC_INTERFACE" | |
32 | |
33 if [ "$SRVC" != 0 ] | |
34 then | |
35 CPPFLAGS="$CPPFLAGS -DFAX_AND_DATA" | |
36 if [ "$SRVC" = 1 ] | |
37 then | |
38 CPPFLAGS="$CPPFLAGS -DFF_FAX" | |
39 fi | |
40 CPPFLAGS="$CPPFLAGS -DUSE_L2FD_FUNC_INTERFACE" | |
41 fi | |
42 | |
43 CPPFLAGS="$CPPFLAGS -DSRVC=$SRVC" | |
44 CPPFLAGS="$CPPFLAGS -DDTI2" | |
45 CPPFLAGS="$CPPFLAGS -DDTILIB" | |
46 CPPFLAGS="$CPPFLAGS -DPPP_INT_RAM" | |
482
ad7f986afae3
pass -DCHIPSET and -DBOARD for all TCS3.2 components
Mychaela Falconia <falcon@freecalypso.org>
parents:
182
diff
changeset
|
47 CPPFLAGS="$CPPFLAGS -DCHIPSET=$CHIPSET" |
ad7f986afae3
pass -DCHIPSET and -DBOARD for all TCS3.2 components
Mychaela Falconia <falcon@freecalypso.org>
parents:
182
diff
changeset
|
48 CPPFLAGS="$CPPFLAGS -DBOARD=41" |
182 | 49 |
50 # Includes | |
51 | |
52 SRCDIR=$SRC/g23m-fad/ppp | |
53 | |
54 CPPFLAGS="$CPPFLAGS -I$SRC/$CONDAT/com/inc" | |
55 CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc" | |
56 CPPFLAGS="$CPPFLAGS -I$SRC/$CONDAT/com/include" | |
57 CPPFLAGS="$CPPFLAGS -I../../$CDGINC" | |
58 CPPFLAGS="$CPPFLAGS -I$SRCDIR" | |
59 CPPFLAGS="$CPPFLAGS -I../../$CDGPRIM" | |
60 CPPFLAGS="$CPPFLAGS -I.." | |
61 CPPFLAGS="$CPPFLAGS -I../config" | |
62 | |
63 # Source modules | |
64 | |
65 cfile_str2ind $SRCDIR/ppp_frxf.c | |
66 cfile_str2ind $SRCDIR/ppp_ftxf.c | |
67 cfile_str2ind $SRCDIR/ppp_tbls.c |