FreeCalypso > hg > fc-magnetite
annotate src/g23m-gprs/cci/cci_fbsf.c @ 585:c3377f023e7a
l1_rf12.c: corrected Tx ramp templates for Mot C11x/12x and C155/156 targets
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 10 Mar 2019 02:32:14 +0000 (2019-03-10) |
parents | 219afcfc6250 |
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rev | line source |
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1 /* |
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2 +----------------------------------------------------------------------------- |
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3 | Project : |
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4 | Modul : cci_fbsf.c |
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5 +----------------------------------------------------------------------------- |
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6 | Copyright 2002 Texas Instruments Berlin, AG |
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7 | All rights reserved. |
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8 | |
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9 | This file is confidential and a trade secret of Texas |
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10 | Instruments Berlin, AG |
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11 | The receipt of or possession of this file does not convey |
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12 | any rights to reproduce or disclose its contents or to |
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13 | manufacture, use, or sell anything it may describe, in |
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14 | whole, or in part, without the specific written consent of |
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15 | Texas Instruments Berlin, AG. |
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16 +----------------------------------------------------------------------------- |
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17 | Purpose : This module implements local functions for service FBS of |
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18 | entity CCI. |
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19 +----------------------------------------------------------------------------- |
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20 */ |
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21 |
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22 |
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23 #define CCI_FBSF_C |
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24 |
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25 #define ENTITY_LLC |
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26 |
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27 /*==== INCLUDES =============================================================*/ |
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28 #include <string.h> |
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29 |
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30 #include "typedefs.h" /* to get Condat data types */ |
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31 #include "vsi.h" /* to get a lot of macros */ |
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32 #include "macdef.h" |
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33 #include "gprs.h" |
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34 #include "gsm.h" /* to get a lot of macros */ |
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35 #include "cnf_llc.h" /* to get cnf-definitions */ |
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36 #include "mon_llc.h" /* to get mon-definitions */ |
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37 #include "prim.h" /* to get the definitions of used SAP and directions */ |
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38 #include "cci.h" /* to get the global entity definitions */ |
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39 #include "llc.h" /* to get the global entity definitions */ |
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40 |
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41 #include "cci_fbsf.h" |
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42 #include "llc_txp.h" |
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43 #include "llc_rxp.h" |
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44 |
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45 #ifndef TI_PS_OP_CIPH_DRIVER |
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46 |
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47 #ifdef _GEA_SIMULATION_ |
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48 #include "cci_hw_sim.h" |
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49 #endif |
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50 |
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51 #if !defined(_GEA_SIMULATION_) && !defined(LL_2to1) |
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52 #include "config/chipset.cfg" |
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53 #if (CHIPSET == 12) || (CHIPSET == 14) |
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54 #include "cci_gea_start.h" |
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55 #endif /* CHIPSET */ |
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56 #endif /* ! _GEA_SIMULATION_ && !LL_2to1 */ |
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57 |
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58 /* local buffer for the copy of ciphering key */ |
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59 static USHORT tmp_key[4]; |
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60 |
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61 |
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62 |
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63 /*==== CONST ================================================================*/ |
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64 |
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65 /*==== LOCAL VARS ===========================================================*/ |
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66 #ifdef _GEA_SIMULATION_ |
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67 USHORT* hw_reg = NULL; |
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68 #endif |
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69 |
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70 /*==== LOCAL FUNCTION ===========================================================*/ |
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71 |
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72 LOCAL void ciph_get_result (T_CIPH_out_data *out_data, U8 *status); |
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73 LOCAL void ciph_init (void); |
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74 LOCAL void ciph_reset_hw (void); |
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75 LOCAL UBYTE ciph_fcs_check (UBYTE *fcs_start); |
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76 LOCAL void ciph_get_ciphered_data (T_CIPH_out_data *out_data); |
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77 LOCAL void ciph_get_deciphered_data (T_CIPH_out_data *out_data, U8 *status); |
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78 LOCAL void ciph_fill_ul_reg (T_CIPH_cipher_req_parms *cipher_req_parms, |
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79 T_CIPH_in_data_list *in_data_list); |
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80 LOCAL void ciph_fill_dl_reg (T_CIPH_cipher_req_parms *cipher_req_parms, |
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81 T_CIPH_in_data_list *in_data_list); |
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82 |
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83 /*==== PRIVATE FUNCTIONS ====================================================*/ |
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84 |
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85 #ifdef LLC_TRACE_GEA_PARAM |
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86 LOCAL void cci_trace_gea_param( void ); |
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87 #endif |
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88 |
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89 /*==== PUBLIC FUNCTIONS =====================================================*/ |
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90 |
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91 /* |
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92 +------------------------------------------------------------------------------ |
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93 | Function : ciph_cipher_req_sim |
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94 +------------------------------------------------------------------------------ |
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95 | Description : Handles the primitive ciph_cipher_req. It is used to request |
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96 | ciphering or deciphering of a LLC PDU. |
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97 | |
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98 | Parameters : |
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99 | |
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100 +------------------------------------------------------------------------------ |
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101 */ |
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102 GLOBAL void ciph_cipher_req_sim (T_CIPH_cipher_req_parms *cipher_req_parms_ptr, |
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103 T_CIPH_in_data_list *in_data_ptr, |
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104 T_CIPH_out_data *out_data_ptr, |
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105 U8 *status) { |
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106 |
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107 USHORT volatile *cntl = cci_data->fbs.cntl_reg; |
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108 int i = 0; |
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109 ULONG cnt = 0; |
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110 |
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111 |
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112 TRACE_FUNCTION( "ciph_cipher_req" ); |
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113 |
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114 /* reset GEA (enables and then disables clock) */ |
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115 ciph_reset_hw(); |
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116 |
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117 *cntl |= CL_ENABLE; |
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118 |
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119 /* fill UL or DL configuration and data registers */ |
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120 |
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121 if (cci_data->fbs.ciph_params.direction == CIPH_UPLINK_DIR) { |
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122 ciph_fill_ul_reg (cipher_req_parms_ptr, in_data_ptr ); |
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123 #ifdef LL_2to1 |
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124 *cntl = (*cntl & UL_DL_UP) | START; |
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125 #else /* LL_2to1 */ |
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126 #if (CHIPSET == 12) || (CHIPSET == 14) |
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127 /* GEA work-around */ |
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128 *cntl = (*cntl & UL_DL_UP); |
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129 gea_start(); |
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130 #else |
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131 *cntl = (*cntl & UL_DL_UP) | START; |
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132 #endif |
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133 #endif /* LL_2to1 */ |
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134 } else { |
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135 ciph_fill_dl_reg (cipher_req_parms_ptr, in_data_ptr ); |
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136 #ifdef LL_2to1 |
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137 *cntl |= (UL_DL_DOWN | START); |
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138 #else /* LL_2to1 */ |
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139 #if (CHIPSET == 12) || (CHIPSET == 14) |
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140 /* GEA work-around */ |
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141 *cntl |= (UL_DL_DOWN); |
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142 gea_start(); |
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143 #else |
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144 *cntl |= (UL_DL_DOWN | START); |
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145 #endif |
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146 #endif /* LL_2to1 */ |
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147 } |
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148 |
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149 out_data_ptr->len = 0; |
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150 for (i = 0; i < in_data_ptr->c_in_data; i++) { |
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151 out_data_ptr->len += in_data_ptr->ptr_in_data[i].len; |
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152 } |
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153 |
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154 if (cci_data->fbs.ciph_params.direction == CIPH_DOWNLINK_DIR) { |
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155 out_data_ptr->len -= FCS_SIZE; |
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156 } else { |
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157 out_data_ptr->len += FCS_SIZE; |
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158 } |
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159 |
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160 |
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161 #ifdef _GEA_SIMULATION_ |
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162 if (cci_data->fbs.ciph_params.direction == CIPH_UPLINK_DIR) { |
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163 ciph_hw_sim_cipher(out_data_ptr->len); |
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164 } else { |
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165 ciph_hw_sim_decipher(); |
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166 } |
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167 #endif |
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168 |
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169 /* poll until data is processed */ |
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170 if(cci_data->fbs.cci_info_trace){ |
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171 while (*(cci_data->fbs.status_reg) & CHECK_WORKING){ |
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172 cnt += 1; |
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173 }; |
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174 TRACE_EVENT_P1("INFO CCI: ciphering completed, counter: %d", cnt); |
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175 } else { |
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176 while (*(cci_data->fbs.status_reg) & CHECK_WORKING){ }; |
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177 } |
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178 |
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179 /* verify ciphering key, whether it has been corrupted */ |
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180 if(cci_data->fbs.cci_info_trace){ |
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181 if(*cci_data->fbs.kc_reg1 != tmp_key[0] || |
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182 *cci_data->fbs.kc_reg2 != tmp_key[1] || |
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183 *cci_data->fbs.kc_reg3 != tmp_key[2] || |
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184 *cci_data->fbs.kc_reg4 != tmp_key[3]) |
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185 { |
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186 TRACE_ERROR("CCI ERROR: Ciphering key has been corrupted!!"); |
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187 TRACE_EVENT_P4("CCI: original key: %04x %04x %04x %04x %04x %04x", |
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188 tmp_key[0], tmp_key[1], tmp_key[2], tmp_key[3]); |
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189 TRACE_EVENT_P4("CCI: kc key: %04x %04x %04x %04x %04x %04x", |
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190 *cci_data->fbs.kc_reg1, *cci_data->fbs.kc_reg2, |
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191 *cci_data->fbs.kc_reg3, *cci_data->fbs.kc_reg4); |
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192 } |
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193 } |
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194 |
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195 /* and finally handle the result */ |
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196 ciph_get_result(out_data_ptr, status); |
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197 |
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198 /* disable clock until new frames are to process */ |
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199 *cntl &= CL_DISABLE; |
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200 |
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201 } |
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202 |
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203 |
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204 /* |
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205 +------------------------------------------------------------------------------ |
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206 | Function : ciph_init_cipher_req_sim |
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207 +------------------------------------------------------------------------------ |
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208 | Description : Handles the primitive ciph_init_cipher_req_sim. |
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209 | |
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210 | Parameters : |
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211 | |
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212 +------------------------------------------------------------------------------ |
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213 */ |
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214 GLOBAL void ciph_init_cipher_req_sim (T_CIPH_init_cipher_req_parms *init_cipher_req_parms_ptr, |
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215 void (*read_data) (void)) |
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216 { |
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217 if (!cci_data->fbs.initialized){ |
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218 ciph_init(); |
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219 cci_data->fbs.initialized = TRUE; |
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220 } |
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221 cci_data->fbs.ciph_params = *init_cipher_req_parms_ptr; |
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222 } |
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223 |
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224 /* |
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225 +------------------------------------------------------------------------------ |
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226 | Function : ciph_get_result |
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227 +------------------------------------------------------------------------------ |
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228 | Description : Handles the function ciph_get_result. This function gets the |
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229 | ciphered data in uplink direction or deciphered data in |
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230 | downlink direction |
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231 | |
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232 | Parameters : |
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233 +------------------------------------------------------------------------------ |
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234 */ |
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235 LOCAL void ciph_get_result (T_CIPH_out_data *out_data, U8 *status) |
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236 { |
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237 TRACE_FUNCTION( "ciph_get_result" ); |
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238 |
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239 switch(cci_data->fbs.ciph_params.direction) |
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240 { |
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241 case CIPH_UPLINK_DIR: |
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242 if( *(cci_data->fbs.status_reg) & CHECK_WORKING ) |
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243 { |
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244 break; |
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245 } |
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246 else |
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247 { |
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248 ciph_get_ciphered_data (out_data); |
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249 } |
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250 break; |
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251 |
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252 case CIPH_DOWNLINK_DIR: |
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253 if( *(cci_data->fbs.status_reg) & CHECK_WORKING ) |
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254 { |
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255 break; |
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256 } |
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257 else |
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258 { |
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259 ciph_get_deciphered_data (out_data, status); |
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260 } |
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261 break; |
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262 |
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263 default: |
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264 TRACE_ERROR( "TIMER unexpected" ); |
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265 break; |
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266 } |
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267 |
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268 } /* ciph_get_result() */ |
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269 |
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270 |
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271 /* |
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272 +------------------------------------------------------------------------------ |
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273 | Function : ciph_init |
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274 +------------------------------------------------------------------------------ |
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275 | Description : The function ciph_init() initializes the registers. |
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276 | |
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277 | Parameters : |
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278 | |
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279 +------------------------------------------------------------------------------ |
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280 */ |
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281 LOCAL void ciph_init ( void ) |
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282 { |
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283 USHORT *reg; |
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284 |
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285 TRACE_FUNCTION( "ciph_init" ); |
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286 |
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287 |
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288 #ifdef _GEA_SIMULATION_ |
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289 |
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290 TRACE_EVENT ("GEA simulation is used"); |
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291 |
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292 /* |
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293 * initialization of registers - do it only once to handle restart of CCI |
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294 * 'hw_req' points to a set of 16 bit registers |
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295 * 'fbs.simulated_reg_buffer' points to a 1596 bytes buffer for data |
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296 */ |
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297 if (hw_reg == NULL) |
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298 { |
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299 MALLOC(hw_reg, sizeof(USHORT) * 26+1 ); |
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300 } |
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301 memset(hw_reg, 0, sizeof(USHORT) * 26+1); |
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302 |
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303 if (cci_data->fbs.simulated_reg_buffer == NULL) |
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304 { |
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305 MALLOC(cci_data->fbs.simulated_reg_buffer, 1596); |
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306 } |
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307 memset(cci_data->fbs.simulated_reg_buffer, 0, 1596); |
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308 |
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309 reg = &hw_reg[0]; |
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310 |
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311 #else |
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312 |
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313 TRACE_EVENT ("GEA hardware is used"); |
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314 |
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315 reg = (USHORT *)START_ADRESS; |
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316 |
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317 #endif |
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318 |
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319 #if (BOARD == 61 OR BOARD == 71) /* G-Sample or I-Sample*/ |
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320 |
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321 /* 01 */ cci_data->fbs.cntl_reg = reg++; /* 00 */ |
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322 /* 02 */ cci_data->fbs.status_reg = reg++; /* 02 */ |
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323 /* 03 */ cci_data->fbs.status_irq_reg= reg++; /* 04 */ |
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324 |
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325 /* 04 */ cci_data->fbs.conf_ul_reg1 = reg++; /* 06 */ |
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326 /* 05 */ cci_data->fbs.conf_ul_reg2 = reg++; /* 08 */ |
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327 /* 06 */ cci_data->fbs.conf_ul_reg3 = reg++; /* 0A */ |
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328 /* 07 */ cci_data->fbs.conf_ul_reg4 = reg++; /* 0C */ |
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329 /* 08 */ cci_data->fbs.conf_ul_reg5 = reg++; /* 0E */ |
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330 |
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331 /* 09 */ cci_data->fbs.conf_dl_reg1 = reg++; /* 10 */ |
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332 /* 10 */ cci_data->fbs.conf_dl_reg2 = reg++; /* 12 */ |
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333 /* 11 */ cci_data->fbs.conf_dl_reg3 = reg++; /* 14 */ |
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334 /* 12 */ cci_data->fbs.conf_dl_reg4 = reg++; /* 16 */ |
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335 /* 13 */ cci_data->fbs.conf_dl_reg5 = reg++; /* 18 */ |
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336 |
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337 /* 14 */ cci_data->fbs.kc_reg1 = reg++; /* 1A */ |
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338 /* 15 */ cci_data->fbs.kc_reg2 = reg++; /* 1C */ |
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339 /* 16 */ cci_data->fbs.kc_reg3 = reg++; /* 1E */ |
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340 /* 17 */ cci_data->fbs.kc_reg4 = reg++; /* 20 */ |
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341 |
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342 /* 22 */ reg++; /* 22 */ |
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343 /* 22 */ reg++; /* 24 */ |
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344 /* 22 */ reg++; /* 26 */ |
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345 /* 22 */ reg++; /* 28 */ |
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346 |
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347 /* 18 */ cci_data->fbs.fcs_ul_reg1 = reg++; /* 2A */ |
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348 /* 19 */ cci_data->fbs.fcs_ul_reg2 = reg++; /* 2C */ |
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349 |
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350 /* 20 */ cci_data->fbs.fcs_dl_reg1 = reg++; /* 2E */ |
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351 /* 21 */ cci_data->fbs.fcs_dl_reg2 = reg++; /* 30 */ |
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352 |
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353 /* 22 */ cci_data->fbs.switch_reg = reg++; /* 32 */ |
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354 |
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355 /* 25 */ cci_data->fbs.data16_reg = reg++; /* 34 */ |
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356 /* 26 */ cci_data->fbs.data8_reg = (UBYTE*)reg; /* 36 */ |
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357 |
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358 *cci_data->fbs.switch_reg = 0; |
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359 |
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360 #else |
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361 |
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362 /* 01 */ cci_data->fbs.cntl_reg = reg++; /* 00 */ |
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363 /* 02 */ cci_data->fbs.status_reg = reg++; /* 02 */ |
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364 /* 03 */ cci_data->fbs.status_irq_reg= reg++; /* 04 */ |
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365 |
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366 /* 04 */ cci_data->fbs.conf_ul_reg1 = reg++; /* 06 */ |
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367 /* 05 */ cci_data->fbs.conf_ul_reg2 = reg++; /* 08 */ |
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368 /* 06 */ cci_data->fbs.conf_ul_reg3 = reg++; /* 0A */ |
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369 /* 07 */ cci_data->fbs.conf_ul_reg4 = reg++; /* 0C */ |
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370 /* 08 */ cci_data->fbs.conf_ul_reg5 = reg++; /* 0E */ |
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371 |
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372 /* 09 */ cci_data->fbs.conf_dl_reg1 = reg++; /* 10 */ |
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373 /* 10 */ cci_data->fbs.conf_dl_reg2 = reg++; /* 12 */ |
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374 /* 11 */ cci_data->fbs.conf_dl_reg3 = reg++; /* 14 */ |
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375 /* 12 */ cci_data->fbs.conf_dl_reg4 = reg++; /* 16 */ |
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376 /* 13 */ cci_data->fbs.conf_dl_reg5 = reg++; /* 18 */ |
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377 |
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378 /* 14 */ cci_data->fbs.kc_reg1 = reg++; /* 1A */ |
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379 /* 15 */ cci_data->fbs.kc_reg2 = reg++; /* 1C */ |
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380 /* 16 */ cci_data->fbs.kc_reg3 = reg++; /* 1E */ |
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381 /* 17 */ cci_data->fbs.kc_reg4 = reg++; /* 20 */ |
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382 |
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383 /* 18 */ cci_data->fbs.fcs_ul_reg1 = reg++; /* 22 */ |
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384 /* 19 */ cci_data->fbs.fcs_ul_reg2 = reg++; /* 24 */ |
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385 |
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386 /* 20 */ cci_data->fbs.fcs_dl_reg1 = reg++; /* 26 */ |
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387 /* 21 */ cci_data->fbs.fcs_dl_reg2 = reg++; /* 28 */ |
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388 |
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389 /* 22 */ reg++; /* 2A */ |
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390 /* 23 */ reg++; /* 2C */ |
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391 /* 24 */ reg++; /* 2E */ |
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392 |
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393 /* 25 */ cci_data->fbs.data16_reg = reg++; /* 30 */ |
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394 /* 26 */ cci_data->fbs.data8_reg = (UBYTE*)reg; /* 32 */ |
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395 #endif /* Board 61 or 71*/ |
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396 |
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397 #ifdef _GEA_SIMULATION_ |
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398 cci_data->fbs.simulated_reg = cci_data->fbs.simulated_reg_buffer; |
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399 #endif |
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400 |
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401 #ifndef _GEA_SIMULATION_ |
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402 TRACE_EVENT ("Received FCS will be verified"); |
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403 #endif |
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404 |
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405 /* finaly reset the HW */ |
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406 ciph_reset_hw(); |
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407 |
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408 /* initialize flag for CCI info trace */ |
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409 cci_data->fbs.cci_info_trace = FALSE; |
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410 /* initialize freed partition counter */ |
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411 cci_data->fbs.cci_freed_partition = 0; |
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|
412 |
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413 } /* ciph_init() */ |
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414 |
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415 |
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416 /* |
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417 +------------------------------------------------------------------------------ |
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418 | Function : ciph_reset_hw |
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419 +------------------------------------------------------------------------------ |
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420 | Description : Resets the hardware |
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421 | |
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422 +------------------------------------------------------------------------------ |
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423 */ |
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424 LOCAL void ciph_reset_hw ( void ) |
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425 { |
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426 USHORT volatile *cntl = cci_data->fbs.cntl_reg; |
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427 |
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428 TRACE_FUNCTION( "ciph_reset_hw" ); |
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429 |
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430 /* making the clock enable */ |
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431 *cntl |= CL_ENABLE; |
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432 |
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433 /* start reset in both directions and disable interrupt */ |
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434 *cntl &= ~(RESET_UL | RESET_DL | IT_ENABLE); |
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435 |
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436 #ifdef _GEA_SIMULATION_ |
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437 |
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438 *cci_data->fbs.status_reg &= NOT_WORKING; |
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439 |
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440 /* simulate reset complete */ |
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441 *cntl |= RESET_UL; |
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442 *cntl |= RESET_DL; |
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443 |
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444 #endif |
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445 |
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446 /* wait until reset is ready (both bits back high) */ |
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447 while ((*cntl & (RESET_UL|RESET_DL)) != (RESET_UL|RESET_DL)) |
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448 ; |
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449 |
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450 /* disable clock until new frames are to process */ |
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451 *cntl &= CL_DISABLE; |
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452 |
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453 } /* ciph_reset_hw() */ |
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454 |
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455 /* |
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456 +------------------------------------------------------------------------------ |
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457 | Function : ciph_fcs_check |
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458 +------------------------------------------------------------------------------ |
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459 | Description : The function compares the 3 bytes FCS for downlink direction |
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460 | |
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461 | Parameters : *fcs_start - pointer to beginning of fcs field |
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462 | |
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463 | Returns : CCI_FCS_PASSED - if equal |
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464 | CCI_FCS_FAILED - if NOT equal |
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465 +------------------------------------------------------------------------------ |
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466 */ |
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467 LOCAL UBYTE ciph_fcs_check (UBYTE* fcs_start) |
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468 { |
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469 TRACE_FUNCTION( "ciph_fcs_check" ); |
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470 |
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471 #ifdef _CHECK_RECEIVED_FCS_ |
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472 #ifdef _GEA_SIMULATION_ |
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473 /* |
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474 * Compare FCS, taking byte ordering of FCS registers into account (Intel |
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475 * format: high-/lowbyte swaped) |
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476 */ |
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477 if (* fcs_start == (UBYTE) (*cci_data->fbs.fcs_dl_reg1 & 0x00FF) && |
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478 *(fcs_start+1) == (UBYTE)((*cci_data->fbs.fcs_dl_reg1 & 0xFF00) >> 8) && |
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479 *(fcs_start+2) == (UBYTE) (*cci_data->fbs.fcs_dl_reg2 & 0x00FF) ) |
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480 { |
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|
481 /* clear bit to indicate FCS is ok */ |
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482 *cci_data->fbs.status_reg &= ~(FCS_FALSE_BIT); |
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483 } |
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484 else |
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|
485 { |
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486 /* set bit to indicate FCS is false */ |
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487 *cci_data->fbs.status_reg |= FCS_FALSE_BIT; |
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488 } |
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|
489 |
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490 /* |
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491 * Check, if FCS false bit is set |
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492 */ |
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493 if (*cci_data->fbs.status_reg & FCS_FALSE_BIT) |
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|
494 { |
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|
495 TRACE_EVENT("Info: Received FCS is wrong"); |
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496 return CIPH_FCS_ERROR; |
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497 } |
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498 #endif /* _GEA_SIMULATION_ */ |
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499 #endif /* _CHECK_RECEIVED_FCS_ */ |
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|
500 |
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501 |
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502 #ifndef _GEA_SIMULATION_ |
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503 /* |
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504 * Check, if FCS false bit is set |
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505 */ |
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506 if (*cci_data->fbs.status_reg & FCS_FALSE_BIT) |
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507 { |
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508 TRACE_0_INFO("Received FCS is wrong"); |
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509 return CIPH_FCS_ERROR; |
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510 } |
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511 #endif /* _GEA_SIMULATION_ */ |
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512 |
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513 return CIPH_CIPH_PASS; |
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514 |
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515 } /* ciph_fcs_check() */ |
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|
516 |
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|
517 |
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518 /* |
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519 +------------------------------------------------------------------------------ |
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520 | Function : ciph_get_ciphered_data |
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521 +------------------------------------------------------------------------------ |
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522 | Description : The function ciph_get_ciphered_data() copies the result of the ciphered |
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523 | data to destination buffer. |
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524 | |
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525 | Parameters : |
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526 | |
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527 +------------------------------------------------------------------------------ |
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528 */ |
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529 LOCAL void ciph_get_ciphered_data (T_CIPH_out_data *out_data) |
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530 { |
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531 int frame16, |
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532 frame8, |
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533 i; |
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534 USHORT *sdu_data16; |
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535 UBYTE *sdu_data8; |
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536 |
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537 TRACE_FUNCTION( "ciph_get_ciphered_data" ); |
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538 |
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539 i = out_data->len - FCS_SIZE; |
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540 |
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541 frame16 = i / 2; |
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542 frame8 = i % 2; |
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543 |
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544 #ifdef _GEA_SIMULATION_ |
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545 cci_data->fbs.simulated_reg = cci_data->fbs.simulated_reg_buffer; |
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546 #endif /* _GEA_SIMULATION_ */ |
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547 |
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548 sdu_data16 = (USHORT*)out_data->buf; |
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549 |
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550 #if (BOARD == 61 OR BOARD == 71) /* G-Sample or I-Sample */ |
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551 *cci_data->fbs.switch_reg = 1; |
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552 |
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553 #ifdef LLC_TRACE_GEA_PARAM |
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554 cci_trace_gea_param(); |
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555 #endif |
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|
556 |
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|
557 #endif |
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558 |
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559 for (i=0; i<frame16; i++) |
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560 { |
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561 |
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562 #ifdef _GEA_SIMULATION_ |
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563 ciph_reg16_read_sim(); |
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564 #endif |
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565 |
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566 *sdu_data16 = *cci_data->fbs.data16_reg; |
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567 |
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568 sdu_data16++; |
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569 } |
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570 |
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571 sdu_data8 = (UBYTE*)sdu_data16; |
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572 |
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573 if (frame8 != 0) |
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574 { |
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575 |
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576 #ifdef _GEA_SIMULATION_ |
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|
577 ciph_reg8_read_sim(); |
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578 #endif |
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579 |
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580 *sdu_data8 = *cci_data->fbs.data8_reg; |
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581 |
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582 sdu_data8++; |
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583 } |
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584 |
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|
585 #if (BOARD == 61 OR BOARD == 71) /* G-Sample or I-Sample */ |
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586 *cci_data->fbs.switch_reg = 0; |
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587 #endif |
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|
588 |
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589 /* |
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590 * Copy FCS to destination sdu, taking byte ordering of FCS registers |
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|
591 * into account, e.g.: |
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|
592 * reg1 reg2 sdu |
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593 * 29 FC xx 36 -> FC 29 36 |
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594 */ |
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|
595 *sdu_data8 = (UBYTE) (*cci_data->fbs.fcs_ul_reg1 & 0x00FF); |
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|
596 sdu_data8++; |
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|
597 *sdu_data8 = (UBYTE)((*cci_data->fbs.fcs_ul_reg1 & 0xFF00) >> 8); |
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|
598 sdu_data8++; |
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|
599 *sdu_data8 = (UBYTE) (*cci_data->fbs.fcs_ul_reg2 & 0x00FF); |
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|
600 |
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|
601 } /* ciph_get_ciphered_data() */ |
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|
602 |
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|
603 /* |
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|
604 +------------------------------------------------------------------------------ |
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605 | Function : ciph_get_deciphered_data |
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|
606 +------------------------------------------------------------------------------ |
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|
607 | Description : The function ciph_get_deciphered_data() .... |
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|
608 | |
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609 | Parameters : T_CCI_DECIPHER_CNF *decipher_cnf |
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|
610 | |
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|
611 +------------------------------------------------------------------------------ |
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|
612 */ |
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|
613 LOCAL void ciph_get_deciphered_data (T_CIPH_out_data *out_data, U8 *status) |
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614 { |
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|
615 int i, |
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|
616 frame8, |
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617 frame16; |
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|
618 USHORT *sdu_data16; |
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619 UBYTE *sdu_data8; |
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|
620 |
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621 |
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|
622 TRACE_FUNCTION( "ciph_get_deciphered_data" ); |
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623 |
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|
624 i = out_data->len; |
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|
625 |
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|
626 frame16 = i / 2; |
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|
627 frame8 = i % 2; |
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|
628 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
629 #ifdef _GEA_SIMULATION_ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
630 cci_data->fbs.simulated_reg = cci_data->fbs.simulated_reg_buffer; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
631 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
632 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
633 sdu_data16 = (USHORT*)out_data->buf; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
634 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
635 #if (BOARD == 61 OR BOARD == 71) /* G-Sample or I-Sample */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
636 *cci_data->fbs.switch_reg = 1; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
637 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
638 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
639 for (i=0; i<frame16; i++) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
640 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
641 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
642 #ifdef _GEA_SIMULATION_ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
643 ciph_reg16_read_sim(); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
644 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
645 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
646 *sdu_data16 = *cci_data->fbs.data16_reg; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
647 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
648 sdu_data16++; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
649 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
650 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
651 sdu_data8 = (UBYTE*)sdu_data16; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
652 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
653 if (frame8 != 0) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
654 { |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
655 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
656 #ifdef _GEA_SIMULATION_ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
657 ciph_reg8_read_sim(); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
658 #endif |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
659 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
660 *sdu_data8 = *cci_data->fbs.data8_reg; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
661 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
662 sdu_data8++; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
663 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
664 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
665 #if (BOARD == 61 OR BOARD == 71) /* G-Sample or I-Sample */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
666 *cci_data->fbs.switch_reg = 0; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
667 #endif |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
668 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
669 /* |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
670 * Get result from FCS calculation |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
671 */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
672 *status = ciph_fcs_check(sdu_data8); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
673 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
674 } /* ciph_get_deciphered_data() */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
675 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
676 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
677 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
678 /* |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
679 +------------------------------------------------------------------------------ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
680 | Function : ciph_fill_ul_reg |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
681 +------------------------------------------------------------------------------ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
682 | Description : The function ciph_fill_ul_reg() fills the uplink registers. |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
683 | |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
684 | Parameters : |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
685 +------------------------------------------------------------------------------ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
686 */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
687 LOCAL void ciph_fill_ul_reg ( T_CIPH_cipher_req_parms *cipher_req_parms, |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
688 T_CIPH_in_data_list *in_data_list ) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
689 { |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
690 int i, j; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
691 int frame8; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
692 UBYTE *desc_data8; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
693 U16 len = 0; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
694 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
695 TRACE_FUNCTION( "ciph_fill_ul_reg" ); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
696 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
697 /* |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
698 * setting the protected mode variable |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
699 */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
700 if (cipher_req_parms->gprs_parameters.pm EQ CIPH_PM_PROTECTED) |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
701 { |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
702 *cci_data->fbs.conf_ul_reg1 |= PROTECTED; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
703 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
704 else |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
705 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
706 *cci_data->fbs.conf_ul_reg1 &= NON_PROTECTED; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
707 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
708 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
709 /* |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
710 * FCS is always calculated |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
711 */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
712 *cci_data->fbs.conf_ul_reg1 |= FCS_COMPUTED; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
713 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
714 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
715 * direction is uplink |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
716 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
717 /* Direction muss noch in init function gesetzt werden */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
718 *cci_data->fbs.conf_ul_reg1 &= D_UL; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
719 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
720 if (cci_data->fbs.ciph_params.algo NEQ CIPH_EA0) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
721 { |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
722 *cci_data->fbs.conf_ul_reg1 |= ENCRYPT; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
723 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
724 if(cci_data->fbs.ciph_params.algo EQ CIPH_EA1) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
725 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
726 *cci_data->fbs.conf_ul_reg1 &= GEA_FIRST; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
727 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
728 else |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
729 if(cci_data->fbs.ciph_params.algo EQ CIPH_EA2) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
730 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
731 *cci_data->fbs.conf_ul_reg1 |= GEA_SECOND; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
732 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
733 else |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
734 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
735 TRACE_ERROR ("Illegal ciphering_algorithm"); |
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parents:
diff
changeset
|
736 } |
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parents:
diff
changeset
|
737 |
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parents:
diff
changeset
|
738 /* |
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parents:
diff
changeset
|
739 * if the condition is CCI_CIPHER_NO_ALGORITHM we don't use subsequent statements |
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parents:
diff
changeset
|
740 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
741 *cci_data->fbs.kc_reg1 = (USHORT)((USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[1]) << 8)+ |
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parents:
diff
changeset
|
742 (USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[0]); |
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parents:
diff
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|
743 *cci_data->fbs.kc_reg2 = (USHORT)((USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[3]) << 8)+ |
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parents:
diff
changeset
|
744 (USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[2]); |
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parents:
diff
changeset
|
745 *cci_data->fbs.kc_reg3 = (USHORT)((USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[5]) << 8)+ |
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parents:
diff
changeset
|
746 (USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[4]); |
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parents:
diff
changeset
|
747 *cci_data->fbs.kc_reg4 = (USHORT)((USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[7]) << 8)+ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
748 (USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[6]); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
749 |
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parents:
diff
changeset
|
750 /* store ciphering key in the local buffer for later verification */ |
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parents:
diff
changeset
|
751 if(cci_data->fbs.cci_info_trace){ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
752 tmp_key[0] = *cci_data->fbs.kc_reg1; |
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parents:
diff
changeset
|
753 tmp_key[1] = *cci_data->fbs.kc_reg2; |
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parents:
diff
changeset
|
754 tmp_key[2] = *cci_data->fbs.kc_reg3; |
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parents:
diff
changeset
|
755 tmp_key[3] = *cci_data->fbs.kc_reg4; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
756 } |
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parents:
diff
changeset
|
757 |
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parents:
diff
changeset
|
758 /* |
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parents:
diff
changeset
|
759 * FRAME DEPENDENT CIPHERING INPUT entity is ULONG in the primitive |
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parents:
diff
changeset
|
760 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
761 *cci_data->fbs.conf_ul_reg4 = (USHORT)(cipher_req_parms->gprs_parameters.ciphering_input); |
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parents:
diff
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|
762 *cci_data->fbs.conf_ul_reg5 = (USHORT)(cipher_req_parms->gprs_parameters.ciphering_input >> 16); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
763 |
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parents:
diff
changeset
|
764 /* |
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parents:
diff
changeset
|
765 * it is assumed that MSB is first 16 bit and LSB part is last 16 bits |
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parents:
diff
changeset
|
766 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
767 } |
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parents:
diff
changeset
|
768 else |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
769 { |
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parents:
diff
changeset
|
770 /* |
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parents:
diff
changeset
|
771 * in this case we don't fill the registers that contain ciphering keys |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
772 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
773 *cci_data->fbs.conf_ul_reg1 &= NO_ENCRYPT; |
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parents:
diff
changeset
|
774 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
775 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
776 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
777 * Enter LLC-PDU size in bytes |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
778 */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
779 for (i = 0; i < in_data_list->c_in_data; i++) { |
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parents:
diff
changeset
|
780 len += in_data_list->ptr_in_data[i].len; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
781 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
782 *cci_data->fbs.conf_ul_reg2 = (USHORT)len; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
783 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
784 * conf_ul_reg3 is seperated into 2 parts of UBYTE: |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
785 * -> lowbyte = N202 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
786 * -> hightbyte = LLC-PDU header size in bytes (indicate the offset of information) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
787 */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
788 *cci_data->fbs.conf_ul_reg3 = (USHORT)((cipher_req_parms->gprs_parameters.header_size << 8) | CIPH_N202); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
789 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
790 #ifdef _GEA_SIMULATION_ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
791 cci_data->fbs.simulated_reg = cci_data->fbs.simulated_reg_buffer; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
792 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
793 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
794 *cci_data->fbs.conf_ul_reg1 &= NO_INPUT_SHIFT; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
795 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
796 #if (BOARD == 61 OR BOARD == 71) /* G-Sample or I-Sample */ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
797 *cci_data->fbs.switch_reg = 1; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
798 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
799 #ifdef LLC_TRACE_GEA_PARAM |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
800 cci_trace_gea_param(); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
801 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
802 |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
803 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
804 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
805 for (i = 0; i < in_data_list->c_in_data; i++) { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
806 desc_data8 = (U8*)in_data_list->ptr_in_data[i].buf; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
807 frame8 = in_data_list->ptr_in_data[i].len; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
808 for (j=0; j < frame8; j++) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
809 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
810 *cci_data->fbs.data8_reg = *desc_data8; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
811 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
812 #ifdef _GEA_SIMULATION_ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
813 ciph_reg8_write_sim(); |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
814 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
815 desc_data8++; |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
816 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
817 } |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
818 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
819 #if (BOARD == 61 OR BOARD == 71) /* G-Sample or I-Sample */ |
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parents:
diff
changeset
|
820 *cci_data->fbs.switch_reg = 0; |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
821 #endif |
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parents:
diff
changeset
|
822 } /* ciph_fill_ul_reg() */ |
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parents:
diff
changeset
|
823 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
824 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
825 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
826 /* |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
827 +------------------------------------------------------------------------------ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
828 | Function : ciph_fill_dl_reg |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
829 +------------------------------------------------------------------------------ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
830 | Description : The function ciph_fill_dl_reg() |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
831 | |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
832 | Parameters : |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
833 | |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
834 +------------------------------------------------------------------------------ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
835 */ |
219afcfc6250
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
836 LOCAL void ciph_fill_dl_reg (T_CIPH_cipher_req_parms *cipher_req_parms, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
837 T_CIPH_in_data_list *in_data_list ) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
838 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
839 ULONG i, j; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
840 ULONG frame8; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
841 UBYTE *desc_data8; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
842 ULONG len = 0; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
843 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
844 TRACE_FUNCTION( "ciph_fill_dl_reg" ); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
845 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
846 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
847 * setting the protected mode variable |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
848 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
849 if(cipher_req_parms->gprs_parameters.pm EQ CIPH_PM_PROTECTED) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
850 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
851 *cci_data->fbs.conf_dl_reg1 |= PROTECTED; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
852 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
853 else |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
854 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
855 *cci_data->fbs.conf_dl_reg1 &= NON_PROTECTED; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
856 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
857 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
858 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
859 * FCS is always calculated |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
860 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
861 *cci_data->fbs.conf_dl_reg1 |= FCS_COMPUTED; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
862 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
863 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
864 * data always copied aligned independent |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
865 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
866 *cci_data->fbs.conf_dl_reg1 &= NO_INPUT_SHIFT; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
867 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
868 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
869 * direction is downlink |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
870 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
871 *cci_data->fbs.conf_dl_reg1 |= D_DL; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
872 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
873 if(cci_data->fbs.ciph_params.algo NEQ CIPH_EA0) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
874 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
875 *cci_data->fbs.conf_dl_reg1 |= ENCRYPT; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
876 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
877 if(cci_data->fbs.ciph_params.algo EQ CIPH_EA1) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
878 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
879 *cci_data->fbs.conf_dl_reg1 &= GEA_FIRST; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
880 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
881 else |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
882 if(cci_data->fbs.ciph_params.algo EQ CIPH_EA2) |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
883 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
884 *cci_data->fbs.conf_dl_reg1 |= GEA_SECOND; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
885 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
886 else |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
887 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
888 TRACE_ERROR ("Illegal ciphering_algorithm"); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
889 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
890 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
891 *cci_data->fbs.kc_reg1 = |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
892 (USHORT)((USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[1]) << 8) + |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
893 (USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[0]); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
894 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
895 *cci_data->fbs.kc_reg2 = |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
896 (USHORT)((USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[3]) << 8) + |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
897 (USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[2]); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
898 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
899 *cci_data->fbs.kc_reg3 = |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
900 (USHORT)((USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[5]) << 8) + |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
901 (USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[4]); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
902 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
903 *cci_data->fbs.kc_reg4 = |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
904 (USHORT)((USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[7]) << 8) + |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
905 (USHORT)(cci_data->fbs.ciph_params.ptr_ck->ck_element[6]); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
906 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
907 /* store ciphering key in local buffer for later verification */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
908 if(cci_data->fbs.cci_info_trace){ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
909 tmp_key[0] = *cci_data->fbs.kc_reg1; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
910 tmp_key[1] = *cci_data->fbs.kc_reg2; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
911 tmp_key[2] = *cci_data->fbs.kc_reg3; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
912 tmp_key[3] = *cci_data->fbs.kc_reg4; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
913 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
914 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
915 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
916 * FRAME DEPENDENT CIPHERING INPUT entity is ULONG in the primitive |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
917 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
918 *cci_data->fbs.conf_dl_reg4 = (USHORT)(cipher_req_parms->gprs_parameters.ciphering_input); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
919 *cci_data->fbs.conf_dl_reg5 = (USHORT)(cipher_req_parms->gprs_parameters.ciphering_input >> 16); |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
920 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
921 else |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
922 { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
923 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
924 * in this case we don't fill the registers that contain ciphering keys |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
925 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
926 *cci_data->fbs.conf_dl_reg1 &= NO_ENCRYPT; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
927 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
928 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
929 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
930 * Write length of LLC-PDU in bytes including FCS |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
931 */ |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
932 for (i = 0; i < in_data_list->c_in_data; i++) { |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
933 len += in_data_list->ptr_in_data[i].len; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
934 } |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
935 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
936 *cci_data->fbs.conf_dl_reg2 = (USHORT)len; |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
937 |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
938 /* |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
939 * conf_dl_reg3 is seperated into 2 parts of UBYTE: |
219afcfc6250
src/g23m-gprs: initial import from TCS3.2/LoCosto
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
940 * -> lowbyte = N202 |
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|
941 * -> hightbyte = LLC-PDU header size in bytes (indicate the offset of information) |
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parents:
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|
942 */ |
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parents:
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|
943 *cci_data->fbs.conf_dl_reg3 = (USHORT)((cipher_req_parms->gprs_parameters.header_size << 8) | CIPH_N202); |
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parents:
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|
944 |
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parents:
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|
945 |
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|
946 #ifdef _GEA_SIMULATION_ |
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|
947 cci_data->fbs.simulated_reg = cci_data->fbs.simulated_reg_buffer; |
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948 #endif |
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|
949 |
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|
950 #if (BOARD == 61 OR BOARD == 71) /* G-Sample or I-Sample */ |
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parents:
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|
951 *cci_data->fbs.switch_reg = 1; |
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Mychaela Falconia <falcon@freecalypso.org>
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|
952 #endif |
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parents:
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|
953 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
954 for (i = 0; i < in_data_list->c_in_data; i++) { |
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parents:
diff
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|
955 desc_data8 = (UBYTE*)in_data_list->ptr_in_data[i].buf; |
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parents:
diff
changeset
|
956 frame8 = in_data_list->ptr_in_data[i].len; |
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parents:
diff
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|
957 |
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parents:
diff
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|
958 for (j=0; j < frame8; j++){ |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
959 *cci_data->fbs.data8_reg = desc_data8[j]; |
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parents:
diff
changeset
|
960 #ifdef _GEA_SIMULATION_ |
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parents:
diff
changeset
|
961 ciph_reg8_write_sim(); |
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parents:
diff
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|
962 #endif |
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parents:
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|
963 } |
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parents:
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|
964 } |
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parents:
diff
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|
965 |
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parents:
diff
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|
966 #if (BOARD == 61 OR BOARD == 71) /* G-Sample or I-Sample */ |
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parents:
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|
967 *cci_data->fbs.switch_reg = 0; |
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parents:
diff
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|
968 #endif |
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parents:
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|
969 |
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parents:
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|
970 } /* ciph_fill_dl_reg() */ |
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parents:
diff
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|
971 |
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parents:
diff
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|
972 #if (BOARD == 61 OR BOARD == 71) /* G-Sample or I-Sample */ |
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parents:
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|
973 |
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parents:
diff
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|
974 #ifdef LLC_TRACE_GEA_PARAM |
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parents:
diff
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|
975 LOCAL void cci_trace_gea_param( void ) |
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parents:
diff
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|
976 { |
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parents:
diff
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|
977 TRACE_EVENT_P9( "cci_trace_gea_param_1 %04X %04X %04X %04X %04X %04X %04X %04X %04X", |
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parents:
diff
changeset
|
978 *cci_data->fbs.cntl_reg , |
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parents:
diff
changeset
|
979 *cci_data->fbs.status_reg , |
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parents:
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|
980 *cci_data->fbs.status_irq_reg, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
981 *cci_data->fbs.conf_ul_reg1 , |
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parents:
diff
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|
982 *cci_data->fbs.conf_ul_reg2 , |
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parents:
diff
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|
983 *cci_data->fbs.conf_ul_reg3 , |
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parents:
diff
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|
984 *cci_data->fbs.conf_ul_reg4 , |
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parents:
diff
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|
985 *cci_data->fbs.conf_ul_reg5 , |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
986 *cci_data->fbs.conf_dl_reg1 ); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
987 |
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parents:
diff
changeset
|
988 TRACE_EVENT_P9( "cci_trace_gea_param_2 %04X %04X %04X %04X %04X %04X %04X %04X %04X", |
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parents:
diff
changeset
|
989 *cci_data->fbs.conf_dl_reg2 , |
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parents:
diff
changeset
|
990 *cci_data->fbs.conf_dl_reg3 , |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
991 *cci_data->fbs.conf_dl_reg4 , |
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parents:
diff
changeset
|
992 *cci_data->fbs.conf_dl_reg5 , |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
993 *cci_data->fbs.fcs_ul_reg1 , |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
994 *cci_data->fbs.fcs_ul_reg2 , |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
995 *cci_data->fbs.fcs_dl_reg1 , |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
996 *cci_data->fbs.fcs_dl_reg2 , |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
997 *cci_data->fbs.switch_reg ); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
998 } |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
999 #endif |
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parents:
diff
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|
1000 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
1001 #endif /* TI_PS_OP_CIPH_DRIVER */ |